From e7fdbafe2dc5a63b100154df51d7edd89c31364a Mon Sep 17 00:00:00 2001 From: Kai Nacke Date: Wed, 18 Dec 2013 16:54:49 +0100 Subject: [PATCH] Fix generation of position-independent code. The new module discovery scheme requires the following section order: .minfo_beg .minfo .minfo_end This works for non-PIC code because the segments have the same attributes. However, if -relocation-model=pic is passed to ldc2 then the .minfo section becomes writeable and the sequence of sections is changed. The quick fix is to mark the data always as writeable. Then all sections are always writeable. I think a better solution would be to base this in the used relocation model. But this information is currently only available in the driver. This fixes the failure in test case runnable/eh2.d --- gen/module.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/gen/module.cpp b/gen/module.cpp index ecf34baf..49988a86 100644 --- a/gen/module.cpp +++ b/gen/module.cpp @@ -394,7 +394,7 @@ static void build_dso_registry_calls(llvm::Constant* thisModuleInfo) llvm::GlobalVariable* minfoBeg = new llvm::GlobalVariable( *gIR->module, moduleInfoPtrTy, - true, + false, // FIXME: mRelocModel != llvm::Reloc::PIC_ llvm::GlobalValue::LinkOnceODRLinkage, getNullPtr(moduleInfoPtrTy), "_minfo_beg" @@ -408,7 +408,7 @@ static void build_dso_registry_calls(llvm::Constant* thisModuleInfo) llvm::GlobalVariable* thismref = new llvm::GlobalVariable( *gIR->module, moduleInfoPtrTy, - true, + false, // FIXME: mRelocModel != llvm::Reloc::PIC_ llvm::GlobalValue::LinkOnceODRLinkage, DtoBitCast(thisModuleInfo, moduleInfoPtrTy), thismrefname @@ -419,7 +419,7 @@ static void build_dso_registry_calls(llvm::Constant* thisModuleInfo) llvm::GlobalVariable* minfoEnd = new llvm::GlobalVariable( *gIR->module, moduleInfoPtrTy, - true, + false, // FIXME: mRelocModel != llvm::Reloc::PIC_ llvm::GlobalValue::LinkOnceODRLinkage, getNullPtr(moduleInfoPtrTy), "_minfo_end"