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https://github.com/xomboverlord/xomb-bare-bones.git
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164 lines
2.5 KiB
ArmAsm
164 lines
2.5 KiB
ArmAsm
; boot.s
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; entry is from bootloader
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section .text
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bits 32
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%include "defines.mac"
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; externs given by the linker script
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extern _edata
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extern _end
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; extern to the load.s
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extern start64
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extern stack
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; define the starting point for this module
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global start
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global _start
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start:
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_start:
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; Stash values for multiboot we won't touch until 64 bit mode
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mov esi, ebx
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mov edi, eax
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jmp start32
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; the multiboot header needs to be aligned at
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; a 32 bit boundary
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align 4
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multiboot_header:
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dd MULTIBOOT_HEADER_MAGIC
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dd MULTIBOOT_HEADER_FLAGS
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dd -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
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dd multiboot_header
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dd _start
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dd (_edata-KERNEL_VMA_BASE)
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dd (_end-KERNEL_VMA_BASE)
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dd _start
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; the 32 bit entry
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global start32
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start32:
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; disable interrupts
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cli
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; enable 64-bit page translation table entries
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; by setting CR4.PAE = 1.
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;
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; Paging is not enabled until long mode.
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mov eax, cr4
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bts eax, 5
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mov cr4, eax
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; Create long mode page table and init CR3 to
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; point to the base of the PML4 page table
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mov eax, pml4_base
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mov cr3, eax
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; Enable Long mode and SYSCALL / SYSRET instructions
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mov ecx, 0xC0000080
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rdmsr
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bts eax, 8
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bts eax, 0
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wrmsr
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; Load the 32 bit GDT
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lgdt [pGDT32]
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; Load the 32 bit IDT
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; lidt [pIDT32]
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; establish a stack for 32 bit code
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mov esp, (stack-KERNEL_VMA_BASE) + STACK_SIZE
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; enable paging to activate long mode
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mov eax, cr0
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bts eax, 31
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mov cr0, eax
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jmp CS_KERNEL:(start64-KERNEL_VMA_BASE)
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bits 64
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code64Jump:
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jmp (start64-KERNEL_VMA_BASE)
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; Data Structures Follow
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bits 32
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; 32 bit gdt
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align 4096
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pGDT32:
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dw GDT_END - GDT_TABLE - 1
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dq GDT_TABLE - KERNEL_VMA_BASE
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GDT_TABLE:
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dq 0x0000000000000000 ; Null Descriptor
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dq 0x00cf9a000000ffff ; CS_KERNEL32
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dq 0x00af9a000000ffff,0 ; CS_KERNEL
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dq 0x00af93000000ffff,0 ; DS_KERNEL
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dq 0x00affa000000ffff,0 ; CS_USER
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dq 0x00aff3000000ffff,0 ; DS_USER
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dq 0,0 ;
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dq 0,0 ;
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dq 0,0 ;
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dq 0,0 ;
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dq 0,0,0 ; Three TLS descriptors
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dq 0x0000f40000000000 ;
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GDT_END:
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; Temporary page tables
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; These assume linking to 0xFFFF800000000000
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align 4096
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pml4_base:
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dq (pml3_base + 0x7)
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times 255 dq 0
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dq (pml3_base + 0x7)
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times 255 dq 0
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align 4096
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pml3_base:
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dq (pml2_base + 0x7)
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times 511 dq 0
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align 4096
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pml2_base:
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%assign i 0
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%rep 25
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dq (pml1_base + i + 0x7)
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%assign i i+4096
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%endrep
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times (512-25) dq 0
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align 4096
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; 15 tables are described here
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; this maps 40 MB from address 0x0
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; to an identity mapping
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pml1_base:
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%assign i 0
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%rep 512*25
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dq (i << 12) | 0x087
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%assign i i+1
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%endrep
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