mirror of
https://github.com/xomboverlord/xomb.git
synced 2026-01-11 18:33:15 +01:00
Replace INT 0x80 with native SYSCALL/SYSRET
Implement fast system calls using the x86-64 SYSCALL/SYSRET instructions: - Configure MSRs: EFER (enable SCE), STAR (segment selectors), LSTAR (entry point), SFMASK (disable interrupts on entry) - Add per-CPU data structure accessed via GS segment for kernel stack pointer storage during privilege transitions - Use SWAPGS in syscall entry to access per-CPU data and switch from user to kernel stack - Add SWAPGS before IRETQ to user mode to set up correct GS state for subsequent syscalls SYSCALL/SYSRET is significantly faster than INT 0x80 as it avoids IDT lookup and uses direct MSR-configured entry.
This commit is contained in:
wilkie
@@ -1,20 +1,119 @@
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//! System Call Interface for x86-64
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//! System Call Interface for x86-64 using SYSCALL/SYSRET
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//!
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//! This module implements system calls using INT 0x80.
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//! This is simpler than SYSCALL/SYSRET and uses the existing IDT infrastructure.
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//! This module implements fast system calls using the native x86-64
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//! SYSCALL and SYSRET instructions.
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//!
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//! Syscall Convention:
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//! Syscall Convention (Linux-compatible):
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//! - RAX = syscall number
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//! - RDI, RSI, RDX, R10, R8, R9 = arguments
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//! - RAX = return value
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//! - RCX and R11 are clobbered (used by SYSCALL for RIP and RFLAGS)
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//!
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//! On SYSCALL entry:
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//! - RCX = return RIP
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//! - R11 = return RFLAGS
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//! - CS = kernel code segment (from STAR)
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//! - SS = kernel data segment (from STAR)
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//! - RSP = unchanged (still user stack!)
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//!
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//! We use SWAPGS to access per-CPU data containing the kernel stack pointer.
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use core::arch::asm;
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use crate::arch::x86_64::gdt;
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/// System call interrupt vector
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pub const SYSCALL_VECTOR: u8 = 0x80;
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// ============================================================================
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// MSR Definitions
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// ============================================================================
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/// Extended Feature Enable Register
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const IA32_EFER: u32 = 0xC0000080;
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/// System Call Extensions enable bit in EFER
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const EFER_SCE: u64 = 1 << 0;
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/// STAR: Segment selectors for SYSCALL/SYSRET
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/// Bits 47:32 = SYSCALL CS (SS = CS + 8)
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/// Bits 63:48 = SYSRET CS base (CS = base + 16, SS = base + 8)
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const IA32_STAR: u32 = 0xC0000081;
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/// LSTAR: Target RIP for SYSCALL (Long Mode)
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const IA32_LSTAR: u32 = 0xC0000082;
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/// SFMASK: RFLAGS mask for SYSCALL (bits set here are cleared in RFLAGS)
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const IA32_SFMASK: u32 = 0xC0000084;
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/// GS base for current privilege level
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const IA32_GS_BASE: u32 = 0xC0000101;
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/// GS base swapped by SWAPGS
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const IA32_KERNEL_GS_BASE: u32 = 0xC0000102;
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// ============================================================================
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// MSR Access
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// ============================================================================
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/// Read a Model-Specific Register
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#[inline]
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unsafe fn rdmsr(msr: u32) -> u64 {
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let low: u32;
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let high: u32;
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unsafe {
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asm!(
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"rdmsr",
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in("ecx") msr,
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out("eax") low,
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out("edx") high,
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options(nostack, nomem, preserves_flags)
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);
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}
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((high as u64) << 32) | (low as u64)
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}
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/// Write a Model-Specific Register
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#[inline]
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unsafe fn wrmsr(msr: u32, value: u64) {
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let low = value as u32;
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let high = (value >> 32) as u32;
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unsafe {
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asm!(
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"wrmsr",
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in("ecx") msr,
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in("eax") low,
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in("edx") high,
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options(nostack, nomem, preserves_flags)
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);
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}
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}
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// ============================================================================
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// Per-CPU Data
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// ============================================================================
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/// Per-CPU data structure accessed via GS segment
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///
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/// This is used by the SYSCALL entry point to get the kernel stack.
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/// Fields are at fixed offsets used by assembly code.
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#[repr(C)]
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pub struct PerCpuData {
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/// Kernel stack pointer (offset 0)
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/// Set to top of kernel stack for this CPU
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pub kernel_rsp: u64,
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/// User stack pointer (offset 8)
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/// Saved here during SYSCALL, restored on SYSRET
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pub user_rsp: u64,
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/// Current process pointer (offset 16)
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pub current_process: u64,
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}
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/// Static per-CPU data (for single-CPU system)
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static mut PER_CPU: PerCpuData = PerCpuData {
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kernel_rsp: 0,
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user_rsp: 0,
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current_process: 0,
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};
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// ============================================================================
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// System Call Numbers
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// ============================================================================
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/// System call numbers
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pub mod numbers {
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pub const EXIT: u64 = 0;
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pub const WRITE: u64 = 1;
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@@ -22,99 +121,200 @@ pub mod numbers {
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pub const GETPID: u64 = 3;
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}
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/// Initialize the syscall interface
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///
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/// This adds the INT 0x80 handler to the IDT.
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pub fn init() {
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use crate::arch::x86_64::interrupts::{GateType, set_handler};
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// ============================================================================
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// RFLAGS bits to mask on SYSCALL
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// ============================================================================
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// Set up INT 0x80 as a trap gate with DPL 3 (user-callable)
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set_handler(SYSCALL_VECTOR, syscall_entry as *const () as u64, GateType::Trap, 3);
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const RFLAGS_IF: u64 = 1 << 9; // Interrupt enable
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const RFLAGS_TF: u64 = 1 << 8; // Trap flag (single-step)
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const RFLAGS_DF: u64 = 1 << 10; // Direction flag
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const RFLAGS_AC: u64 = 1 << 18; // Alignment check
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const RFLAGS_NT: u64 = 1 << 14; // Nested task
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/// Flags to clear on SYSCALL entry
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/// We clear IF (disable interrupts), TF (no single-step), DF (clear direction)
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const SFMASK_VALUE: u64 = RFLAGS_IF | RFLAGS_TF | RFLAGS_DF | RFLAGS_AC | RFLAGS_NT;
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// ============================================================================
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// Initialization
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// ============================================================================
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/// Initialize the SYSCALL/SYSRET mechanism
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///
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/// This configures the MSRs and sets up per-CPU data.
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/// Must be called after GDT is set up with user segments.
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pub fn init(kernel_stack: u64) {
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unsafe {
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// Set up per-CPU data via raw pointer
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let per_cpu = &raw mut PER_CPU;
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(*per_cpu).kernel_rsp = kernel_stack;
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(*per_cpu).user_rsp = 0;
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(*per_cpu).current_process = 0;
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// Set GS bases for SWAPGS
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// When in user mode: GS_BASE = user value, KERNEL_GS_BASE = &PER_CPU
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// When in kernel mode: GS_BASE = &PER_CPU, KERNEL_GS_BASE = user value
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// We start in kernel mode, so set GS_BASE to PER_CPU
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let per_cpu_addr = per_cpu as u64;
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wrmsr(IA32_GS_BASE, per_cpu_addr);
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wrmsr(IA32_KERNEL_GS_BASE, 0); // User's GS base (0 for now)
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// Enable System Call Extensions in EFER
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let efer = rdmsr(IA32_EFER);
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wrmsr(IA32_EFER, efer | EFER_SCE);
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// Set up STAR: segment selectors
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// Bits 47:32 = SYSCALL CS and SS (kernel segments)
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// Bits 63:48 = SYSRET CS and SS base (user segments)
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//
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// Our GDT layout:
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// 0x08: Kernel code
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// 0x10: Kernel data
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// 0x18: User data
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// 0x20: User code
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//
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// For SYSCALL: CS = STAR[47:32], SS = STAR[47:32] + 8
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// We want CS = 0x08, SS = 0x10, so STAR[47:32] = 0x08
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//
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// For SYSRET (64-bit): CS = STAR[63:48] + 16, SS = STAR[63:48] + 8
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// We want CS = 0x20, SS = 0x18, so STAR[63:48] = 0x10
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let star = (0x10u64 << 48) | (0x08u64 << 32);
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wrmsr(IA32_STAR, star);
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// Set up LSTAR: syscall entry point
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wrmsr(IA32_LSTAR, syscall_entry as *const () as u64);
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// Set up SFMASK: flags to clear on SYSCALL
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wrmsr(IA32_SFMASK, SFMASK_VALUE);
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}
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}
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/// Syscall entry point
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/// Update the kernel stack pointer in per-CPU data
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pub fn set_kernel_stack(stack: u64) {
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unsafe {
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let per_cpu = &raw mut PER_CPU;
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(*per_cpu).kernel_rsp = stack;
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}
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}
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// ============================================================================
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// SYSCALL Entry Point
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// ============================================================================
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/// SYSCALL entry point
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///
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/// This is registered as the INT 0x80 handler.
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/// Stack on entry (pushed by CPU):
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/// - SS, RSP, RFLAGS, CS, RIP (if from ring 3)
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/// - Error code (none for INT)
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/// On entry:
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/// - RCX = user RIP (return address)
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/// - R11 = user RFLAGS
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/// - RAX = syscall number
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/// - RDI, RSI, RDX, R10, R8, R9 = arguments
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/// - RSP = user stack (not switched!)
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/// - Interrupts are disabled (IF cleared by SFMASK)
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///
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/// We must:
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/// 1. SWAPGS to get access to per-CPU data
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/// 2. Save user RSP and load kernel RSP
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/// 3. Save registers and call handler
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/// 4. Restore registers
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/// 5. Load user RSP
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/// 6. SWAPGS back
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/// 7. SYSRET
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#[unsafe(naked)]
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extern "C" fn syscall_entry() {
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core::arch::naked_asm!(
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// No error code for software interrupts
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// Save all registers
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"push rax",
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// SWAPGS: now GS points to per-CPU data
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"swapgs",
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// Save user stack pointer to per-CPU data
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"mov gs:[8], rsp",
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// Load kernel stack pointer from per-CPU data
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"mov rsp, gs:[0]",
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// Now we're on the kernel stack. Build a stack frame.
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// We need to save enough state to call the handler and return.
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// Push user context (for potential inspection and SYSRET)
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"push gs:[8]", // User RSP (from per-CPU)
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"push r11", // User RFLAGS
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"push rcx", // User RIP
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// Push syscall arguments (callee-saved perspective)
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"push rax", // Syscall number
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"push rdi", // arg1
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"push rsi", // arg2
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"push rdx", // arg3
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"push r10", // arg4 (note: r10 instead of rcx which is clobbered)
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"push r8", // arg5
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"push r9", // arg6
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// Save remaining callee-saved registers
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"push rbx",
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"push rcx",
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"push rdx",
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"push rsi",
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"push rdi",
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"push rbp",
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"push r8",
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"push r9",
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"push r10",
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"push r11",
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"push r12",
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"push r13",
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"push r14",
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"push r15",
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// Call Rust syscall handler
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// First arg (RDI) = pointer to saved state
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// Call Rust handler with pointer to stack frame
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"mov rdi, rsp",
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"call {handler}",
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// Return value is in RAX, save it to the stack frame
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"mov [rsp + 14*8], rax", // Overwrite saved RAX
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// RAX now contains return value
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// Restore all registers
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// Restore callee-saved registers
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"pop r15",
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"pop r14",
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"pop r13",
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"pop r12",
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"pop r11",
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"pop r10",
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"pop r9",
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"pop r8",
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"pop rbp",
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"pop rdi",
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"pop rsi",
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"pop rdx",
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"pop rcx",
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"pop rbx",
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"pop rax",
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// Return from interrupt
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"iretq",
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// Skip over saved arguments (7 values: rax, rdi, rsi, rdx, r10, r8, r9)
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"add rsp, 7 * 8",
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// Pop user context for SYSRET
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"pop rcx", // User RIP -> RCX for SYSRET
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"pop r11", // User RFLAGS -> R11 for SYSRET
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"pop rsp", // User RSP (direct pop since we're switching stacks)
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// SWAPGS back: restore user's GS base
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"swapgs",
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// Return to user mode
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// SYSRETQ: RIP = RCX, RFLAGS = R11, CS = STAR[63:48]+16, SS = STAR[63:48]+8
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"sysretq",
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handler = sym syscall_handler_rust,
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);
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}
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/// Saved register state for syscall
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// ============================================================================
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// Syscall Handler
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// ============================================================================
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/// Stack frame layout for syscall
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#[repr(C)]
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pub struct SyscallFrame {
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// Callee-saved (pushed last, at lower addresses)
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pub r15: u64,
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pub r14: u64,
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pub r13: u64,
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pub r12: u64,
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pub r11: u64,
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pub r10: u64,
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pub r9: u64,
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pub r8: u64,
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pub rbp: u64,
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pub rdi: u64,
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pub rsi: u64,
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pub rdx: u64,
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pub rcx: u64,
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pub rbx: u64,
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pub rax: u64,
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// CPU-pushed
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pub rip: u64,
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pub cs: u64,
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pub rflags: u64,
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pub rsp: u64,
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pub ss: u64,
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// Arguments
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pub r9: u64, // arg6
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pub r8: u64, // arg5
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pub r10: u64, // arg4
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pub rdx: u64, // arg3
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pub rsi: u64, // arg2
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pub rdi: u64, // arg1
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pub rax: u64, // syscall number
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// User context (for SYSRET)
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pub user_rip: u64,
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pub user_rflags: u64,
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pub user_rsp: u64,
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}
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/// Rust syscall handler
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@@ -123,8 +323,8 @@ extern "C" fn syscall_handler_rust(frame: &SyscallFrame) -> u64 {
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let arg1 = frame.rdi;
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let arg2 = frame.rsi;
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let arg3 = frame.rdx;
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let arg4 = frame.r10;
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let arg5 = frame.r8;
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let _arg4 = frame.r10;
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let _arg5 = frame.r8;
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match num {
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numbers::EXIT => {
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@@ -184,47 +384,59 @@ extern "C" fn syscall_handler_rust(frame: &SyscallFrame) -> u64 {
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}
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}
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/// Make a syscall from user mode (for testing)
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// ============================================================================
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// User-space syscall wrappers (using SYSCALL instruction)
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// ============================================================================
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/// Make a syscall with no arguments
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#[inline]
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pub unsafe fn syscall0(num: u64) -> u64 {
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let ret: u64;
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unsafe {
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asm!(
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"int 0x80",
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"syscall",
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in("rax") num,
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lateout("rax") ret,
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out("rcx") _, // clobbered by SYSCALL
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out("r11") _, // clobbered by SYSCALL
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options(nostack)
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);
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}
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ret
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}
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/// Make a syscall with one argument
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#[inline]
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pub unsafe fn syscall1(num: u64, arg1: u64) -> u64 {
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let ret: u64;
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unsafe {
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asm!(
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"int 0x80",
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"syscall",
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in("rax") num,
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in("rdi") arg1,
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lateout("rax") ret,
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out("rcx") _,
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out("r11") _,
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options(nostack)
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);
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}
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ret
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}
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/// Make a syscall with three arguments
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#[inline]
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pub unsafe fn syscall3(num: u64, arg1: u64, arg2: u64, arg3: u64) -> u64 {
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let ret: u64;
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unsafe {
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asm!(
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"int 0x80",
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"syscall",
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in("rax") num,
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in("rdi") arg1,
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in("rsi") arg2,
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in("rdx") arg3,
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lateout("rax") ret,
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out("rcx") _,
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out("r11") _,
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options(nostack)
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);
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}
|
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|
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20
src/lib.rs
20
src/lib.rs
@@ -325,11 +325,11 @@ pub fn kernel_init(info: &BootInfo) -> ! {
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writeln!(serial, " GDT with TSS initialized").ok();
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writeln!(serial, " Kernel stack at {:#x}", kernel_stack_top).ok();
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|
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// Initialize syscall interface (INT 0x80)
|
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// Initialize SYSCALL/SYSRET interface
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writeln!(serial, "").ok();
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writeln!(serial, ">>> Initializing syscall interface...").ok();
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arch::x86_64::syscall::init();
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writeln!(serial, " INT 0x80 syscall handler installed").ok();
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writeln!(serial, ">>> Initializing SYSCALL/SYSRET...").ok();
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arch::x86_64::syscall::init(kernel_stack_top);
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writeln!(serial, " SYSCALL/SYSRET configured").ok();
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// Set up a dedicated stack for double fault handling (IST1)
|
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// This ensures the double fault handler has a known-good stack even if
|
||||
@@ -412,6 +412,7 @@ pub fn kernel_init(info: &BootInfo) -> ! {
|
||||
// Write a simple user program that:
|
||||
// 1. Calls write(1, "Hello from user mode!\n", 22)
|
||||
// 2. Calls exit(0)
|
||||
// Uses native SYSCALL instruction (0x0f 0x05) instead of int 0x80
|
||||
let user_code_ptr = user_code_virt.as_u64() as *mut u8;
|
||||
let message = b"Hello from user mode!\n";
|
||||
let message_offset = 64u64; // Place message after code
|
||||
@@ -422,8 +423,7 @@ pub fn kernel_init(info: &BootInfo) -> ! {
|
||||
0x48, 0xc7, 0xc0, 0x01, 0x00, 0x00, 0x00,
|
||||
// mov rdi, 1 (fd = stdout)
|
||||
0x48, 0xc7, 0xc7, 0x01, 0x00, 0x00, 0x00,
|
||||
// lea rsi, [rip + message_offset] - we'll use absolute address instead
|
||||
// mov rsi, 0x400040 (message address = code_base + 64)
|
||||
// mov rsi, message_address (code_base + 64)
|
||||
0x48, 0xbe,
|
||||
((user_code_virt.as_u64() + message_offset) & 0xFF) as u8,
|
||||
(((user_code_virt.as_u64() + message_offset) >> 8) & 0xFF) as u8,
|
||||
@@ -435,14 +435,14 @@ pub fn kernel_init(info: &BootInfo) -> ! {
|
||||
(((user_code_virt.as_u64() + message_offset) >> 56) & 0xFF) as u8,
|
||||
// mov rdx, 22 (length)
|
||||
0x48, 0xc7, 0xc2, 0x16, 0x00, 0x00, 0x00,
|
||||
// int 0x80
|
||||
0xcd, 0x80,
|
||||
// syscall
|
||||
0x0f, 0x05,
|
||||
// mov rax, 0 (EXIT syscall)
|
||||
0x48, 0xc7, 0xc0, 0x00, 0x00, 0x00, 0x00,
|
||||
// mov rdi, 0 (exit code)
|
||||
0x48, 0xc7, 0xc7, 0x00, 0x00, 0x00, 0x00,
|
||||
// int 0x80
|
||||
0xcd, 0x80,
|
||||
// syscall
|
||||
0x0f, 0x05,
|
||||
// hlt (should never reach here)
|
||||
0xf4,
|
||||
];
|
||||
|
||||
@@ -388,18 +388,26 @@ pub unsafe fn jump_to_user(entry: u64, stack: u64) -> ! {
|
||||
//
|
||||
// Note: DS/ES/FS/GS must be set to valid user selectors before IRETQ
|
||||
// when transitioning to ring 3. Using null (0) is valid in 64-bit mode.
|
||||
//
|
||||
// IMPORTANT: We must SWAPGS before going to user mode so that:
|
||||
// - User mode has GS_BASE = user's TLS (0 for now)
|
||||
// - KERNEL_GS_BASE = per-CPU data pointer
|
||||
// This way, when SYSCALL happens, SWAPGS in the entry point will
|
||||
// give the kernel access to per-CPU data.
|
||||
unsafe {
|
||||
core::arch::asm!(
|
||||
// Set DS/ES/FS/GS to null using r11 - avoid clobbering input registers
|
||||
// Set DS/ES to null using r11 - avoid clobbering input registers
|
||||
"xor r11d, r11d",
|
||||
"mov ds, r11w",
|
||||
"mov es, r11w",
|
||||
"mov fs, r11w",
|
||||
"mov gs, r11w",
|
||||
|
||||
// Memory barrier to ensure all stores are complete
|
||||
"mfence",
|
||||
|
||||
// SWAPGS: swap kernel GS with user GS before entering user mode
|
||||
// After this: GS_BASE = user's GS (0), KERNEL_GS_BASE = per-CPU data
|
||||
"swapgs",
|
||||
|
||||
// Build IRETQ frame on stack
|
||||
"push {user_ss}", // SS
|
||||
"push {stack}", // RSP
|
||||
|
||||
Reference in New Issue
Block a user