GPIO:further development
* Generalize GPIO handling. * Add libs to configure gpio's clocks and pads * Add Interrupt handling. * Introduce mmio.h and log.h Change-Id: I928e4c807d15031de2eede4b3ecff62df795f8ac
This commit is contained in:
Kees Jongenburger
@@ -10,10 +10,10 @@ INCS+= acpi.h audio_fw.h bitmap.h \
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config.h const.h cpufeature.h crtso.h \
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debug.h devio.h devman.h dmap.h \
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driver.h drivers.h drvlib.h ds.h \
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endpoint.h fslib.h gcov.h hash.h \
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endpoint.h fslib.h gpio.h gcov.h hash.h \
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hgfs.h ioctl.h input.h ipc.h ipcconst.h \
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keymap.h limits.h mount.h mthread.h minlib.h \
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netdriver.h optset.h partition.h portio.h \
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keymap.h limits.h log.h mmio.h mount.h mthread.h minlib.h \
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netdriver.h optset.h padconf.h partition.h portio.h \
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priv.h procfs.h profile.h queryparam.h \
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rs.h safecopies.h sched.h sef.h sffs.h \
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sound.h spin.h sys_config.h sysinfo.h \
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34
include/minix/gpio.h
Normal file
34
include/minix/gpio.h
Normal file
@@ -0,0 +1,34 @@
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#ifndef __INCLUDE_GPIO_H__
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#define __INCLUDE_GPIO_H__
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struct gpio
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{
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int nr; /* GPIO number */
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int mode; /* GPIO mode (input=0/output=1) */
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};
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#define GPIO_MODE_INPUT 0
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#define GPIO_MODE_OUTPUT 1
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int gpio_init();
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/* request access to a gpio */
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int gpio_claim(char *owner, int nr, struct gpio **gpio);
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/* Configure the GPIO for a certain purpose */
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int gpio_pin_mode(struct gpio *gpio, int mode);
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/* Set the value for a GPIO */
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int gpio_set(struct gpio *gpio, int value);
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/* Read the current value of the GPIO */
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int gpio_read(struct gpio *gpio, int *value);
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/* Read and clear the value interrupt value of the GPIO */
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int gpio_intr_read(struct gpio *gpio, int *value);
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/* Interrupt hook */
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int gpio_intr_message(message * m);
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int gpio_release();
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#endif /* __INCLUDE_GPIO_H__ */
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117
include/minix/log.h
Normal file
117
include/minix/log.h
Normal file
@@ -0,0 +1,117 @@
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#ifndef __LOG_H__
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#define __LOG_H__
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/*
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* Simple logging functions
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*/
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#include <stdarg.h>
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/*
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* LEVEL_NONE do not log anything.
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* LEVEL_WARN Information that needs to be known.
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* LEVEL_INFO Basic information like startup messages and occasional events.
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* LEVEL_DEBUG debug statements about things happening that are less expected.
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* LEVEL_TRACE Way to much information for anybody.
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*/
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#define LEVEL_NONE 0
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#define LEVEL_WARN 1
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#define LEVEL_INFO 2
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#define LEVEL_DEBUG 3
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#define LEVEL_TRACE 4
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static const char *level_string[5] = {
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"none",
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"warn",
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"info",
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"debug",
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"trace"
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};
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/*
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* struct to be initialized by the user of the logging system.
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*
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* name: The name attribute is used in logging statements do differentiate
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* drivers
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*
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* log_level The level attribute describes the requested logging level. a level
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* of 1 will only print warnings while a level of 4 will print all the trace
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* information.
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*
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* log_func The logging function to use to log, log.h provides default_log
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* to display information on the kernel output buffer. As a bonus if the
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* requested log level is debug or trace the method , file and line number will
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* be printed to the steam.
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*/
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struct log
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{
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const char *name;
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int log_level;
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/* the logging function itself */
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void (*log_func) (struct log * driver,
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int level,
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const char *file,
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const char *function, int line, const char *fmt, ...);
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};
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#define __log(driver,log_level, fmt, args...) \
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((driver)->log_func(driver,log_level, \
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__FILE__, __FUNCTION__, __LINE__,\
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fmt, ## args))
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/* Log a warning */
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#define log_warn(driver, fmt, args...) \
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__log(driver, LEVEL_WARN, fmt, ## args)
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/* Log an information message */
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#define log_info(driver, fmt, args...) \
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__log(driver, LEVEL_INFO, fmt, ## args)
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/* log debugging output */
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#define log_debug(driver, fmt, args...) \
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__log(driver, LEVEL_DEBUG, fmt, ## args)
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/* log trace output */
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#define log_trace(driver, fmt, args...) \
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__log(driver, LEVEL_TRACE, fmt, ## args)
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#endif /* __LOG_H__ */
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static void
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default_log(struct log *driver,
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int level,
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const char *file, const char *function, int line, const char *fmt, ...)
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{
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va_list args;
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if (level > driver->log_level) {
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return;
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}
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/* If the wanted level is debug also display line/method information */
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if (driver->log_level >= LEVEL_DEBUG) {
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fprintf(stderr, "%s(%s):%s+%d(%s):", driver->name,
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level_string[level], file, line, function);
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} else {
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fprintf(stderr, "%s(%s)", driver->name, level_string[level]);
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}
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va_start(args, fmt);
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vfprintf(stderr, fmt, args);
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va_end(args);
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}
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#ifdef hacks
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static void
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hexdump(unsigned char *d, unsigned int size)
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{
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int s;
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for (s = 0; s < size; s += 4) {
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fprintf(stdout, "0x%04x 0x%02X%02X%02X%02X %c%c%c%c\n", s,
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(unsigned int) d[s], (unsigned int) d[s + 1],
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(unsigned int) d[s + 2], (unsigned int) d[s + 3], d[s],
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d[s + 1], d[s + 2], d[s + 3]);
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}
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}
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#endif
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33
include/minix/mmio.h
Normal file
33
include/minix/mmio.h
Normal file
@@ -0,0 +1,33 @@
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#ifndef __MMIO_H__
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#define __MMIO_H__
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#define REG(x)(*((volatile uint32_t *)(x)))
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#define BIT(x)(0x1 << x)
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/* Write a uint32_t value to a memory address. */
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static inline void
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write32(uint32_t address, uint32_t value)
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{
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REG(address) = value;
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}
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/* Read an uint32_t from a memory address */
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static inline uint32_t
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read32(uint32_t address)
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{
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return REG(address);
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}
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/* Set a 32 bits value depending on a mask */
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static inline void
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set32(uint32_t address, uint32_t mask, uint32_t value)
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{
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uint32_t val;
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val = read32(address);
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/* clear the bits */
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val &= ~(mask);
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/* apply the value using the mask */
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val |= (value & mask);
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write32(address, val);
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}
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#endif /* __MMIO_H__ */
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184
include/minix/padconf.h
Normal file
184
include/minix/padconf.h
Normal file
@@ -0,0 +1,184 @@
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#ifndef __PADCONF_H__
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#define __PADCONF_H__
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#define PADCONF_REGISTERS_BASE 0x48002030
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#define PADCONF_MUXMODE(X) (X & 0x7) /* mode 1 til 7 [2:0] */
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#define PADCONF_PULL_MODE(X) ((X & 0x3) << 3) /* 2 bits[4:3] */
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#define PADCONF_PULL_MODE_PD_DIS PADCONF_PULL_MODE(0) /* pull down disabled */
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#define PADCONF_PULL_MODE_PD_EN PADCONF_PULL_MODE(1) /* pull down enabled */
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#define PADCONF_PULL_MODE_PU_DIS PADCONF_PULL_MODE(2) /* pull up enabled */
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#define PADCONF_PULL_MODE_PU_EN PADCONF_PULL_MODE(3) /* pull up enabled */
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#define PADCONF_INPUT_ENABLE(X) ((X & 0x1) << 8) /* 1 bits[8] */
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#define PADCONF_OFF_MODE(X) ((X & 0xFE) << 9) /* 5 bits[13:9] */
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/* padconf pin definitions */
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#define CONTROL_PADCONF_SDRC_D0 (0x00000000)
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#define CONTROL_PADCONF_SDRC_D2 (0x00000004)
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#define CONTROL_PADCONF_SDRC_D4 (0x00000008)
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#define CONTROL_PADCONF_SDRC_D6 (0x0000000C)
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#define CONTROL_PADCONF_SDRC_D8 (0x00000010)
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#define CONTROL_PADCONF_SDRC_D10 (0x00000014)
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#define CONTROL_PADCONF_SDRC_D12 (0x00000018)
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#define CONTROL_PADCONF_SDRC_D14 (0x0000001C)
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#define CONTROL_PADCONF_SDRC_D16 (0x00000020)
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#define CONTROL_PADCONF_SDRC_D18 (0x00000024)
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#define CONTROL_PADCONF_SDRC_D20 (0x00000028)
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#define CONTROL_PADCONF_SDRC_D22 (0x0000002C)
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#define CONTROL_PADCONF_SDRC_D24 (0x00000030)
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#define CONTROL_PADCONF_SDRC_D26 (0x00000034)
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#define CONTROL_PADCONF_SDRC_D28 (0x00000038)
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#define CONTROL_PADCONF_SDRC_D30 (0x0000003C)
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#define CONTROL_PADCONF_SDRC_CLK (0x00000040)
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#define CONTROL_PADCONF_SDRC_DQS1 (0x00000044)
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#define CONTROL_PADCONF_SDRC_DQS3 (0x00000048)
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#define CONTROL_PADCONF_GPMC_A2 (0x0000004C)
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#define CONTROL_PADCONF_GPMC_A4 (0x00000050)
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#define CONTROL_PADCONF_GPMC_A6 (0x00000054)
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#define CONTROL_PADCONF_GPMC_A8 (0x00000058)
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#define CONTROL_PADCONF_GPMC_A10 (0x0000005C)
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#define CONTROL_PADCONF_GPMC_D1 (0x00000060)
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#define CONTROL_PADCONF_GPMC_D3 (0x00000064)
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#define CONTROL_PADCONF_GPMC_D5 (0x00000068)
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#define CONTROL_PADCONF_GPMC_D7 (0x0000006C)
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#define CONTROL_PADCONF_GPMC_D9 (0x00000070)
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#define CONTROL_PADCONF_GPMC_D11 (0x00000074)
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#define CONTROL_PADCONF_GPMC_D13 (0x00000078)
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#define CONTROL_PADCONF_GPMC_D15 (0x0000007C)
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#define CONTROL_PADCONF_GPMC_NCS1 (0x00000080)
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#define CONTROL_PADCONF_GPMC_NCS3 (0x00000084)
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#define CONTROL_PADCONF_GPMC_NCS5 (0x00000088)
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#define CONTROL_PADCONF_GPMC_NCS7 (0x0000008C)
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#define CONTROL_PADCONF_GPMC_NADV_ALE (0x00000090)
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#define CONTROL_PADCONF_GPMC_NWE (0x00000094)
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#define CONTROL_PADCONF_GPMC_NBE1 (0x00000098)
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#define CONTROL_PADCONF_GPMC_WAIT0 (0x0000009C)
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#define CONTROL_PADCONF_GPMC_WAIT2 (0x000000A0)
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#define CONTROL_PADCONF_DSS_PCLK (0x000000A4)
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#define CONTROL_PADCONF_DSS_VSYNC (0x000000A8)
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#define CONTROL_PADCONF_DSS_DATA0 (0x000000AC)
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#define CONTROL_PADCONF_DSS_DATA2 (0x000000B0)
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#define CONTROL_PADCONF_DSS_DATA4 (0x000000B4)
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#define CONTROL_PADCONF_DSS_DATA6 (0x000000B8)
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#define CONTROL_PADCONF_DSS_DATA8 (0x000000BC)
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#define CONTROL_PADCONF_DSS_DATA10 (0x000000C0)
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#define CONTROL_PADCONF_DSS_DATA12 (0x000000C4)
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#define CONTROL_PADCONF_DSS_DATA14 (0x000000C8)
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#define CONTROL_PADCONF_DSS_DATA16 (0x000000CC)
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#define CONTROL_PADCONF_DSS_DATA18 (0x000000D0)
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#define CONTROL_PADCONF_DSS_DATA20 (0x000000D4)
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#define CONTROL_PADCONF_DSS_DATA22 (0x000000D8)
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#define CONTROL_PADCONF_CAM_HS (0x000000DC)
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#define CONTROL_PADCONF_CAM_XCLKA (0x000000E0)
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#define CONTROL_PADCONF_CAM_FLD (0x000000E4)
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#define CONTROL_PADCONF_CAM_D1 (0x000000E8)
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#define CONTROL_PADCONF_CAM_D3 (0x000000EC)
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#define CONTROL_PADCONF_CAM_D5 (0x000000F0)
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#define CONTROL_PADCONF_CAM_D7 (0x000000F4)
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#define CONTROL_PADCONF_CAM_D9 (0x000000F8)
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#define CONTROL_PADCONF_CAM_D11 (0x000000FC)
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#define CONTROL_PADCONF_CAM_WEN (0x00000100)
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#define CONTROL_PADCONF_CSI2_DX0 (0x00000104)
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#define CONTROL_PADCONF_CSI2_DX1 (0x00000108)
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#define CONTROL_PADCONF_MCBSP2_FSX (0x0000010C)
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#define CONTROL_PADCONF_MCBSP2_DR (0x00000110)
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#define CONTROL_PADCONF_MMC1_CLK (0x00000114)
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#define CONTROL_PADCONF_MMC1_DAT0 (0x00000118)
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#define CONTROL_PADCONF_MMC1_DAT2 (0x0000011C)
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#define CONTROL_PADCONF_MMC2_CLK (0x00000128)
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#define CONTROL_PADCONF_MMC2_DAT0 (0x0000012C)
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#define CONTROL_PADCONF_MMC2_DAT2 (0x00000130)
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#define CONTROL_PADCONF_MMC2_DAT4 (0x00000134)
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#define CONTROL_PADCONF_MMC2_DAT6 (0x00000138)
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#define CONTROL_PADCONF_MCBSP3_DX (0x0000013C)
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#define CONTROL_PADCONF_MCBSP3_CLKX (0x00000140)
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#define CONTROL_PADCONF_UART2_CTS (0x00000144)
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#define CONTROL_PADCONF_UART2_TX (0x00000148)
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#define CONTROL_PADCONF_UART1_TX (0x0000014C)
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#define CONTROL_PADCONF_UART1_CTS (0x00000150)
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#define CONTROL_PADCONF_MCBSP4_CLKX (0x00000154)
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#define CONTROL_PADCONF_MCBSP4_DX (0x00000158)
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#define CONTROL_PADCONF_MCBSP1_CLKR (0x0000015C)
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#define CONTROL_PADCONF_MCBSP1_DX (0x00000160)
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#define CONTROL_PADCONF_MCBSP_CLKS (0x00000164)
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#define CONTROL_PADCONF_MCBSP1_CLKX (0x00000168)
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#define CONTROL_PADCONF_UART3_RTS_SD (0x0000016C)
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#define CONTROL_PADCONF_UART3_TX_IRTX (0x00000170)
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#define CONTROL_PADCONF_HSUSB0_STP (0x00000174)
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#define CONTROL_PADCONF_HSUSB0_NXT (0x00000178)
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#define CONTROL_PADCONF_HSUSB0_DATA1 (0x0000017C)
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#define CONTROL_PADCONF_HSUSB0_DATA3 (0x00000180)
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#define CONTROL_PADCONF_HSUSB0_DATA5 (0x00000184)
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#define CONTROL_PADCONF_HSUSB0_DATA7 (0x00000188)
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#define CONTROL_PADCONF_I2C1_SDA (0x0000018C)
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#define CONTROL_PADCONF_I2C2_SDA (0x00000190)
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#define CONTROL_PADCONF_I2C3_SDA (0x00000194)
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#define CONTROL_PADCONF_MCSPI1_CLK (0x00000198)
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#define CONTROL_PADCONF_MCSPI1_SOMI (0x0000019C)
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#define CONTROL_PADCONF_MCSPI1_CS1 (0x000001A0)
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#define CONTROL_PADCONF_MCSPI1_CS3 (0x000001A4)
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#define CONTROL_PADCONF_MCSPI2_SIMO (0x000001A8)
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#define CONTROL_PADCONF_MCSPI2_CS0 (0x000001AC)
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#define CONTROL_PADCONF_SYS_NIRQ (0x000001B0)
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#define CONTROL_PADCONF_SAD2D_MCAD0 (0x000001B4)
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#define CONTROL_PADCONF_SAD2D_MCAD2 (0x000001B8)
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#define CONTROL_PADCONF_SAD2D_MCAD4 (0x000001BC)
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#define CONTROL_PADCONF_SAD2D_MCAD6 (0x000001C0)
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#define CONTROL_PADCONF_SAD2D_MCAD8 (0x000001C4)
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#define CONTROL_PADCONF_SAD2D_MCAD10 (0x000001C8)
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#define CONTROL_PADCONF_SAD2D_MCAD12 (0x000001CC)
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#define CONTROL_PADCONF_SAD2D_MCAD14 (0x000001D0)
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#define CONTROL_PADCONF_SAD2D_MCAD16 (0x000001D4)
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#define CONTROL_PADCONF_SAD2D_MCAD18 (0x000001D8)
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#define CONTROL_PADCONF_SAD2D_MCAD20 (0x000001DC)
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#define CONTROL_PADCONF_SAD2D_MCAD22 (0x000001E0)
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#define CONTROL_PADCONF_SAD2D_MCAD24 (0x000001E4)
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#define CONTROL_PADCONF_SAD2D_MCAD26 (0x000001E8)
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#define CONTROL_PADCONF_SAD2D_MCAD28 (0x000001EC)
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#define CONTROL_PADCONF_SAD2D_MCAD30 (0x000001F0)
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#define CONTROL_PADCONF_SAD2D_MCAD32 (0x000001F4)
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#define CONTROL_PADCONF_SAD2D_MCAD34 (0x000001F8)
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#define CONTROL_PADCONF_SAD2D_MCAD36 (0x000001FC)
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#define CONTROL_PADCONF_SAD2D_NRESPWRON (0x00000200)
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#define CONTROL_PADCONF_SAD2D_ARMNIRQ (0x00000204)
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#define CONTROL_PADCONF_SAD2D_SPINT (0x00000208)
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#define CONTROL_PADCONF_SAD2D_DMAREQ0 (0x0000020C)
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#define CONTROL_PADCONF_SAD2D_DMAREQ2 (0x00000210)
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#define CONTROL_PADCONF_SAD2D_NTRST (0x00000214)
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#define CONTROL_PADCONF_SAD2D_TDO (0x00000218)
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#define CONTROL_PADCONF_SAD2D_TCK (0x0000021C)
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#define CONTROL_PADCONF_SAD2D_MSTDBY (0x00000220)
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#define CONTROL_PADCONF_SAD2D_IDLEACK (0x00000224)
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#define CONTROL_PADCONF_SAD2D_SWRITE (0x00000228)
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#define CONTROL_PADCONF_SAD2D_SREAD (0x0000022C)
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#define CONTROL_PADCONF_SAD2D_SBUSFLAG (0x00000230)
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#define CONTROL_PADCONF_SDRC_CKE1 (0x00000234)
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#define CONTROL_PADCONF_SDRC_BA0 (0x00000570)
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#define CONTROL_PADCONF_SDRC_A0 (0x00000574)
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#define CONTROL_PADCONF_SDRC_A2 (0x00000578)
|
||||
#define CONTROL_PADCONF_SDRC_A4 (0x0000057C)
|
||||
#define CONTROL_PADCONF_SDRC_A6 (0x00000580)
|
||||
#define CONTROL_PADCONF_SDRC_A8 (0x00000584)
|
||||
#define CONTROL_PADCONF_SDRC_A10 (0x00000588)
|
||||
#define CONTROL_PADCONF_SDRC_A12 (0x0000058C)
|
||||
#define CONTROL_PADCONF_SDRC_A14 (0x00000590)
|
||||
#define CONTROL_PADCONF_SDRC_NCS1 (0x00000594)
|
||||
#define CONTROL_PADCONF_SDRC_NRAS (0x00000598)
|
||||
#define CONTROL_PADCONF_SDRC_NWE (0x0000059C)
|
||||
#define CONTROL_PADCONF_SDRC_DM1 (0x000005A0)
|
||||
#define CONTROL_PADCONF_SDRC_DM3 (0x000005A4)
|
||||
#define CONTROL_PADCONF_ETK_CLK (0x000005A8)
|
||||
#define CONTROL_PADCONF_ETK_D0 (0x000005AC)
|
||||
#define CONTROL_PADCONF_ETK_D2 (0x000005B0)
|
||||
#define CONTROL_PADCONF_ETK_D4 (0x000005B4)
|
||||
#define CONTROL_PADCONF_ETK_D6 (0x000005B8)
|
||||
#define CONTROL_PADCONF_ETK_D8 (0x000005BC)
|
||||
#define CONTROL_PADCONF_ETK_D10 (0x000005C0)
|
||||
#define CONTROL_PADCONF_ETK_D12 (0x000005C4)
|
||||
#define CONTROL_PADCONF_ETK_D14 (0x000005C8)
|
||||
|
||||
int padconf_init();
|
||||
int padconf_set(u32_t padconf, u32_t mask, u32_t value);
|
||||
int padconf_release();
|
||||
|
||||
#endif /* __PADCONF_H__ */
|
||||
Reference in New Issue
Block a user