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i2c: initial bus drivers for am335x and dm37xx

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Change-Id: I478704fbf30dbf6d3382bcbfb11e75b512c032a1
This commit is contained in:
Thomas Cort
2013-07-15 10:29:09 -04:00
parent 2dab6a5384
commit 550fdfb443
22 changed files with 1968 additions and 7 deletions
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2
include/minix/Makefile
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@@ -11,7 +11,7 @@ INCS+= acpi.h audio_fw.h bitmap.h \
debug.h devio.h devman.h dmap.h \
driver.h drivers.h drvlib.h ds.h \
endpoint.h fb.h fslib.h gpio.h gcov.h hash.h \
hgfs.h ioctl.h input.h ipc.h ipcconst.h \
hgfs.h i2c.h ioctl.h input.h ipc.h ipcconst.h \
keymap.h log.h mmio.h mount.h mthread.h minlib.h \
netdriver.h optset.h padconf.h partition.h portio.h \
priv.h procfs.h profile.h queryparam.h \

11
include/minix/clkconf.h
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@@ -1,7 +1,18 @@
#ifndef _CLKCONF_H
#define _CLKCONF_H
/* Clock configuration */
#define CM_FCLKEN1_CORE 0xA00
#define CM_ICLKEN1_CORE 0xA10
#define CM_FCLKEN_WKUP 0xC00
#define CM_ICLKEN_WKUP 0xC10
#define CM_PER_I2C2_CLKCTRL 0x044
#define CM_PER_I2C1_CLKCTRL 0x048
#define CM_WKUP_I2C0_CLKCTRL 0x4B8
int clkconf_init();
int clkconf_set(u32_t clk, u32_t mask, u32_t value);
int clkconf_release();
#endif

2
include/minix/com.h
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@@ -180,6 +180,8 @@
* a segment of memory
*/
#define BUSC_I2C_RESERVE (BUSC_RQ_BASE + 64) /* reserve i2c device */
#define BUSC_I2C_EXEC (BUSC_RQ_BASE + 65) /* perform i2c action */
/*===========================================================================*
* Messages for CHARACTER device drivers *

3
include/minix/dmap.h
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@@ -39,6 +39,9 @@ enum dev_style { STYLE_NDEV, STYLE_DEV, STYLE_DEVA, STYLE_TTY, STYLE_CTTY,
#define HELLO_MAJOR 17 /* 17 = /dev/hello (hello driver) */
#define UDS_MAJOR 18 /* 18 = /dev/uds (pfs) */
#define FB_MAJOR 19 /* 18 = /dev/fb0 (fb driver) */
#define I2C0_MAJOR 20 /* 20 = /dev/i2c-1 (i2c-dev) */
#define I2C1_MAJOR 21 /* 21 = /dev/i2c-2 (i2c-dev) */
#define I2C2_MAJOR 22 /* 22 = /dev/i2c-3 (i2c-dev) */
/* Minor device numbers for memory driver. */

26
include/minix/i2c.h Normal file
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@@ -0,0 +1,26 @@
#ifndef __MINIX_I2C_H
#define __MINIX_I2C_H
/*
* Minix I2C /dev Interface.
*
* Same as NetBSD/OpenBSD interface but with a flat struct (i.e. no pointers).
* The NetBSD/OpenBSD interface can still be used on i2c device files. The
* ioctl(2) function will translate to/from the Minix version of the struct.
*/
#include <minix/ioctl.h>
#include <dev/i2c/i2c_io.h>
typedef struct minix_i2c_ioctl_exec {
i2c_op_t iie_op; /* operation to perform */
i2c_addr_t iie_addr; /* address of device */
uint8_t iie_cmd[I2C_EXEC_MAX_CMDLEN]; /* pointer to command */
size_t iie_cmdlen; /* length of command */
uint8_t iie_buf[I2C_EXEC_MAX_BUFLEN]; /* pointer to data buffer */
size_t iie_buflen; /* length of data buffer */
} minix_i2c_ioctl_exec_t;
#define MINIX_I2C_IOCTL_EXEC _IORW('I', 1, minix_i2c_ioctl_exec_t)
#endif /* __MINIX_I2C_H */

139
include/minix/padconf.h
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@@ -1,13 +1,17 @@
#ifndef __PADCONF_H__
#define __PADCONF_H__
#ifdef AM335X
#define PADCONF_REGISTERS_BASE 0x44E10000
#elif DM37XX
#define PADCONF_REGISTERS_BASE 0x48002030
#endif
#define PADCONF_MUXMODE(X) (X & 0x7) /* mode 1 til 7 [2:0] */
#define PADCONF_PULL_MODE(X) ((X & 0x3) << 3) /* 2 bits[4:3] */
#define PADCONF_PULL_MODE_PD_DIS PADCONF_PULL_MODE(0) /* pull down disabled */
#define PADCONF_PULL_MODE_PD_EN PADCONF_PULL_MODE(1) /* pull down enabled */
#define PADCONF_PULL_MODE_PU_DIS PADCONF_PULL_MODE(2) /* pull up enabled */
#define PADCONF_PULL_MODE_PU_DIS PADCONF_PULL_MODE(2) /* pull up disabled */
#define PADCONF_PULL_MODE_PU_EN PADCONF_PULL_MODE(3) /* pull up enabled */
#define PADCONF_INPUT_ENABLE(X) ((X & 0x1) << 8) /* 1 bits[8] */
#define PADCONF_OFF_MODE(X) ((X & 0xFE) << 9) /* 5 bits[13:9] */
@@ -177,6 +181,139 @@
#define CONTROL_PADCONF_ETK_D12 (0x000005C4)
#define CONTROL_PADCONF_ETK_D14 (0x000005C8)
/* conf pin descriptions (am335x) */
#define CONTROL_CONF_GPMC_AD0 (0x00000800)
#define CONTROL_CONF_GPMC_AD1 (0x00000804)
#define CONTROL_CONF_GPMC_AD2 (0x00000808)
#define CONTROL_CONF_GPMC_AD3 (0x0000080C)
#define CONTROL_CONF_GPMC_AD4 (0x00000810)
#define CONTROL_CONF_GPMC_AD5 (0x00000814)
#define CONTROL_CONF_GPMC_AD6 (0x00000818)
#define CONTROL_CONF_GPMC_AD7 (0x0000081C)
#define CONTROL_CONF_GPMC_AD8 (0x00000820)
#define CONTROL_CONF_GPMC_AD9 (0x00000824)
#define CONTROL_CONF_GPMC_AD10 (0x00000828)
#define CONTROL_CONF_GPMC_AD11 (0x0000082C)
#define CONTROL_CONF_GPMC_AD12 (0x00000830)
#define CONTROL_CONF_GPMC_AD13 (0x00000834)
#define CONTROL_CONF_GPMC_AD14 (0x00000838)
#define CONTROL_CONF_GPMC_AD15 (0x0000083C)
#define CONTROL_CONF_GPMC_A0 (0x00000840)
#define CONTROL_CONF_GPMC_A1 (0x00000844)
#define CONTROL_CONF_GPMC_A2 (0x00000848)
#define CONTROL_CONF_GPMC_A3 (0x0000084C)
#define CONTROL_CONF_GPMC_A4 (0x00000850)
#define CONTROL_CONF_GPMC_A5 (0x00000854)
#define CONTROL_CONF_GPMC_A6 (0x00000858)
#define CONTROL_CONF_GPMC_A7 (0x0000085C)
#define CONTROL_CONF_GPMC_A8 (0x00000860)
#define CONTROL_CONF_GPMC_A9 (0x00000864)
#define CONTROL_CONF_GPMC_A10 (0x00000868)
#define CONTROL_CONF_GPMC_A11 (0x0000086C)
#define CONTROL_CONF_GPMC_WAIT0 (0x00000870)
#define CONTROL_CONF_GPMC_WPN (0x00000874)
#define CONTROL_CONF_GPMC_BEN1 (0x00000878)
#define CONTROL_CONF_GPMC_CSN0 (0x0000087C)
#define CONTROL_CONF_GPMC_CSN1 (0x00000880)
#define CONTROL_CONF_GPMC_CSN2 (0x00000884)
#define CONTROL_CONF_GPMC_CSN3 (0x00000888)
#define CONTROL_CONF_GPMC_CLK (0x0000088C)
#define CONTROL_CONF_GPMC_ADVN_ALE (0x00000890)
#define CONTROL_CONF_GPMC_OEN_REN (0x00000894)
#define CONTROL_CONF_GPMC_WEN (0x00000898)
#define CONTROL_CONF_GPMC_BEN0_CLE (0x0000089C)
#define CONTROL_CONF_LCD_DATA0 (0x000008A0)
#define CONTROL_CONF_LCD_DATA1 (0x000008A4)
#define CONTROL_CONF_LCD_DATA2 (0x000008A8)
#define CONTROL_CONF_LCD_DATA3 (0x000008AC)
#define CONTROL_CONF_LCD_DATA4 (0x000008B0)
#define CONTROL_CONF_LCD_DATA5 (0x000008B4)
#define CONTROL_CONF_LCD_DATA6 (0x000008B8)
#define CONTROL_CONF_LCD_DATA7 (0x000008BC)
#define CONTROL_CONF_LCD_DATA8 (0x000008C0)
#define CONTROL_CONF_LCD_DATA9 (0x000008C4)
#define CONTROL_CONF_LCD_DATA10 (0x000008C8)
#define CONTROL_CONF_LCD_DATA11 (0x000008CC)
#define CONTROL_CONF_LCD_DATA12 (0x000008D0)
#define CONTROL_CONF_LCD_DATA13 (0x000008D4)
#define CONTROL_CONF_LCD_DATA14 (0x000008D8)
#define CONTROL_CONF_LCD_DATA15 (0x000008DC)
#define CONTROL_CONF_LCD_VSYNC (0x000008E0)
#define CONTROL_CONF_LCD_HSYNC (0x000008E4)
#define CONTROL_CONF_LCD_PCLK (0x000008E8)
#define CONTROL_CONF_LCD_AC_BIAS_EN (0x000008EC)
#define CONTROL_CONF_MMC0_DAT3 (0x000008F0)
#define CONTROL_CONF_MMC0_DAT2 (0x000008F4)
#define CONTROL_CONF_MMC0_DAT1 (0x000008F8)
#define CONTROL_CONF_MMC0_DAT0 (0x000008FC)
#define CONTROL_CONF_MMC0_CLK (0x00000900)
#define CONTROL_CONF_MMC0_CMD (0x00000904)
#define CONTROL_CONF_MII1_COL (0x00000908)
#define CONTROL_CONF_MII1_CRS (0x0000090C)
#define CONTROL_CONF_MII1_RX_ER (0x00000910)
#define CONTROL_CONF_MII1_TX_EN (0x00000914)
#define CONTROL_CONF_MII1_RX_DV (0x00000918)
#define CONTROL_CONF_MII1_TXD3 (0x0000091C)
#define CONTROL_CONF_MII1_TXD2 (0x00000920)
#define CONTROL_CONF_MII1_TXD1 (0x00000924)
#define CONTROL_CONF_MII1_TXD0 (0x00000928)
#define CONTROL_CONF_MII1_TX_CLK (0x0000092C)
#define CONTROL_CONF_MII1_RX_CLK (0x00000930)
#define CONTROL_CONF_MII1_RXD3 (0x00000934)
#define CONTROL_CONF_MII1_RXD2 (0x00000938)
#define CONTROL_CONF_MII1_RXD1 (0x0000093C)
#define CONTROL_CONF_MII1_RXD0 (0x00000940)
#define CONTROL_CONF_RMII1_REF_CLK (0x00000944)
#define CONTROL_CONF_MDIO (0x00000948)
#define CONTROL_CONF_MDC (0x0000094C)
#define CONTROL_CONF_SPI0_SCLK (0x00000950)
#define CONTROL_CONF_SPI0_D0 (0x00000954)
#define CONTROL_CONF_SPI0_D1 (0x00000958)
#define CONTROL_CONF_SPI0_CS0 (0x0000095C)
#define CONTROL_CONF_SPI0_CS1 (0x00000960)
#define CONTROL_CONF_ECAP0_IN_PWM0_OUT (0x00000964)
#define CONTROL_CONF_UART0_CTSN (0x00000968)
#define CONTROL_CONF_UART0_RTSN (0x0000096C)
#define CONTROL_CONF_UART0_RXD (0x00000970)
#define CONTROL_CONF_UART0_TXD (0x00000974)
#define CONTROL_CONF_UART1_CTSN (0x00000978)
#define CONTROL_CONF_UART1_RTSN (0x0000097C)
#define CONTROL_CONF_UART1_RXD (0x00000980)
#define CONTROL_CONF_UART1_TXD (0x00000984)
#define CONTROL_CONF_I2C0_SDA (0x00000988)
#define CONTROL_CONF_I2C0_SCL (0x0000098C)
#define CONTROL_CONF_MCASP0_ACLKX (0x00000990)
#define CONTROL_CONF_MCASP0_FSX (0x00000994)
#define CONTROL_CONF_MCASP0_AXR0 (0x00000998)
#define CONTROL_CONF_MCASP0_AHCLKR (0x0000099C)
#define CONTROL_CONF_MCASP0_ACLKR (0x000009A0)
#define CONTROL_CONF_MCASP0_FSR (0x000009A4)
#define CONTROL_CONF_MCASP0_AXR1 (0x000009A8)
#define CONTROL_CONF_MCASP0_AHCLKX (0x000009AC)
#define CONTROL_CONF_XDMA_EVENT_INTR0 (0x000009B0)
#define CONTROL_CONF_XDMA_EVENT_INTR1 (0x000009B4)
#define CONTROL_CONF_WARMRSTN (0x000009B8)
#define CONTROL_CONF_NNMI (0x000009C0)
#define CONTROL_CONF_TMS (0x000009D0)
#define CONTROL_CONF_TDI (0x000009D4)
#define CONTROL_CONF_TDO (0x000009D8)
#define CONTROL_CONF_TCK (0x000009DC)
#define CONTROL_CONF_TRSTN (0x000009E0)
#define CONTROL_CONF_EMU0 (0x000009E4)
#define CONTROL_CONF_EMU1 (0x000009E8)
#define CONTROL_CONF_RTC_PWRONRSTN (0x000009F8)
#define CONTROL_CONF_PMIC_POWER_EN (0x000009FC)
#define CONTROL_CONF_EXT_WAKEUP (0x00000A00)
#define CONTROL_CONF_RTC_KALDO_ENN (0x00000A04)
#define CONTROL_CONF_USB0_DRVVBUS (0x00000A1C)
#define CONTROL_CONF_USB1_DRVVBUS (0x00000A34)
#define CONTROL_CONF_SLEWCTRL (1<<6)
#define CONTROL_CONF_RXACTIVE (1<<5)
#define CONTROL_CONF_PUTYPESEL (1<<4)
#define CONTROL_CONF_PUDEN (1<<3)
#define CONTROL_CONF_MUXMODE(X) (X&0x7)
int padconf_init();
int padconf_set(u32_t padconf, u32_t mask, u32_t value);
int padconf_release();