SMP - We boot APs

- kernel detects CPUs by searching ACPI tables for local apic nodes

- each CPU has its own TSS that points to its own stack. All cpus boot
  on the same boot stack (in sequence) but switch to its private stack
  as soon as they can.

- final booting code in main() placed in bsp_finish_booting() which is
  executed only after the BSP switches to its final stack

- apic functions to send startup interrupts

- assembler functions to handle CPU features not needed for single cpu
  mode like memory barries, HT detection etc.

- new files kernel/smp.[ch], kernel/arch/i386/arch_smp.c and
  kernel/arch/i386/include/arch_smp.h

- 16-bit trampoline code for the APs. It is executed by each AP after
  receiving startup IPIs it brings up the CPUs to 32bit mode and let
  them spin in an infinite loop so they don't do any damage.

- implementation of kernel spinlock

- CONFIG_SMP and CONFIG_MAX_CPUS set by the build system

kernel/arch/i386/memory.c

@@ -27,6 +27,8 @@
 #endif
 #endif
 
+PUBLIC int i386_paging_enabled = 0;
+
 PRIVATE int psok = 0;
 
 #define MAX_FREEPDES (3 * CONFIG_MAX_CPUS)
@@ -935,8 +937,10 @@ void i386_freepde(const int pde)
 
 PRIVATE int oxpcie_mapping_index = -1;
 
-PUBLIC int arch_phys_map(const int index, phys_bytes *addr,
-  phys_bytes *len, int *flags)
+PUBLIC int arch_phys_map(const int index,
+			phys_bytes *addr,
+			phys_bytes *len,
+			int *flags)
 {
 	static int first = 1;
 	int freeidx = 0;
@@ -1079,7 +1083,12 @@ PUBLIC int arch_enable_paging(struct proc * caller, const message * m_ptr)
 			io_apic[i].addr = io_apic[i].vaddr;
 		}
 	}
+
+	/* TODO APs are still waiting, release them */
 #endif
+
+	i386_paging_enabled = 1;
+
 #ifdef CONFIG_WATCHDOG
 	/*
 	 * We make sure that we don't enable the watchdog until paging is turned