Initial revision
This commit is contained in:
Ben Gras
55
include/ibm/bios.h
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55
include/ibm/bios.h
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/* BIOS definitions. Each BIOS entry has an index that is to be used with the
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* sys_bioscopy() system call. The raw addresses, sizes, and magic numbers
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* are defined here as well. The values that are defined here were collected
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* from various kernel files in MINIX 2.0.4.
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*
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* Author: Jorrit N. Herder
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*/
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#ifndef _BIOS_H
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#define _BIOS_H
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/* Memory check (is stopped on reboot). */
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#define BIOS_MEM_CHECK 0 /* address to stop memory check */
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#define ADR_MEM_CHECK 0x472L
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#define LEN_MEM_CHECK 1L
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#define STOP_MEM_CHECK 0x1234 /* magic number to stop memory check */
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/* Centronics printers. */
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#define BIOS_PRN_PORTBASE 1 /* base of printer ports */
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#define ADR_PRN_PORTBASE 0x408L
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#define LEN_PRN_PORTBASE 2L
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/* Hard disk parameter vectors. */
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#define BIOS_WINI_PARAMS 2 /* number of hard disk drives */
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#define ADR_WINI_PARAMS 0x475L
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#define LEN_WINI_PARAMS 1L
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#define BIOS_WINI_0_PARM_VEC 3 /* disk 0 parameters */
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#define ADR_WINI_0_PARM_VEC 0x41*4L
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#define LEN_WINI_0_PARM_VEC 4L
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#define BIOS_WINI_1_PARM_VEC 4 /* disk 1 parameters */
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#define ADR_WINI_1_PARM_VEC 0x46*4L
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#define LEN_WINI_1_PARM_VEC 4L
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/* Video controller (VDU). */
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#define BIOS_VDU_COLUMNS 5
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#define ADR_VDU_COLUMNS 0x44AL
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#define LEN_VDU_COLUMNS 2L
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#define BIOS_VDU_CRTBASE 6
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#define ADR_VDU_CRTBASE 0x463L
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#define LEN_VDU_CRTBASE 2L
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#define BIOS_VDU_ROWS 7
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#define ADR_VDU_ROWS 0x484L
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#define LEN_VDU_ROWS 1L
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#define BIOS_VDU_FONTLINES 8
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#define ADR_VDU_FONTLINES 0x485L
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#define LEN_VDU_FONTLINES 2L
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/* Machine ID. */
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#define BIOS_MACHINE_ID 9
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#define ADR_MACHINE_ID 0xFFFFEL
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#define LEN_MACHINE_ID 1L
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#define PS_386_MACHINE 0xF8 /* Machine ID byte for PS/2 model 80 */
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#define PC_AT_MACHINE 0xFC /* PC/AT, PC/XT286, PS/2 models 50/60 */
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#endif /* _BIOS_H */
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86
include/ibm/cmos.h
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86
include/ibm/cmos.h
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/*
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ibm/cmos.h
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Created: Dec 1998 by Philip Homburg <philip@cs.vu.nl>
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Definitions for the CMOS/realtime clock. Based on the datasheet for the
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Dallas DS12887, compatible with the Motorola MC146818
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*/
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#define RTC_INDEX 0x70 /* Bit 7 = NMI enable (1) / disable (0)
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* bits 0..6 index
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*/
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#define RTC_IO 0x71 /* Data register,
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* Note: the operation following a write to
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* RTC_INDEX should an access (read or write)
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* to RTC_IO
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*/
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#define RTC_SEC 0x0 /* Seconds register */
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#define RTC_SEC_ALRM 0x1 /* Seconds register for alarm */
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#define RTC_MIN 0x2 /* Minutes register */
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#define RTC_MIN_ALRM 0x3 /* Minutes register for alarm */
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#define RTC_HOUR 0x4 /* Hours register */
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#define RTC_HOUR_ALRM 0x5 /* Hours register for alarm */
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#define RTC_WDAY 0x6 /* Day of the week, 1..7, Sunday = 1 */
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#define RTC_MDAY 0x7 /* Day of the month, 1..31 */
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#define RTC_MONTH 0x8 /* Month, 1..12 */
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#define RTC_YEAR 0x9 /* Year, 0..99 */
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#define RTC_REG_A 0xA
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#define RTC_A_UIP 0x80 /* Update in progress. When clear,
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* no update will occur for 244
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* micro seconds.
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*/
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#define RTC_A_DV 0x70 /* Divider bits, valid values are: */
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#define RTC_A_DV_OK 0x20 /* Normal */
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#define RTC_A_DV_STOP 0x70 /* Stop, a re-start starts
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* halfway through a cycle,
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* i.e. the update occurs after
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* 500ms.
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*/
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#define RTC_A_RS 0x0F /* Int. freq */
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/* 0 None
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* 1 256 Hz
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* 2 128 Hz
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* 3 8192 Hz
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* 4 4096 Hz
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* 5 2048 Hz
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* 6 1024 Hz
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* 7 512 Hz
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* 8 256 Hz
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* 9 128 Hz
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* 10 64 Hz
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* 11 32 Hz
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* 12 16 Hz
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* 13 8 Hz
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* 14 4 Hz
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* 15 2 Hz
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*/
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#define RTC_A_RS_DEF 6 /* Default freq. */
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#define RTC_REG_B 0xB
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#define RTC_B_SET 0x80 /* Inhibit updates */
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#define RTC_B_PIE 0x40 /* Enable periodic interrupts */
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#define RTC_B_AIE 0x20 /* Enable alarm interrupts */
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#define RTC_B_UIE 0x10 /* Enable update ended interrupts */
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#define RTC_B_SQWE 0x08 /* Enable square wave output */
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#define RTC_B_DM_BCD 0x04 /* Data is in BCD (otherwise binary) */
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#define RTC_B_24 0x02 /* Count hours in 24-hour mode */
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#define RTC_B_DSE 0x01 /* Automatic (wrong) daylight savings
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* updates
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*/
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#define RTC_REG_C 0xC
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/* Contents of the general purpose CMOS RAM (source IBM reference manual) */
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#define CMOS_STATUS 0xE
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#define CS_LOST_POWER 0x80 /* Chip lost power */
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#define CS_BAD_CHKSUM 0x40 /* Checksum is incorrect */
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#define CS_BAD_CONFIG 0x20 /* Bad configuration info */
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#define CS_BAD_MEMSIZE 0x10 /* Wrong memory size of CMOS */
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#define CS_BAD_HD 0x08 /* Harddisk failed */
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#define CS_BAD_TIME 0x04 /* CMOS time is invalid */
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/* bits 0 and 1 are reserved */
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/*
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* $PchId: cmos.h,v 1.1 1998/12/16 09:14:21 philip Exp $
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*/
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20
include/ibm/diskparm.h
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20
include/ibm/diskparm.h
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/* PC (and AT) BIOS structure to hold disk parameters. Under Minix, it is
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* used mainly for formatting.
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*/
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#ifndef _DISKPARM_H
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#define _DISKPARM_H
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struct disk_parameter_s {
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char spec1;
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char spec2;
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char motor_turnoff_sec;
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char sector_size_code;
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char sectors_per_cylinder;
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char gap_length;
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char dtl;
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char gap_length_for_format;
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char fill_byte_for_format;
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char head_settle_msec;
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char motor_start_eigth_sec;
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};
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#endif /* _DISKPARM_H */
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63
include/ibm/int86.h
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63
include/ibm/int86.h
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/* int86.h - 8086 interrupt types Author: Kees J. Bot
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* 3 May 2000
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*/
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/* Registers used in an PC real mode call for BIOS or DOS services. A
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* driver is called through the vector if the interrupt number is zero.
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*/
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union reg86 {
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struct l {
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u32_t ef; /* 32 bit flags (output only) */
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u32_t vec; /* Driver vector (input only) */
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u32_t _ds_es[1];
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u32_t eax; /* 32 bit general registers */
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u32_t ebx;
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u32_t ecx;
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u32_t edx;
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u32_t esi;
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u32_t edi;
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u32_t ebp;
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} l;
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struct w {
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u16_t f, _ef[1]; /* 16 bit flags (output only) */
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u16_t off, seg; /* Driver vector (input only) */
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u16_t ds, es; /* DS and ES real mode segment regs */
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u16_t ax, _eax[1]; /* 16 bit general registers */
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u16_t bx, _ebx[1];
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u16_t cx, _ecx[1];
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u16_t dx, _edx[1];
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u16_t si, _esi[1];
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u16_t di, _edi[1];
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u16_t bp, _ebp[1];
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} w;
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struct b {
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u8_t intno, _intno[3]; /* Interrupt number (input only) */
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u8_t _vec[4];
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u8_t _ds_es[4];
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u8_t al, ah, _eax[2]; /* 8 bit general registers */
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u8_t bl, bh, _ebx[2];
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u8_t cl, ch, _ecx[2];
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u8_t dl, dh, _edx[2];
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u8_t _esi[4];
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u8_t _edi[4];
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u8_t _ebp[4];
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} b;
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};
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#ifdef _SYSTEM /* Kernel: Registers used in an 8086 interrupt */
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EXTERN union reg86 reg86;
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#endif
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/* Parameters passed on ioctls to the memory task. */
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struct mio_int86 { /* MIOCINT86 */
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union reg86 reg86; /* x86 registers as above */
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u16_t off, seg; /* Address of kernel buffer */
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void *buf; /* User data buffer */
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size_t len; /* Size of user buffer */
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};
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struct mio_ldt86 { /* MIOCGLDT86, MIOCSLDT86 */
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size_t idx; /* Index in process' LDT */
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u16_t entry[4]; /* One LDT entry to get or set. */
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};
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62
include/ibm/interrupt.h
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62
include/ibm/interrupt.h
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/* Interrupt numbers and hardware vectors. */
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#ifndef _INTERRUPT_H
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#define _INTERRUPT_H
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#if (CHIP == INTEL)
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/* 8259A interrupt controller ports. */
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#define INT_CTL 0x20 /* I/O port for interrupt controller */
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#define INT_CTLMASK 0x21 /* setting bits in this port disables ints */
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#define INT2_CTL 0xA0 /* I/O port for second interrupt controller */
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#define INT2_CTLMASK 0xA1 /* setting bits in this port disables ints */
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/* Magic numbers for interrupt controller. */
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#define ENABLE 0x20 /* code used to re-enable after an interrupt */
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/* Interrupt vectors defined/reserved by processor. */
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#define DIVIDE_VECTOR 0 /* divide error */
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#define DEBUG_VECTOR 1 /* single step (trace) */
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#define NMI_VECTOR 2 /* non-maskable interrupt */
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#define BREAKPOINT_VECTOR 3 /* software breakpoint */
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#define OVERFLOW_VECTOR 4 /* from INTO */
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/* Fixed system call vector. */
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#define SYS_VECTOR 32 /* system calls are made with int SYSVEC */
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#define SYS386_VECTOR 33 /* except 386 system calls use this */
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#define LEVEL0_VECTOR 34 /* for execution of a function at level 0 */
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/* Suitable irq bases for hardware interrupts. Reprogram the 8259(s) from
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* the PC BIOS defaults since the BIOS doesn't respect all the processor's
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* reserved vectors (0 to 31).
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*/
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#define BIOS_IRQ0_VEC 0x08 /* base of IRQ0-7 vectors used by BIOS */
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#define BIOS_IRQ8_VEC 0x70 /* base of IRQ8-15 vectors used by BIOS */
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#define IRQ0_VECTOR 0x50 /* nice vectors to relocate IRQ0-7 to */
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#define IRQ8_VECTOR 0x70 /* no need to move IRQ8-15 */
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/* Hardware interrupt numbers. */
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#define NR_IRQ_VECTORS 16
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#define CLOCK_IRQ 0
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#define KEYBOARD_IRQ 1
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#define CASCADE_IRQ 2 /* cascade enable for 2nd AT controller */
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#define ETHER_IRQ 3 /* default ethernet interrupt vector */
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#define SECONDARY_IRQ 3 /* RS232 interrupt vector for port 2 */
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#define RS232_IRQ 4 /* RS232 interrupt vector for port 1 */
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#define XT_WINI_IRQ 5 /* xt winchester */
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#define FLOPPY_IRQ 6 /* floppy disk */
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#define PRINTER_IRQ 7
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#define AT_WINI_0_IRQ 14 /* at winchester controller 0 */
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#define AT_WINI_1_IRQ 15 /* at winchester controller 1 */
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/* Interrupt number to hardware vector. */
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#define BIOS_VECTOR(irq) \
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(((irq) < 8 ? BIOS_IRQ0_VEC : BIOS_IRQ8_VEC) + ((irq) & 0x07))
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#define VECTOR(irq) \
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(((irq) < 8 ? IRQ0_VECTOR : IRQ8_VECTOR) + ((irq) & 0x07))
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#endif /* (CHIP == INTEL) */
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#endif /* _INTERRUPT_H */
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26
include/ibm/partition.h
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26
include/ibm/partition.h
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@@ -0,0 +1,26 @@
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/* Description of entry in partition table. */
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#ifndef _PARTITION_H
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#define _PARTITION_H
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struct part_entry {
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unsigned char bootind; /* boot indicator 0/ACTIVE_FLAG */
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unsigned char start_head; /* head value for first sector */
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unsigned char start_sec; /* sector value + cyl bits for first sector */
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unsigned char start_cyl; /* track value for first sector */
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unsigned char sysind; /* system indicator */
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unsigned char last_head; /* head value for last sector */
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unsigned char last_sec; /* sector value + cyl bits for last sector */
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unsigned char last_cyl; /* track value for last sector */
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unsigned long lowsec; /* logical first sector */
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unsigned long size; /* size of partition in sectors */
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};
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#define ACTIVE_FLAG 0x80 /* value for active in bootind field (hd0) */
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#define NR_PARTITIONS 4 /* number of entries in partition table */
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#define PART_TABLE_OFF 0x1BE /* offset of partition table in boot sector */
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/* Partition types. */
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#define NO_PART 0x00 /* unused entry */
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#define MINIX_PART 0x81 /* Minix partition type */
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#endif /* _PARTITION_H */
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29
include/ibm/portio.h
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29
include/ibm/portio.h
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@@ -0,0 +1,29 @@
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/*
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ibm/portio.h
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Created: Jan 15, 1992 by Philip Homburg
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*/
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#ifndef _PORTIO_H_
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#define _PORTIO_H_
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#ifndef _TYPES_H
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#include <sys/types.h>
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#endif
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unsigned inb(U16_t _port);
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unsigned inw(U16_t _port);
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unsigned inl(U32_t _port);
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void outb(U16_t _port, U8_t _value);
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void outw(U16_t _port, U16_t _value);
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void outl(U16_t _port, U32_t _value);
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void insb(U16_t _port, void *_buf, size_t _count);
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void insw(U16_t _port, void *_buf, size_t _count);
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void insl(U16_t _port, void *_buf, size_t _count);
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void outsb(U16_t _port, void *_buf, size_t _count);
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void outsw(U16_t _port, void *_buf, size_t _count);
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void outsl(U16_t _port, void *_buf, size_t _count);
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void intr_disable(void);
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void intr_enable(void);
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#endif /* _PORTIO_H_ */
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17
include/ibm/ports.h
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17
include/ibm/ports.h
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@@ -0,0 +1,17 @@
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/* Addresses and magic numbers for miscellaneous ports. */
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#ifndef _PORTS_H
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#define _PORTS_H
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#if (CHIP == INTEL)
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/* Miscellaneous ports. */
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#define PCR 0x65 /* Planar Control Register */
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#define PORT_B 0x61 /* I/O port for 8255 port B (kbd, beeper...) */
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#define TIMER0 0x40 /* I/O port for timer channel 0 */
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#define TIMER2 0x42 /* I/O port for timer channel 2 */
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#define TIMER_MODE 0x43 /* I/O port for timer mode control */
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#endif /* (CHIP == INTEL) */
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#endif /* _PORTS_H */
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