SMP - BSP waits until the APs finish their booting

- APs configure local timers

- while configuring local APIC timer the CPUs fiddle with the interrupt
  handlers. As the interrupt table is shared the BSP must not run

kernel/arch/i386/include/arch_proto.h

@@ -172,6 +172,9 @@ extern void * k_stacks;
 #define get_k_stack_top(cpu)	((void *)(((char*)(k_stacks)) \
 					+ 2 * ((cpu) + 1) * K_STACK_SIZE))
 
+#define barrier()	do { mfence(); } while(0)
+
+
 #ifndef __GNUC__
 /* call a function to read the stack fram pointer (%ebp) */
 _PROTOTYPE(reg_t read_ebp, (void));