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Use int64 functions consistently

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Instead of manipulating the u64_t type directly, use the
ex64hi()/ex64lo()/make64() functions.
This commit is contained in:
Arun Thomas
2010-11-07 23:35:29 +00:00
parent a575be430d
commit aaaad89244
8 changed files with 41 additions and 40 deletions
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24
kernel/arch/i386/apic.c
View File

@@ -570,13 +570,12 @@ PRIVATE u32_t lapic_errstatus(void)
PRIVATE int lapic_disable_in_msr(void)
{
u64_t msr;
u32_t addr;
u32_t addr, msr_hi, msr_lo;
ia32_msr_read(IA32_APIC_BASE, &msr.hi, &msr.lo);
ia32_msr_read(IA32_APIC_BASE, &msr_hi, &msr_lo);
msr.lo &= ~(1 << IA32_APIC_BASE_ENABLE_BIT);
ia32_msr_write(IA32_APIC_BASE, msr.hi, msr.lo);
msr_lo &= ~(1 << IA32_APIC_BASE_ENABLE_BIT);
ia32_msr_write(IA32_APIC_BASE, msr_hi, msr_lo);
return 1;
}
@@ -618,10 +617,9 @@ PUBLIC void lapic_disable(void)
PRIVATE int lapic_enable_in_msr(void)
{
u64_t msr;
u32_t addr;
u32_t addr, msr_hi, msr_lo;
ia32_msr_read(IA32_APIC_BASE, &msr.hi, &msr.lo);
ia32_msr_read(IA32_APIC_BASE, &msr_hi, &msr_lo);
#if 0
/*FIXME this is a problem on AP */
@@ -629,18 +627,18 @@ PRIVATE int lapic_enable_in_msr(void)
* FIXME if the location is different (unlikely) then the one we expect,
* update it
*/
addr = (msr.lo >> 12) | ((msr.hi & 0xf) << 20);
addr = (msr_lo >> 12) | ((msr_hi & 0xf) << 20);
if (phys2vir(addr) != (lapic_addr >> 12)) {
if (msr.hi & 0xf) {
if (msr_hi & 0xf) {
printf("ERROR : APIC address needs more then 32 bits\n");
return 0;
}
lapic_addr = phys2vir(msr.lo & ~((1 << 12) - 1));
lapic_addr = phys2vir(msr_lo & ~((1 << 12) - 1));
}
#endif
msr.lo |= (1 << IA32_APIC_BASE_ENABLE_BIT);
ia32_msr_write(IA32_APIC_BASE, msr.hi, msr.lo);
msr_lo |= (1 << IA32_APIC_BASE_ENABLE_BIT);
ia32_msr_write(IA32_APIC_BASE, msr_hi, msr_lo);
return 1;
}

8
kernel/arch/i386/arch_clock.c
View File

@@ -251,9 +251,9 @@ PUBLIC void context_stop(struct proc * p)
make_zero64(p->p_cpu_time_left);
#else
/* if (tsc_delta < p->p_cpu_time_left) in 64bit */
if (tsc_delta.hi < p->p_cpu_time_left.hi ||
(tsc_delta.hi == p->p_cpu_time_left.hi &&
tsc_delta.lo < p->p_cpu_time_left.lo))
if (ex64hi(tsc_delta) < ex64hi(p->p_cpu_time_left) ||
(ex64hi(tsc_delta) == ex64hi(p->p_cpu_time_left) &&
ex64lo(tsc_delta) < ex64lo(p->p_cpu_time_left)))
p->p_cpu_time_left = sub64(p->p_cpu_time_left, tsc_delta);
else {
make_zero64(p->p_cpu_time_left);
@@ -315,7 +315,7 @@ PUBLIC short cpu_load(void)
busy = sub64(tsc_delta, idle_delta);
busy = mul64(busy, make64(100, 0));
load = div64(busy, tsc_delta).lo;
load = ex64lo(div64(busy, tsc_delta));
if (load > 100)
load = 100;

6
kernel/arch/i386/arch_system.c
View File

@@ -478,8 +478,10 @@ PRIVATE void dump_bkl_usage(void)
printf("--- BKL usage ---\n");
for (cpu = 0; cpu < ncpus; cpu++) {
printf("cpu %3d kernel ticks 0x%x%08x bkl ticks 0x%x%08x succ %d tries %d\n", cpu,
kernel_ticks[cpu].hi, kernel_ticks[cpu].lo,
bkl_ticks[cpu].hi, bkl_ticks[cpu].lo,
ex64hi(kernel_ticks[cpu]),
ex64lo(kernel_ticks[cpu]),
ex64hi(bkl_ticks[cpu]),
ex64lo(bkl_ticks[cpu]),
bkl_succ[cpu], bkl_tries[cpu]);
}
}

16
kernel/arch/i386/arch_watchdog.c
View File

@@ -37,12 +37,12 @@ PRIVATE void intel_arch_watchdog_init(const unsigned cpu)
* lowest 31 bits writable :(
*/
cpuf = cpu_get_freq(cpu);
while (cpuf.hi || cpuf.lo > 0x7fffffffU)
while (ex64hi(cpuf) || ex64lo(cpuf) > 0x7fffffffU)
cpuf = div64u64(cpuf, 2);
cpuf.lo = -cpuf.lo;
cpuf = make64(-ex64lo(cpuf), ex64hi(cpuf));
watchdog->resetval = watchdog->watchdog_resetval = cpuf;
ia32_msr_write(INTEL_MSR_PERFMON_CRT0, 0, cpuf.lo);
ia32_msr_write(INTEL_MSR_PERFMON_CRT0, 0, ex64lo(cpuf));
ia32_msr_write(INTEL_MSR_PERFMON_SEL0, 0,
val | INTEL_MSR_PERFMON_SEL0_ENABLE);
@@ -54,7 +54,7 @@ PRIVATE void intel_arch_watchdog_init(const unsigned cpu)
PRIVATE void intel_arch_watchdog_reinit(const unsigned cpu)
{
lapic_write(LAPIC_LVTPCR, APIC_ICR_DM_NMI);
ia32_msr_write(INTEL_MSR_PERFMON_CRT0, 0, watchdog->resetval.lo);
ia32_msr_write(INTEL_MSR_PERFMON_CRT0, 0, ex64lo(watchdog->resetval));
}
PUBLIC int arch_watchdog_init(void)
@@ -170,12 +170,12 @@ PRIVATE int intel_arch_watchdog_profile_init(const unsigned freq)
* if freq is too low and the cpu freq too high we may get in a range of
* insane value which cannot be handled by the 31bit CPU perf counter
*/
if (cpuf.hi != 0 || cpuf.lo > 0x7fffffffU) {
if (ex64hi(cpuf) != 0 || ex64lo(cpuf) > 0x7fffffffU) {
printf("ERROR : nmi watchdog ticks exceed 31bits, use higher frequency\n");
return EINVAL;
}
cpuf.lo = -cpuf.lo;
cpuf = make64(-ex64lo(cpuf), ex64hi(cpuf));
watchdog->profile_resetval = cpuf;
return OK;
@@ -207,7 +207,7 @@ PRIVATE void amd_watchdog_init(const unsigned cpu)
watchdog->resetval = watchdog->watchdog_resetval = cpuf;
ia32_msr_write(AMD_MSR_EVENT_CTR0,
watchdog->resetval.hi, watchdog->resetval.lo);
ex64hi(watchdog->resetval), ex64lo(watchdog->resetval));
ia32_msr_write(AMD_MSR_EVENT_SEL0, 0,
val | AMD_MSR_EVENT_SEL0_ENABLE);
@@ -220,7 +220,7 @@ PRIVATE void amd_watchdog_reinit(const unsigned cpu)
{
lapic_write(LAPIC_LVTPCR, APIC_ICR_DM_NMI);
ia32_msr_write(AMD_MSR_EVENT_CTR0,
watchdog->resetval.hi, watchdog->resetval.lo);
ex64hi(watchdog->resetval), ex64lo(watchdog->resetval));
}
PRIVATE int amd_watchdog_profile_init(const unsigned freq)

3
kernel/debug.c
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@@ -262,7 +262,8 @@ PUBLIC void print_proc(struct proc *pp)
"cr3 0x%lx rts %s misc %s sched %s ",
proc_nr(pp), pp->p_name, pp->p_endpoint,
pp->p_priority, pp->p_user_time,
pp->p_sys_time, pp->p_cycles.hi, pp->p_cycles.lo, pp->p_cpu,
pp->p_sys_time, ex64hi(pp->p_cycles),
ex64lo(pp->p_cycles), pp->p_cpu,
pp->p_seg.p_cr3,
rtsflagstr(pp->p_rts_flags), miscflagstr(pp->p_misc_flags),
schedulerstr(pp->p_scheduler));