ARM: Enable caches

First round, some more optimizations are possible and should be
activated.

Change-Id: I3b7dee7c82fbffd823a08bec1c5d5ebcf769f92f

kernel/arch/earm/arch_system.c

@@ -204,7 +204,6 @@ void __switch_address_space(struct proc *p, struct proc **__ptproc)
 	if (new_ttbr == orig_ttbr)
 	    return;
 
-	refresh_tlb();
 	write_ttbr0(new_ttbr);
 
 	*__ptproc = p;

kernel/arch/earm/memory.c

@@ -100,9 +100,11 @@ static phys_bytes createpde(
 		pdeval = pr->p_seg.p_ttbr_v[ARM_VM_PDE(linaddr)];
 	} else {
 		/* Requested address is physical. Make up the PDE entry. */
-		pdeval = (linaddr & ARM_VM_SECTION_MASK) |
-			ARM_VM_SECTION |
-			ARM_VM_SECTION_DOMAIN | ARM_VM_SECTION_USER;
+		pdeval = (linaddr & ARM_VM_SECTION_MASK)
+			| ARM_VM_SECTION
+			| ARM_VM_SECTION_DOMAIN
+			| ARM_VM_SECTION_WT
+			| ARM_VM_SECTION_USER;
 	}
 
 	/* Write the pde value that we need into a pde that the kernel
@@ -189,7 +191,6 @@ static int lin_lin_copy(struct proc *srcproc, vir_bytes srclinaddr,
 		dstptr = createpde(dstproc, dstlinaddr, &chunk, 1, &changed);
 		if(changed) {
 			reload_ttbr0();
-			refresh_tlb();
 		}
 		/* Copy pages. */
 		PHYS_COPY_CATCH(srcptr, dstptr, chunk, addr);
@@ -305,12 +306,13 @@ int vm_lookup(const struct proc *proc, const vir_bytes virtual,
 		return EFAULT;
 	}
 
-	/* We don't expect to ever see this. */
+	/* We don't expect to ever see this. 
+	 * LSC Impossible with the previous test.
 	if(pde_v & ARM_VM_BIGPAGE) {
 		*physical = pde_v & ARM_VM_SECTION_MASK;
 		if(ptent) *ptent = pde_v;
 		*physical += virtual & ARM_VM_OFFSET_MASK_1MB;
-	} else {
+	} else */ {
 		/* Retrieve page table entry. */
 		pt = (u32_t *) (pde_v & ARM_VM_PDE_MASK);
 		assert(!((u32_t) pt % ARM_PAGETABLE_SIZE));
@@ -500,7 +502,6 @@ int vm_memset(struct proc* caller, endpoint_t who, phys_bytes ph, int c,
 
 		if (new_ttbr) {
 			reload_ttbr0();
-			refresh_tlb();
 		}
 		/* If a page fault happens, pfa is non-null */
 		if ((pfa = phys_memset(ptr, pattern, chunk))) {
@@ -787,5 +788,5 @@ int arch_enable_paging(struct proc * caller)
 void release_address_space(struct proc *pr)
 {
 	pr->p_seg.p_ttbr_v = NULL;
-	refresh_tlb();
+	barrier();
 }

kernel/arch/earm/pg_utils.c

@@ -156,11 +156,12 @@ void pg_identity(kinfo_t *cbi)
 	assert(cbi->mem_high_phys);
 
         /* Set up an identity mapping page directory */
-        for(i = 0; i < ARM_VM_DIR_ENTRIES; i++) {
-		u32_t flags = ARM_VM_SECTION |
-		    ARM_VM_SECTION_DOMAIN | ARM_VM_SECTION_USER;
-                phys = i * ARM_BIG_PAGE_SIZE;
-                pagedir[i] =  phys | flags;
+	 for(i = 0; i < ARM_VM_DIR_ENTRIES; i++) {
+		u32_t flags = ARM_VM_SECTION
+			| ARM_VM_SECTION_USER
+			| ARM_VM_SECTION_DOMAIN;
+		phys = i * ARM_BIG_PAGE_SIZE;
+		pagedir[i] =  phys | flags;
         }
 }
 
@@ -169,14 +170,14 @@ int pg_mapkernel(void)
 	int pde;
 	u32_t mapped = 0, kern_phys = kern_phys_start;
 
-        assert(!(kern_vir_start % ARM_BIG_PAGE_SIZE));
-        assert(!(kern_phys_start % ARM_BIG_PAGE_SIZE));
-        pde = kern_vir_start / ARM_BIG_PAGE_SIZE; /* start pde */
+	assert(!(kern_vir_start % ARM_BIG_PAGE_SIZE));
+	assert(!(kern_phys_start % ARM_BIG_PAGE_SIZE));
+	pde = kern_vir_start / ARM_BIG_PAGE_SIZE; /* start pde */
 	while(mapped < kern_kernlen) {
-		pagedir[pde] = (kern_phys & ARM_VM_PDE_MASK) |
-			ARM_VM_SECTION |
-	    		ARM_VM_SECTION_DOMAIN | ARM_VM_SECTION_WB |
-	    		ARM_VM_SECTION_SHAREABLE | ARM_VM_SECTION_SUPER;
+		pagedir[pde] = (kern_phys & ARM_VM_PDE_MASK) | ARM_VM_SECTION
+			| ARM_VM_SECTION_SUPER
+			| ARM_VM_SECTION_DOMAIN
+			| ARM_VM_SECTION_WT;
 		mapped += ARM_BIG_PAGE_SIZE;
 		kern_phys += ARM_BIG_PAGE_SIZE;
 		pde++;
@@ -196,7 +197,10 @@ void vm_enable_paging(void)
 	sctlr = read_sctlr();
 
 	/* Enable MMU */
-	sctlr |= (SCTLR_M);
+	sctlr |= SCTLR_M;
+
+	/* AFE set to zero (default reset value): not using simplified model. */
+	/* TRE set to zero (default reset value): TEX[2:0] are used, plus C and B bits.*/
 
 	/* Enable instruction and data cache */
 	sctlr |= SCTLR_C;
@@ -207,7 +211,6 @@ void vm_enable_paging(void)
 phys_bytes pg_load()
 {
 	phys_bytes phpagedir = vir2phys(pagedir);
-	refresh_tlb();
         write_ttbr0(phpagedir);
 	return phpagedir;
 }
@@ -258,14 +261,15 @@ void pg_map(phys_bytes phys, vir_bytes vaddr, vir_bytes vaddr_end,
 			phys_bytes ph;
 			pt = alloc_pagetable(&ph);
 			pagedir[pde] = (ph & ARM_VM_PDE_MASK)
-			    | ARM_VM_PAGEDIR | ARM_VM_PDE_DOMAIN;
+					| ARM_VM_PAGEDIR
+					| ARM_VM_PDE_DOMAIN;
 			mapped_pde = pde;
 		}
 		assert(pt);
 		pt[pte] = (source & ARM_VM_PTE_MASK)
-			    | ARM_VM_PAGETABLE
-			    | ARM_VM_PTE_WB | ARM_VM_PTE_SHAREABLE
-			    | ARM_VM_PTE_USER;
+			| ARM_VM_PAGETABLE
+			| ARM_VM_PTE_WT
+			| ARM_VM_PTE_USER;
 		vaddr += ARM_PAGE_SIZE;
 		if(phys != PG_ALLOCATEME)
 			phys += ARM_PAGE_SIZE;

kernel/arch/i386/pg_utils.c

@@ -173,8 +173,9 @@ void pg_identity(kinfo_t *cbi)
 
         /* Set up an identity mapping page directory */
         for(i = 0; i < I386_VM_DIR_ENTRIES; i++) {
-		u32_t flags = I386_VM_PRESENT | I386_VM_BIGPAGE |
-			I386_VM_USER | I386_VM_WRITE;
+		u32_t flags = I386_VM_PRESENT | I386_VM_BIGPAGE
+			| I386_VM_USER
+			| I386_VM_WRITE;
                 phys = i * I386_BIG_PAGE_SIZE;
 		if((cbi->mem_high_phys & I386_VM_ADDR_MASK_4MB)
 			<= (phys & I386_VM_ADDR_MASK_4MB)) {