ARM: Enable caches
First round, some more optimizations are possible and should be activated. Change-Id: I3b7dee7c82fbffd823a08bec1c5d5ebcf769f92f
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@@ -100,9 +100,11 @@ static phys_bytes createpde(
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pdeval = pr->p_seg.p_ttbr_v[ARM_VM_PDE(linaddr)];
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} else {
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/* Requested address is physical. Make up the PDE entry. */
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pdeval = (linaddr & ARM_VM_SECTION_MASK) |
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ARM_VM_SECTION |
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ARM_VM_SECTION_DOMAIN | ARM_VM_SECTION_USER;
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pdeval = (linaddr & ARM_VM_SECTION_MASK)
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| ARM_VM_SECTION
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| ARM_VM_SECTION_DOMAIN
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| ARM_VM_SECTION_WT
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| ARM_VM_SECTION_USER;
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}
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/* Write the pde value that we need into a pde that the kernel
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@@ -189,7 +191,6 @@ static int lin_lin_copy(struct proc *srcproc, vir_bytes srclinaddr,
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dstptr = createpde(dstproc, dstlinaddr, &chunk, 1, &changed);
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if(changed) {
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reload_ttbr0();
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refresh_tlb();
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}
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/* Copy pages. */
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PHYS_COPY_CATCH(srcptr, dstptr, chunk, addr);
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@@ -305,12 +306,13 @@ int vm_lookup(const struct proc *proc, const vir_bytes virtual,
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return EFAULT;
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}
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/* We don't expect to ever see this. */
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/* We don't expect to ever see this.
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* LSC Impossible with the previous test.
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if(pde_v & ARM_VM_BIGPAGE) {
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*physical = pde_v & ARM_VM_SECTION_MASK;
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if(ptent) *ptent = pde_v;
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*physical += virtual & ARM_VM_OFFSET_MASK_1MB;
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} else {
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} else */ {
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/* Retrieve page table entry. */
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pt = (u32_t *) (pde_v & ARM_VM_PDE_MASK);
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assert(!((u32_t) pt % ARM_PAGETABLE_SIZE));
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@@ -500,7 +502,6 @@ int vm_memset(struct proc* caller, endpoint_t who, phys_bytes ph, int c,
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if (new_ttbr) {
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reload_ttbr0();
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refresh_tlb();
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}
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/* If a page fault happens, pfa is non-null */
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if ((pfa = phys_memset(ptr, pattern, chunk))) {
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@@ -787,5 +788,5 @@ int arch_enable_paging(struct proc * caller)
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void release_address_space(struct proc *pr)
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{
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pr->p_seg.p_ttbr_v = NULL;
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refresh_tlb();
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barrier();
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}
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