Libraries updates and cleanup

* Updating common/lib
 * Updating lib/csu
 * Updating lib/libc
 * Updating libexec/ld.elf_so
 * Corrected test on __minix in featuretest to actually follow the
   meaning of the comment.
 * Cleaned up _REENTRANT-related defintions.
 * Disabled -D_REENTRANT for libfetch
 * Removing some unneeded __NBSD_LIBC defines and tests

Change-Id: Ic1394baef74d11b9f86b312f5ff4bbc3cbf72ce2
This commit is contained in:
2012-11-15 12:06:41 +01:00
parent f6aac1c3b5
commit f14fb60209
1285 changed files with 44244 additions and 14308 deletions

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@@ -1,4 +1,4 @@
# $NetBSD: Makefile.inc,v 1.7 2011/01/17 10:08:35 matt Exp $
# $NetBSD: Makefile.inc,v 1.10 2011/07/04 02:53:15 mrg Exp $
SOFTFLOAT_BITS?=64
.PATH: ${ARCHDIR}/softfloat \
@@ -18,3 +18,11 @@ SRCS.softfloat+=eqsf2.c nesf2.c gtsf2.c gesf2.c ltsf2.c lesf2.c negsf2.c \
nexf2.c gtxf2.c gexf2.c negxf2.c unordsf2.c unorddf2.c
SRCS+= ${SRCS.softfloat}
# XXX
.if defined(HAVE_GCC) && ${HAVE_GCC} >= 45 && \
(${MACHINE_CPU} == "arm" || \
${MACHINE_CPU} == "mips" || \
${MACHINE_CPU} == "sh3")
COPTS.softfloat.c+= -Wno-enum-compare
.endif

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@@ -1,4 +1,4 @@
/* $NetBSD: softfloat.c,v 1.1 2002/05/21 23:51:07 bjh21 Exp $ */
/* $NetBSD: softfloat.c,v 1.2 2012/03/21 14:17:54 christos Exp $ */
/*
* This version hacked for use with gcc -msoft-float by bjh21.
@@ -53,7 +53,7 @@ this code that are retained.
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: softfloat.c,v 1.1 2002/05/21 23:51:07 bjh21 Exp $");
__RCSID("$NetBSD: softfloat.c,v 1.2 2012/03/21 14:17:54 christos Exp $");
#endif /* LIBC_SCCS and not lint */
#ifdef SOFTFLOAT_FOR_GCC
@@ -237,7 +237,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )
isTiny =
( float_detect_tininess == float_tininess_before_rounding )
|| ( zExp < -1 )
|| ( zSig + roundIncrement < 0x80000000 );
|| ( zSig + roundIncrement < (uint32)0x80000000 );
shift32RightJamming( zSig, - zExp, &zSig );
zExp = 0;
roundBits = zSig & 0x7F;
@@ -281,7 +281,7 @@ floating-point value `a'.
INLINE bits32 extractFloat64Frac1( float64 a )
{
return FLOAT64_DEMANGLE(a) & LIT64( 0x00000000FFFFFFFF );
return (bits32)(FLOAT64_DEMANGLE(a) & LIT64(0x00000000FFFFFFFF));
}
@@ -294,7 +294,7 @@ floating-point value `a'.
INLINE bits32 extractFloat64Frac0( float64 a )
{
return ( FLOAT64_DEMANGLE(a)>>32 ) & 0x000FFFFF;
return (bits32)((FLOAT64_DEMANGLE(a) >> 32) & 0x000FFFFF);
}
@@ -306,7 +306,7 @@ Returns the exponent bits of the double-precision floating-point value `a'.
INLINE int16 extractFloat64Exp( float64 a )
{
return ( FLOAT64_DEMANGLE(a)>>52 ) & 0x7FF;
return (int16)((FLOAT64_DEMANGLE(a) >> 52) & 0x7FF);
}
@@ -318,7 +318,7 @@ Returns the sign bit of the double-precision floating-point value `a'.
INLINE flag extractFloat64Sign( float64 a )
{
return FLOAT64_DEMANGLE(a)>>63;
return (flag)(FLOAT64_DEMANGLE(a) >> 63);
}
@@ -535,7 +535,7 @@ float32 int32_to_float32( int32 a )
if ( a == 0 ) return 0;
if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );
zSign = ( a < 0 );
return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a );
return normalizeRoundAndPackFloat32(zSign, 0x9C, (uint32)(zSign ? - a : a));
}

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@@ -1,4 +1,4 @@
/* $NetBSD: softfloat-macros,v 1.2 2009/02/16 10:23:35 tron Exp $ */
/* $NetBSD: softfloat-macros,v 1.3 2012/03/21 02:32:26 christos Exp $ */
/*
===============================================================================
@@ -464,10 +464,10 @@ INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr )
bits32 aHigh, aLow, bHigh, bLow;
bits64 z0, zMiddleA, zMiddleB, z1;
aLow = a;
aHigh = a>>32;
bLow = b;
bHigh = b>>32;
aLow = (bits32)a;
aHigh = (bits32)(a>>32);
bLow = (bits32)b;
bHigh = (bits32)(b>>32);
z1 = ( (bits64) aLow ) * bLow;
zMiddleA = ( (bits64) aLow ) * bHigh;
zMiddleB = ( (bits64) aHigh ) * bLow;
@@ -616,7 +616,7 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a )
z = 0x8000 + ( a>>17 ) - sqrtEvenAdjustments[ idx ];
z = a / z + z;
z = ( 0x20000 <= z ) ? 0xFFFF8000 : ( z<<15 );
if ( z <= a ) return (bits32) ( ( (sbits32) a )>>1 );
if ( z <= a ) return (bits32) ( ( (bits32) a )>>1 );
}
return ( (bits32) ( ( ( (bits64) a )<<31 ) / z ) ) + ( z>>1 );
@@ -682,7 +682,7 @@ static int8 countLeadingZeros64( bits64 a )
else {
a >>= 32;
}
shiftCount += countLeadingZeros32( a );
shiftCount += (int8)countLeadingZeros32( (bits32)a );
return shiftCount;
}

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@@ -1,4 +1,4 @@
/* $NetBSD: softfloat.c,v 1.5 2007/11/08 21:31:04 martin Exp $ */
/* $NetBSD: softfloat.c,v 1.11 2012/03/24 00:06:20 matt Exp $ */
/*
* This version hacked for use with gcc -msoft-float by bjh21.
@@ -46,7 +46,7 @@ this code that are retained.
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: softfloat.c,v 1.5 2007/11/08 21:31:04 martin Exp $");
__RCSID("$NetBSD: softfloat.c,v 1.11 2012/03/24 00:06:20 matt Exp $");
#endif /* LIBC_SCCS and not lint */
#ifdef SOFTFLOAT_FOR_GCC
@@ -137,10 +137,10 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ )
}
}
}
roundBits = absZ & 0x7F;
roundBits = (int8)(absZ & 0x7F);
absZ = ( absZ + roundIncrement )>>7;
absZ &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
z = absZ;
z = (int32)absZ;
if ( zSign ) z = - z;
if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {
float_raise( float_flag_invalid );
@@ -340,7 +340,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )
isTiny =
( float_detect_tininess == float_tininess_before_rounding )
|| ( zExp < -1 )
|| ( zSig + roundIncrement < 0x80000000 );
|| ( zSig + roundIncrement < 0x80000000U );
shift32RightJamming( zSig, - zExp, &zSig );
zExp = 0;
roundBits = zSig & 0x7F;
@@ -395,7 +395,7 @@ Returns the exponent bits of the double-precision floating-point value `a'.
INLINE int16 extractFloat64Exp( float64 a )
{
return ( FLOAT64_DEMANGLE(a)>>52 ) & 0x7FF;
return (int16)((FLOAT64_DEMANGLE(a) >> 52) & 0x7FF);
}
@@ -407,7 +407,7 @@ Returns the sign bit of the double-precision floating-point value `a'.
INLINE flag extractFloat64Sign( float64 a )
{
return FLOAT64_DEMANGLE(a)>>63;
return (flag)(FLOAT64_DEMANGLE(a) >> 63);
}
@@ -497,7 +497,7 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig )
}
}
}
roundBits = zSig & 0x3FF;
roundBits = (int16)(zSig & 0x3FF);
if ( 0x7FD <= (bits16) zExp ) {
if ( ( 0x7FD < zExp )
|| ( ( zExp == 0x7FD )
@@ -512,10 +512,10 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig )
isTiny =
( float_detect_tininess == float_tininess_before_rounding )
|| ( zExp < -1 )
|| ( zSig + roundIncrement < LIT64( 0x8000000000000000 ) );
|| ( zSig + roundIncrement < (bits64)LIT64( 0x8000000000000000 ) );
shift64RightJamming( zSig, - zExp, &zSig );
zExp = 0;
roundBits = zSig & 0x3FF;
roundBits = (int16)(zSig & 0x3FF);
if ( isTiny && roundBits ) float_raise( float_flag_underflow );
}
}
@@ -876,7 +876,7 @@ Returns the exponent bits of the quadruple-precision floating-point value
INLINE int32 extractFloat128Exp( float128 a )
{
return ( a.high>>48 ) & 0x7FFF;
return (int32)((a.high >> 48) & 0x7FFF);
}
@@ -888,7 +888,7 @@ Returns the sign bit of the quadruple-precision floating-point value `a'.
INLINE flag extractFloat128Sign( float128 a )
{
return a.high>>63;
return (flag)(a.high >> 63);
}
@@ -1124,10 +1124,19 @@ float32 int32_to_float32( int32 a )
if ( a == 0 ) return 0;
if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );
zSign = ( a < 0 );
return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a );
return normalizeRoundAndPackFloat32(zSign, 0x9C, (uint32)(zSign ? - a : a));
}
float32 uint32_to_float32( uint32 a )
{
if ( a == 0 ) return 0;
if ( a & (bits32) 0x80000000 )
return normalizeRoundAndPackFloat32( 0, 0x9D, a >> 1 );
return normalizeRoundAndPackFloat32( 0, 0x9C, a );
}
/*
-------------------------------------------------------------------------------
Returns the result of converting the 32-bit two's complement integer `a'
@@ -1151,6 +1160,17 @@ float64 int32_to_float64( int32 a )
}
float64 uint32_to_float64( uint32 a )
{
int8 shiftCount;
bits64 zSig = a;
if ( a == 0 ) return 0;
shiftCount = countLeadingZeros32( a ) + 21;
return packFloat64( 0, 0x432 - shiftCount, zSig<<shiftCount );
}
#ifdef FLOATX80
/*
@@ -1177,6 +1197,17 @@ floatx80 int32_to_floatx80( int32 a )
}
floatx80 uint32_to_floatx80( uint32 a )
{
int8 shiftCount;
bits64 zSig = a;
if ( a == 0 ) return packFloatx80( 0, 0, 0 );
shiftCount = countLeadingZeros32( a ) + 32;
return packFloatx80( 0, 0x403E - shiftCount, zSig<<shiftCount );
}
#endif
#ifdef FLOAT128
@@ -1204,6 +1235,17 @@ float128 int32_to_float128( int32 a )
}
float128 uint32_to_float128( uint32 a )
{
int8 shiftCount;
bits64 zSig0 = a;
if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
shiftCount = countLeadingZeros32( a ) + 17;
return packFloat128( 0, 0x402E - shiftCount, zSig0<<shiftCount, 0 );
}
#endif
#ifndef SOFTFLOAT_FOR_GCC /* __floatdi?f is in libgcc2.c */
@@ -1894,7 +1936,7 @@ float32 float32_mul( float32 a, float32 b )
aSig = ( aSig | 0x00800000 )<<7;
bSig = ( bSig | 0x00800000 )<<8;
shift64RightJamming( ( (bits64) aSig ) * bSig, 32, &zSig64 );
zSig = zSig64;
zSig = (bits32)zSig64;
if ( 0 <= (sbits32) ( zSig<<1 ) ) {
zSig <<= 1;
--zExp;
@@ -1958,7 +2000,7 @@ float32 float32_div( float32 a, float32 b )
aSig >>= 1;
++zExp;
}
zSig = ( ( (bits64) aSig )<<32 ) / bSig;
zSig = (bits32)((((bits64) aSig) << 32) / bSig);
if ( ( zSig & 0x3F ) == 0 ) {
zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 );
}
@@ -2337,7 +2379,7 @@ int32 float64_to_int32_round_to_zero( float64 a )
shiftCount = 0x433 - aExp;
savedASig = aSig;
aSig >>= shiftCount;
z = aSig;
z = (int32)aSig;
if ( aSign ) z = - z;
if ( ( z < 0 ) ^ aSign ) {
invalid:
@@ -2472,7 +2514,7 @@ float32 float64_to_float32( float64 a )
return packFloat32( aSign, 0xFF, 0 );
}
shift64RightJamming( aSig, 22, &aSig );
zSig = aSig;
zSig = (bits32)aSig;
if ( aExp || zSig ) {
zSig |= 0x40000000;
aExp -= 0x381;
@@ -4320,7 +4362,7 @@ int32 float128_to_int32_round_to_zero( float128 a )
shiftCount = 0x402F - aExp;
savedASig = aSig0;
aSig0 >>= shiftCount;
z = aSig0;
z = (int32)aSig0;
if ( aSign ) z = - z;
if ( ( z < 0 ) ^ aSign ) {
invalid:
@@ -4440,6 +4482,8 @@ int64 float128_to_int64_round_to_zero( float128 a )
}
#if (defined(SOFTFLOATSPARC64_FOR_GCC) || defined(SOFTFLOAT_FOR_GCC)) \
&& defined(SOFTFLOAT_NEED_FIXUNS)
/*
* just like above - but do not care for overflow of signed results
*/
@@ -4489,6 +4533,7 @@ uint64 float128_to_uint64_round_to_zero( float128 a )
return z;
}
#endif /* (SOFTFLOATSPARC64_FOR_GCC || SOFTFLOAT_FOR_GCC) && SOFTFLOAT_NEED_FIXUNS */
/*
-------------------------------------------------------------------------------
@@ -4517,7 +4562,7 @@ float32 float128_to_float32( float128 a )
}
aSig0 |= ( aSig1 != 0 );
shift64RightJamming( aSig0, 18, &aSig0 );
zSig = aSig0;
zSig = (bits32)aSig0;
if ( aExp || zSig ) {
zSig |= 0x40000000;
aExp -= 0x3F81;
@@ -5073,7 +5118,7 @@ according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
*/
float128 float128_rem( float128 a, float128 b )
{
flag aSign, bSign, zSign;
flag aSign, zSign;
int32 aExp, bExp, expDiff;
bits64 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
bits64 allZero, alternateASig0, alternateASig1, sigMean1;
@@ -5087,7 +5132,6 @@ float128 float128_rem( float128 a, float128 b )
bSig1 = extractFloat128Frac1( b );
bSig0 = extractFloat128Frac0( b );
bExp = extractFloat128Exp( b );
bSign = extractFloat128Sign( b );
if ( aExp == 0x7FFF ) {
if ( ( aSig0 | aSig1 )
|| ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
@@ -5211,9 +5255,9 @@ float128 float128_sqrt( float128 a )
if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( 0, 0, 0, 0 );
normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
}
zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFE;
zExp = ( (unsigned int)(aExp - 0x3FFF) >> 1) + 0x3FFE;
aSig0 |= LIT64( 0x0001000000000000 );
zSig0 = estimateSqrt32( aExp, aSig0>>17 );
zSig0 = estimateSqrt32((int16)aExp, (bits32)(aSig0>>17));
shortShift128Left( aSig0, aSig1, 13 - ( aExp & 1 ), &aSig0, &aSig1 );
zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
doubleZSig0 = zSig0<<1;
@@ -5498,7 +5542,7 @@ uint32 float64_to_uint32_round_to_zero( float64 a )
shiftCount = 0x433 - aExp;
savedASig = aSig;
aSig >>= shiftCount;
z = aSig;
z = (uint32)aSig;
if ( ( aSig<<shiftCount ) != savedASig ) {
float_exception_flags |= float_flag_inexact;
}

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@@ -1,4 +1,4 @@
/* $NetBSD: softfloat-for-gcc.h,v 1.8 2009/12/14 01:07:42 matt Exp $ */
/* $NetBSD: softfloat-for-gcc.h,v 1.9 2012/08/05 04:27:42 matt Exp $ */
/*
* Move private identifiers with external linkage into implementation
@@ -167,3 +167,60 @@
#define float128_le __letf2
#define float128_gt __gttf2
#endif
#ifdef __ARM_EABI__
#define __addsf3 __aeabi_fadd
#define __adddf3 __aeabi_dadd
#define __subsf3 __aeabi_fsub
#define __subdf3 __aeabi_dsub
#define __mulsf3 __aeabi_fmul
#define __muldf3 __aeabi_dmul
#define __divsf3 __aeabi_fdiv
#define __divdf3 __aeabi_ddiv
#define __floatsisf __aeabi_i2f
#define __floatsidf __aeabi_i2d
#define __floatdisf __aeabi_l2f
#define __floatdidf __aeabi_l2d
#define __floatunsisf __aeabi_ui2f
#define __floatunsidf __aeabi_ui2d
#define __floatundisf __aeabi_ul2f
#define __floatundidf __aeabi_ul2d
#define __fixsfsi __aeabi_f2iz
#define __fixdfsi __aeabi_d2iz
#define __fixsfdi __aeabi_f2lz
#define __fixdfdi __aeabi_d2lz
#define __fixunssfsi __aeabi_f2uiz
#define __fixunsdfsi __aeabi_d2uiz
#define __fixunssfdi __aeabi_f2ulz
#define __fixunsdfdi __aeabi_d2ulz
#define __extendsfdf2 __aeabi_f2d
#define __truncdfsf2 __aeabi_d2f
#define __eqsf2 __aeabi_fcmpeq
#define __eqdf2 __aeabi_dcmpeq
#define __ltsf2 __aeabi_fcmplt
#define __ltdf2 __aeabi_dcmplt
#define __lesf2 __aeabi_fcmple
#define __ledf2 __aeabi_dcmple
#define __gtsf2 __aeabi_fcmpgt
#define __gtdf2 __aeabi_dcmpgt
#define __gesf2 __aeabi_fcmpge
#define __gedf2 __aeabi_dcmpge
#endif /* __ARM_EABI__ */

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@@ -1,4 +1,4 @@
/* $NetBSD: softfloat-specialize,v 1.4 2004/09/26 21:13:27 jmmv Exp $ */
/* $NetBSD: softfloat-specialize,v 1.7 2012/03/21 02:32:26 christos Exp $ */
/* This is a derivative work. */
@@ -33,6 +33,8 @@ this code that are retained.
*/
#include <signal.h>
#include <string.h>
#include <unistd.h>
/*
-------------------------------------------------------------------------------
@@ -53,16 +55,35 @@ substitute a result value. If traps are not implemented, this routine
should be simply `float_exception_flags |= flags;'.
-------------------------------------------------------------------------------
*/
#ifdef SOFTFLOAT_FOR_GCC
#define float_exception_mask _softfloat_float_exception_mask
#endif
fp_except float_exception_mask = 0;
void float_raise( fp_except flags )
{
siginfo_t info;
float_exception_flags |= flags;
if ( flags & float_exception_mask ) {
raise( SIGFPE );
memset(&info, 0, sizeof info);
info.si_signo = SIGFPE;
info.si_pid = getpid();
info.si_uid = geteuid();
if (flags & float_flag_underflow)
info.si_code = FPE_FLTUND;
else if (flags & float_flag_overflow)
info.si_code = FPE_FLTOVF;
else if (flags & float_flag_divbyzero)
info.si_code = FPE_FLTDIV;
else if (flags & float_flag_invalid)
info.si_code = FPE_FLTINV;
else if (flags & float_flag_inexact)
info.si_code = FPE_FLTRES;
sigqueueinfo(getpid(), &info);
}
}
#undef float_exception_mask
/*
-------------------------------------------------------------------------------
@@ -93,7 +114,7 @@ static
flag float32_is_nan( float32 a )
{
return ( 0xFF000000 < (bits32) ( a<<1 ) );
return ( (bits32)0xFF000000 < (bits32) ( a<<1 ) );
}
@@ -142,7 +163,7 @@ precision floating-point format.
static float32 commonNaNToFloat32( commonNaNT a )
{
return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>41 );
return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | (bits32)( a.high>>41 );
}
@@ -192,7 +213,7 @@ static
flag float64_is_nan( float64 a )
{
return ( LIT64( 0xFFE0000000000000 ) <
return ( (bits64)LIT64( 0xFFE0000000000000 ) <
(bits64) ( FLOAT64_DEMANGLE(a)<<1 ) );
}
@@ -228,7 +249,7 @@ static commonNaNT float64ToCommonNaN( float64 a )
commonNaNT z;
if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
z.sign = FLOAT64_DEMANGLE(a)>>63;
z.sign = (flag)(FLOAT64_DEMANGLE(a)>>63);
z.low = 0;
z.high = FLOAT64_DEMANGLE(a)<<12;
return z;
@@ -406,7 +427,7 @@ flag float128_is_nan( float128 a )
{
return
( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
( (bits64)LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
}
@@ -438,7 +459,7 @@ static commonNaNT float128ToCommonNaN( float128 a )
commonNaNT z;
if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
z.sign = a.high>>63;
z.sign = (flag)(a.high>>63);
shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
return z;