160 lines
4.0 KiB
C
160 lines
4.0 KiB
C
/* $NetBSD: locore.h,v 1.1 2014/08/10 05:47:38 matt Exp $ */
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/*-
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* Copyright (c) 2014 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas of 3am Software Foundry.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _AARCH64_LOCORE_H_
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#define _AARCH64_LOCORE_H_
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#ifdef __aarch64__
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#include <sys/types.h>
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#include <sys/cpu.h>
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#include <sys/lwp.h>
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#include <sys/bus.h>
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#include <aarch64/armreg.h>
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#include <aarch64/frame.h>
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struct mainbus_attach_args {
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const char *mba_name;
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bus_space_tag_t mba_memt;
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bus_dma_tag_t mba_dmat;
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bus_addr_t mba_addr;
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bus_size_t mba_size;
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int mba_intr;
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int mba_intrbase;
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int mba_package;
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};
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void userret(struct lwp *, struct trapframe *);
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void lwp_trampoline(void);
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void cpu_dosoftints(void);
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void dosoftints(void);
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void cpu_switchto_softint(struct lwp *, int);
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void cpu_send_ipi(struct cpu_info *, int);
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extern paddr_t physical_start;
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extern paddr_t physical_end;
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extern const pcu_ops_t pcu_fpu_ops;
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static inline bool
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fpu_used_p(lwp_t *l)
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{
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KASSERT(l == curlwp);
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return pcu_valid_p(&pcu_fpu_ops);
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}
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static inline void
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fpu_discard(lwp_t *l, bool usesw)
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{
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KASSERT(l == curlwp);
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pcu_discard(&pcu_fpu_ops, usesw);
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}
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static inline void
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fpu_save(lwp_t *l)
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{
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KASSERT(l == curlwp);
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pcu_save(&pcu_fpu_ops);
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}
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static inline void cpsie(register_t psw) __attribute__((__unused__));
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static inline register_t cpsid(register_t psw) __attribute__((__unused__));
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static inline void
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cpsie(register_t psw)
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{
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if (!__builtin_constant_p(psw)) {
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reg_daif_write(psw);
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} else {
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reg_daifset_write(psw);
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}
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}
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static inline void
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enable_interrupts(register_t psw)
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{
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reg_daif_write(psw);
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}
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static inline register_t
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cpsid(register_t psw)
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{
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register_t oldpsw = reg_daif_read();
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if (!__builtin_constant_p(psw)) {
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reg_daif_write(oldpsw & ~psw);
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} else {
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reg_daifclr_write(psw);
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}
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return oldpsw;
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}
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static const paddr_t VTOPHYS_FAILED = (paddr_t) -1L;
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static inline paddr_t
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vtophys(vaddr_t va)
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{
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const uint64_t daif = reg_daif_read();
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/*
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* Use the address translation instruction to do the lookup.
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*/
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reg_daifset_write(DAIF_I|DAIF_F);
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__asm __volatile("at\ts1e1r, %0" :: "r"(va));
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paddr_t pa = reg_par_el1_read();
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pa = (pa & PAR_F) ? VTOPHYS_FAILED : (pa & PAR_PA);
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reg_daif_write(daif);
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return pa;
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}
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static inline paddr_t
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vtophysw(vaddr_t va)
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{
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const uint64_t daif = reg_daif_read();
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/*
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* Use the address translation instruction to do the lookup.
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*/
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reg_daifset_write(DAIF_I|DAIF_F);
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__asm __volatile("at\ts1e1w, %0" :: "r"(va));
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paddr_t pa = reg_par_el1_read();
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pa = (pa & PAR_F) ? VTOPHYS_FAILED : (pa & PAR_PA);
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reg_daif_write(daif);
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return pa;
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}
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#elif defined(__arm__)
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#include <arm/locore.h>
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#endif /* __aarch64__/__arm__ */
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#endif /* _AARCH64_LOCORE_H_ */
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