158 lines
3.6 KiB
ArmAsm
158 lines
3.6 KiB
ArmAsm
/* $NetBSD: pal.s,v 1.15 2002/05/13 21:38:30 thorpej Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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/*
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* The various OSF PALcode routines.
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*
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* The following code is originally derived from pages: (I) 6-5 - (I) 6-7
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* and (III) 2-1 - (III) 2-25 of "Alpha Architecture Reference Manual" by
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* Richard L. Sites.
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*
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* Updates taken from pages: (II-B) 2-1 - (II-B) 2-33 of "Alpha AXP
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* Architecture Reference Manual, Second Edition" by Richard L. Sites
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* and Richard T. Witek.
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*/
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__KERNEL_RCSID(1, "$NetBSD: pal.s,v 1.15 2002/05/13 21:38:30 thorpej Exp $");
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inc2: .stabs __FILE__,132,0,0,inc2; .loc 1 __LINE__
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/*
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* alpha_amask: read architecture features (XXX INSTRUCTION, NOT PALcode OP)
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*
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* Arguments:
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* a0 bitmask of features to test
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*
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* Returns:
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* v0 bitmask - bit is _cleared_ if feature is supported
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*/
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.text
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LEAF(alpha_amask,1)
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amask a0, v0
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RET
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END(alpha_amask)
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/*
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* alpha_implver: read implementation version (XXX INSTRUCTION, NOT PALcode OP)
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*
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* Returns:
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* v0 implementation version - see <machine/alpha_cpu.h>
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*/
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.text
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LEAF(alpha_implver,0)
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#if 0
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implver 0x1, v0
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#else
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.long 0x47e03d80 /* XXX gas(1) does the Wrong Thing */
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#endif
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RET
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END(alpha_implver)
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/*
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* alpha_pal_cflush: Cache flush [PRIVILEGED]
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*
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* Flush the entire physical page specified by the PFN specified in
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* a0 from any data caches associated with the current processor.
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*
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* Arguments:
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* a0 page frame number of page to flush
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*/
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.text
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LEAF(alpha_pal_cflush,1)
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call_pal PAL_cflush
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RET
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END(alpha_pal_cflush)
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/*
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* alpha_pal_halt: Halt the processor. [PRIVILEGED]
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*/
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.text
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LEAF_NOPROFILE(alpha_pal_halt,0)
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call_pal PAL_halt
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br zero,alpha_pal_halt /* Just in case */
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RET
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END(alpha_pal_halt)
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/*
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* alpha_pal_rdps: Read processor status. [PRIVILEGED]
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*
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* Return:
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* v0 current PS value
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*/
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.text
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LEAF(alpha_pal_rdps,0)
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call_pal PAL_OSF1_rdps
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RET
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END(alpha_pal_rdps)
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/*
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* alpha_pal_swpipl: Swap Interrupt priority level. [PRIVILEGED]
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* _alpha_pal_swpipl: Same, from profiling code. [PRIVILEGED]
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*
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* Arguments:
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* a0 new IPL
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*
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* Return:
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* v0 old IPL
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*/
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.text
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LEAF(alpha_pal_swpipl,1)
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call_pal PAL_OSF1_swpipl
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RET
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END(alpha_pal_swpipl)
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LEAF_NOPROFILE(_alpha_pal_swpipl,1)
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call_pal PAL_OSF1_swpipl
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RET
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END(_alpha_pal_swpipl)
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/*
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* alpha_pal_wrent: Write system entry address. [PRIVILEGED]
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*
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* Arguments:
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* a0 new vector
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* a1 vector selector
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*/
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.text
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LEAF_NOPROFILE(alpha_pal_wrent,2)
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call_pal PAL_OSF1_wrent
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RET
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END(alpha_pal_wrent)
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/*
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* alpha_pal_wrvptptr: Write virtual page table pointer. [PRIVILEGED]
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*
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* Arguments:
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* a0 new virtual page table pointer
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*/
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.text
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LEAF_NOPROFILE(alpha_pal_wrvptptr,1)
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call_pal PAL_OSF1_wrvptptr
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RET
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END(alpha_pal_wrvptptr)
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