88 lines
4.0 KiB
C
88 lines
4.0 KiB
C
/* $NetBSD: tegra_apbreg.h,v 1.1 2015/03/29 10:41:59 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _ARM_TEGRA_APBREG_H
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#define _ARM_TEGRA_APBREG_H
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#define APB_MISC_PP_CONFIG_CTL_0_REG 0x24
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#define APB_MISC_PP_PINMUX_GLOBAL_0_0_REG 0x40
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#define APB_MISC_PP_PULLUPDOWN_REG_C_0_REG 0xa8
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#define APB_MISC_SC1X_PADS_VIP_VCLKCTRL_0_REG 0x428
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#define APB_MISC_GP_HIDREV_0_REG 0x804
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#define APB_MISC_GP_MIPI_PAD_CTRL_0_REG 0x820
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#define APB_MISC_GP_AOCFG1PADCTRL_0_REG 0x868
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#define APB_MISC_GP_AOCFG2PADCTRL_0_REG 0x86c
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#define APB_MISC_GP_ATCFG1PADCTRL_0_REG 0x870
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#define APB_MISC_GP_ATCFG2PADCTRL_0_REG 0x874
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#define APB_MISC_GP_ATCFG3PADCTRL_0_REG 0x878
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#define APB_MISC_GP_ATCFG4PADCTRL_0_REG 0x87c
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#define APB_MISC_GP_ATCFG5PADCTRL_0_REG 0x880
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#define APB_MISC_GP_CDEV1CFGPADCTRL_0_REG 0x884
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#define APB_MISC_GP_CDEV2CFGPADCTRL_0_REG 0x888
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#define APB_MISC_GP_DAP1CFGPADCTRL_0_REG 0x890
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#define APB_MISC_GP_DAP2CFGPADCTRL_0_REG 0x894
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#define APB_MISC_GP_DAP3CFGPADCTRL_0_REG 0x898
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#define APB_MISC_GP_DAP4CFGPADCTRL_0_REG 0x89c
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#define APB_MISC_GP_DBGCFGPADCTRL_0_REG 0x8a0
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#define APB_MISC_GP_SDIO3CFGPADCTRL_0_REG 0x8b0
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#define APB_MISC_GP_SPICFGPADCTRL_0_REG 0x8b4
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#define APB_MISC_GP_UAACFGPADCTRL_0_REG 0x8b8
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#define APB_MISC_GP_UABCFGPADCTRL_0_REG 0x8bc
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#define APB_MISC_GP_UART2CFGPADCTRL_0_REG 0x8c0
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#define APB_MISC_GP_UART3CFGPADCTRL_0_REG 0x8c4
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#define APB_MISC_GP_SDIO1CFGPADCTRL_0_REG 0x8ec
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#define APB_MISC_GP_DDCCFGPADCTRL_0_REG 0x8fc
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#define APB_MISC_GP_GMCAFGPADCTRL_0_REG 0x900
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#define APB_MISC_GP_GMECFGPADCTRL_0_REG 0x910
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#define APB_MISC_GP_GMFCFGPADCTRL_0_REG 0x914
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#define APB_MISC_GP_GMGCFGPADCTRL_0_REG 0x918
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#define APB_MISC_GP_GMHCFGPADCTRL_0_REG 0x91c
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#define APB_MISC_GP_OWRCFGPADCTRL_0_REG 0x920
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#define APB_MISC_GP_UADCFGPADCTRL_0_REG 0x924
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#define APB_MISC_GP_GPVCFGPADCTRL_0_REG 0x928
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#define APB_MISC_GP_DEV3CFGPADCTRL_0_REG 0x92c
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#define APB_MISC_GP_CECCFGPADCTRL_0_REG 0x938
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#define APB_MISC_GP_ATCFG6PADCTRL_0_REG 0x994
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#define APB_MISC_GP_DAP5CFGPADCTRL_0_REG 0x998
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#define APB_MISC_GP_USB_VBUS_EN_CFGPADCTRL_0_REG 0x99c
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#define APB_MISC_GP_AOCFG3PADCTRL_0_REG 0x9a8
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#define APB_MISC_GP_AOCFG0PADCTRL_0_REG 0x9b0
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#define APB_MISC_GP_HVCFG0PADCTRL_0_REG 0x9b4
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#define APB_MISC_GP_SDIO4CFGPADCTRL_0_REG 0x9c4
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#define APB_MISC_GP_AOCFG4PADCTRL_0_REG 0x9c8
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#define APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG0_0_REG 0xc00
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#define APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG1_0_REG 0xc04
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#define APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG2_0_REG 0xc08
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#define APB_MISC_GP_HIDREV_0_MINORREV __BITS(19,16)
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#define APB_MISC_GP_HIDREV_0_CHIPID __BITS(15,8)
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#define APB_MISC_GP_HIDREV_0_MAJORREV __BITS(7,4)
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#define APB_MISC_GP_HIDREV_0_HIDFAM __BITS(3,0)
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#endif /* _ARM_TEGRA_APBREG_H */
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