265 lines
6.8 KiB
C
265 lines
6.8 KiB
C
/* $NetBSD: rtciic.c,v 1.1 2011/02/19 10:46:28 kiyohara Exp $ */
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/*
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* Copyright (c) 2011 KIYOHARA Takashi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: rtciic.c,v 1.1 2011/02/19 10:46:28 kiyohara Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <sys/errno.h>
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#include <machine/autoconf.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/i2c_bitbang.h>
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#include "locators.h"
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#ifdef RTCIIC_DEBUG
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#define DPRINTF(x) printf x
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#else
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#define DPRINTF(x)
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#endif
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#define RTCIIC_SDAR (1 << 3) /* recived serial data */
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#define RTCIIC_SDAW (1 << 2) /* sended serial data */
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#define RTCIIC_SCL (1 << 1) /* serial clock */
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#define RTCIIC_RW (1 << 0) /* data direction (0:write, 1:read) */
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/* This device is Big Endian */
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#define RTCIIC_READ(sc) \
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bswap16(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, 0))
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#define RTCIIC_WRITE(sc, val) \
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bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, 0, bswap16(val))
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struct rtciic_softc {
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device_t sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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struct i2c_controller sc_i2c;
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struct i2c_bitbang_ops sc_bops;
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int sc_rw;
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};
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static int rtciic_match(device_t, cfdata_t , void *);
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static void rtciic_attach(device_t, device_t, void *);
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static int rtciic_acquire_bus(void *, int);
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static void rtciic_release_bus(void *, int);
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static int rtciic_send_start(void *, int);
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static int rtciic_send_stop(void *, int);
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static int rtciic_initiate_xfer(void *, i2c_addr_t, int);
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static int rtciic_read_byte(void *, uint8_t *, int);
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static int rtciic_write_byte(void *, uint8_t, int);
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static void rtciic_set_dir(void *, uint32_t);
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static void rtciic_set_bits(void *, uint32_t);
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static uint32_t rtciic_read_bits(void *);
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CFATTACH_DECL_NEW(rtciic, sizeof(struct rtciic_softc),
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rtciic_match, rtciic_attach, NULL, NULL);
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static int
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rtciic_match(device_t parent, cfdata_t match, void *aux)
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{
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struct mainbus_attach_args *ma = aux;
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if (strcmp(ma->ma_name, match->cf_name) != 0)
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return 0;
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/* Disallow wildcarded values. */
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if (ma->ma_addr1 == MAINBUSCF_ADDR1_DEFAULT)
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return 0;
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/* no irq */
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if (ma->ma_irq1 != MAINBUSCF_IRQ1_DEFAULT)
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return 0;
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return 1;
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}
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void
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rtciic_attach(device_t parent, device_t self, void *aux)
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{
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struct rtciic_softc *sc = device_private(self);
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struct mainbus_attach_args *ma = aux;
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struct i2cbus_attach_args iba;
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sc->sc_dev = self;
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aprint_normal("\n");
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aprint_naive("\n");
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/* Map I/O space(16bit). */
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sc->sc_iot = 0;
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if (bus_space_map(sc->sc_iot, ma->ma_addr1, 2, 0, &sc->sc_ioh)) {
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aprint_error_dev(self, "can't map registers\n");
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return;
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}
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sc->sc_rw = RTCIIC_READ(sc) & RTCIIC_RW;
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/* register with iic */
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sc->sc_i2c.ic_cookie = sc;
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sc->sc_i2c.ic_acquire_bus = rtciic_acquire_bus;
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sc->sc_i2c.ic_release_bus = rtciic_release_bus;
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sc->sc_i2c.ic_exec = NULL;
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sc->sc_i2c.ic_send_start = rtciic_send_start;
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sc->sc_i2c.ic_send_stop = rtciic_send_stop;
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sc->sc_i2c.ic_initiate_xfer = rtciic_initiate_xfer;
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sc->sc_i2c.ic_read_byte = rtciic_read_byte;
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sc->sc_i2c.ic_write_byte = rtciic_write_byte;
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sc->sc_bops.ibo_set_dir = rtciic_set_dir;
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sc->sc_bops.ibo_set_bits = rtciic_set_bits;
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sc->sc_bops.ibo_read_bits = rtciic_read_bits;
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sc->sc_bops.ibo_bits[I2C_BIT_SDA] = RTCIIC_SDAW;
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sc->sc_bops.ibo_bits[I2C_BIT_SCL] = RTCIIC_SCL;
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sc->sc_bops.ibo_bits[I2C_BIT_OUTPUT] = 0;
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sc->sc_bops.ibo_bits[I2C_BIT_INPUT] = RTCIIC_RW;
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memset(&iba, 0, sizeof(iba));
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iba.iba_tag = &sc->sc_i2c;
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(void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print);
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}
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static int
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rtciic_acquire_bus(void *cookie, int flags)
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{
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return 0;
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}
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static void
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rtciic_release_bus(void *cookie, int flags)
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{
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/* nothing */
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}
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static int
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rtciic_send_start(void *arg, int flags)
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{
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struct rtciic_softc *sc = arg;
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return i2c_bitbang_send_start(sc, flags, &sc->sc_bops);
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}
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static int
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rtciic_send_stop(void *arg, int flags)
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{
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struct rtciic_softc *sc = arg;
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return i2c_bitbang_send_stop(sc, flags, &sc->sc_bops);
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}
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static int
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rtciic_initiate_xfer(void *arg, i2c_addr_t addr, int flags)
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{
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struct rtciic_softc *sc = arg;
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return i2c_bitbang_initiate_xfer(sc, addr, flags, &sc->sc_bops);
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}
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static int
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rtciic_read_byte(void *arg, uint8_t *vp, int flags)
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{
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struct rtciic_softc *sc = arg;
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return i2c_bitbang_read_byte(sc, vp, flags, &sc->sc_bops);
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}
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static int
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rtciic_write_byte(void *arg, uint8_t v, int flags)
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{
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struct rtciic_softc *sc = arg;
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return i2c_bitbang_write_byte(sc, v, flags, &sc->sc_bops);
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}
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static void
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rtciic_set_dir(void *arg, uint32_t bits)
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{
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struct rtciic_softc *sc = arg;
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uint16_t reg;
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DPRINTF(("%s: set dir %s\n",
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device_xname(sc->sc_dev), (bits & RTCIIC_RW) ? "READ" : "WRITE"));
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if (sc->sc_rw != (bits & RTCIIC_RW)) {
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reg = RTCIIC_READ(sc);
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reg &= ~RTCIIC_RW;
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reg |= bits;
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RTCIIC_WRITE(sc, reg);
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delay(30);
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sc->sc_rw = bits & RTCIIC_RW;
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}
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}
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static void
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rtciic_set_bits(void *arg, uint32_t bits)
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{
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struct rtciic_softc *sc = arg;
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DPRINTF(("%s: %s\n",
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device_xname(sc->sc_dev),
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(bits == (RTCIIC_SDAW | RTCIIC_SCL)) ? "set SDA/SCL" :
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((bits == RTCIIC_SDAW) ? "set SDA" :
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((bits == RTCIIC_SCL) ? "set SCL" : "reset"))));
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if (sc->sc_rw & RTCIIC_RW) {
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bits &= RTCIIC_SCL;
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bits |= RTCIIC_RW;
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}
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RTCIIC_WRITE(sc, bits);
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delay(40);
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}
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static uint32_t
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rtciic_read_bits(void *arg)
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{
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struct rtciic_softc *sc = arg;
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uint8_t rv, v;
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v = RTCIIC_READ(sc);
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rv = v & RTCIIC_SCL;
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if (v & RTCIIC_SDAR)
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rv |= RTCIIC_SDAW;
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DPRINTF(("%s: read %s\n",
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device_xname(sc->sc_dev),
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(rv == (RTCIIC_SDAW | RTCIIC_SCL)) ? "SDA/SCL" :
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((rv == RTCIIC_SDAW) ? "SDA" :
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((rv == RTCIIC_SCL) ? "SCL" : "no"))));
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return (uint32_t)rv;
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}
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