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Code succesfully passing through booting

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This commit is contained in:
Andrzej Flis
2015-02-14 18:32:55 +01:00
parent 8d84fd8e3b
commit 95b0c215fc
26 changed files with 491 additions and 471 deletions
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2
external/gpl3/gcc/usr.bin/gcc/arch/earmv6hf/defs.mk vendored
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@@ -35,7 +35,7 @@ G_tm_defines=
G_host_xm_file= G_host_xm_file=
G_host_xm_defines= G_host_xm_defines=
G_tm_p_file= G_tm_p_file=
G_target_cpu_default=TARGET_CPU_generic G_target_cpu_default=TARGET_CPU_arm1176jzfs
G_TM_H=tm.h options.h ${GNUHOSTDIST}/gcc/config/dbxelf.h ${GNUHOSTDIST}/gcc/config/elfos.h ${GNUHOSTDIST}/gcc/config/arm/unknown-elf.h ${GNUHOSTDIST}/gcc/config/arm/elf.h ${GNUHOSTDIST}/gcc/config/arm/aout.h ${GNUHOSTDIST}/gcc/config/arm/arm.h ${GNUHOSTDIST}/gcc/config/arm/bpabi.h ${GNUHOSTDIST}/gcc/config/arm/eabi.h ${GNUHOSTDIST}/gcc/config/newlib-stdint.h ${GNUHOSTDIST}/gcc/config/minix-spec.h ${GNUHOSTDIST}/gcc/config/arm/minix.h ${GNUHOSTDIST}/gcc/config/minix.h ${GNUHOSTDIST}/gcc/defaults.h insn-constants.h insn-flags.h options.h G_TM_H=tm.h options.h ${GNUHOSTDIST}/gcc/config/dbxelf.h ${GNUHOSTDIST}/gcc/config/elfos.h ${GNUHOSTDIST}/gcc/config/arm/unknown-elf.h ${GNUHOSTDIST}/gcc/config/arm/elf.h ${GNUHOSTDIST}/gcc/config/arm/aout.h ${GNUHOSTDIST}/gcc/config/arm/arm.h ${GNUHOSTDIST}/gcc/config/arm/bpabi.h ${GNUHOSTDIST}/gcc/config/arm/eabi.h ${GNUHOSTDIST}/gcc/config/newlib-stdint.h ${GNUHOSTDIST}/gcc/config/minix-spec.h ${GNUHOSTDIST}/gcc/config/arm/minix.h ${GNUHOSTDIST}/gcc/config/minix.h ${GNUHOSTDIST}/gcc/defaults.h insn-constants.h insn-flags.h options.h
G_ALL_OPT_FILES=${GNUHOSTDIST}/gcc/lto/lang.opt ${GNUHOSTDIST}/gcc/c.opt ${GNUHOSTDIST}/gcc/common.opt ${GNUHOSTDIST}/gcc/config/arm/arm.opt ${GNUHOSTDIST}/gcc/config/arm/eabi.opt G_ALL_OPT_FILES=${GNUHOSTDIST}/gcc/lto/lang.opt ${GNUHOSTDIST}/gcc/c.opt ${GNUHOSTDIST}/gcc/common.opt ${GNUHOSTDIST}/gcc/config/arm/arm.opt ${GNUHOSTDIST}/gcc/config/arm/eabi.opt
G_tm_file_list=options.h ${GNUHOSTDIST}/gcc/config/dbxelf.h ${GNUHOSTDIST}/gcc/config/elfos.h ${GNUHOSTDIST}/gcc/config/arm/unknown-elf.h ${GNUHOSTDIST}/gcc/config/arm/elf.h ${GNUHOSTDIST}/gcc/config/arm/aout.h ${GNUHOSTDIST}/gcc/config/arm/arm.h ${GNUHOSTDIST}/gcc/config/arm/bpabi.h ${GNUHOSTDIST}/gcc/config/arm/eabi.h ${GNUHOSTDIST}/gcc/config/newlib-stdint.h ${GNUHOSTDIST}/gcc/config/minix-spec.h ${GNUHOSTDIST}/gcc/config/arm/minix.h ${GNUHOSTDIST}/gcc/config/minix.h ${GNUHOSTDIST}/gcc/defaults.h G_tm_file_list=options.h ${GNUHOSTDIST}/gcc/config/dbxelf.h ${GNUHOSTDIST}/gcc/config/elfos.h ${GNUHOSTDIST}/gcc/config/arm/unknown-elf.h ${GNUHOSTDIST}/gcc/config/arm/elf.h ${GNUHOSTDIST}/gcc/config/arm/aout.h ${GNUHOSTDIST}/gcc/config/arm/arm.h ${GNUHOSTDIST}/gcc/config/arm/bpabi.h ${GNUHOSTDIST}/gcc/config/arm/eabi.h ${GNUHOSTDIST}/gcc/config/newlib-stdint.h ${GNUHOSTDIST}/gcc/config/minix-spec.h ${GNUHOSTDIST}/gcc/config/arm/minix.h ${GNUHOSTDIST}/gcc/config/minix.h ${GNUHOSTDIST}/gcc/defaults.h

2
external/gpl3/gcc/usr.bin/gcc/arch/earmv6hf/tm.h vendored
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@@ -4,7 +4,7 @@
#ifndef GCC_TM_H #ifndef GCC_TM_H
#define GCC_TM_H #define GCC_TM_H
#define TARGET_CPU_DEFAULT (TARGET_CPU_generic) #define TARGET_CPU_DEFAULT (TARGET_CPU_arm1176jzfs)
#ifdef IN_GCC #ifdef IN_GCC
# include "options.h" # include "options.h"
# include "config/dbxelf.h" # include "config/dbxelf.h"

4
minix/include/arch/earmv6hf/include/memory.h
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@@ -4,7 +4,7 @@
#define _ARM_MEMORY_H #define _ARM_MEMORY_H
/* omap */ /* omap */
#define PHYS_MEM_BEGIN 0x80000000 #define PHYS_MEM_BEGIN 0x00000000
#define PHYS_MEM_END 0xbfffffff #define PHYS_MEM_END 0x3fffffff
#endif /* _ARM_MEMORY_H */ #endif /* _ARM_MEMORY_H */

2
minix/include/minix/board.h
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@@ -164,7 +164,7 @@ static struct shortname2id shortname2id[] = {
{.name = "BBXM",.id = BOARD_ID_BBXM}, {.name = "BBXM",.id = BOARD_ID_BBXM},
{.name = "A335BONE",.id = BOARD_ID_BBW}, {.name = "A335BONE",.id = BOARD_ID_BBW},
{.name = "A335BNLT",.id = BOARD_ID_BBB}, {.name = "A335BNLT",.id = BOARD_ID_BBB},
{.name = "RPIBPL",.id = BOARD_ID_RPI}, {.name = "rpi_b",.id = BOARD_ID_RPI},
}; };
struct board_id2name struct board_id2name

10
minix/kernel/arch/earmv6hf/arch_system.c
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@@ -115,19 +115,21 @@ void arch_init(void)
/* enable user space access to cycle counter */ /* enable user space access to cycle counter */
/* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360e/I1003211.html */
/* set cycle counter to 0: ARM ARM B4.1.113 and B4.1.117 */ /* set cycle counter to 0: ARM ARM B4.1.113 and B4.1.117 */
asm volatile ("MRC p15, 0, %0, c9, c12, 0\t\n": "=r" (value)); asm volatile ("MRC p15, 0, %0, c15, c12, 0\t\n": "=r" (value));
value |= PMU_PMCR_C; /* Reset counter */ value |= PMU_PMCR_C; /* Reset counter */
value |= PMU_PMCR_E; /* Enable counter hardware */ value |= PMU_PMCR_E; /* Enable counter hardware */
asm volatile ("MCR p15, 0, %0, c9, c12, 0\t\n": : "r" (value)); asm volatile ("MCR p15, 0, %0, c15, c12, 0\t\n": : "r" (value));
/* enable CCNT counting: ARM ARM B4.1.116 */ /* enable CCNT counting: ARM ARM B4.1.116 */
value = PMU_PMCNTENSET_C; /* Enable PMCCNTR cycle counter */ value = PMU_PMCNTENSET_C; /* Enable PMCCNTR cycle counter */
asm volatile ("MCR p15, 0, %0, c9, c12, 1\t\n": : "r" (value)); asm volatile ("MCR p15, 0, %0, c15, c12, 1\t\n": : "r" (value));
/* enable cycle counter in user mode: ARM ARM B4.1.124 */ /* enable cycle counter in user mode: ARM ARM B4.1.124 */
/* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360e/I1003211.html */
value = PMU_PMUSERENR_EN; value = PMU_PMUSERENR_EN;
asm volatile ("MCR p15, 0, %0, c9, c14, 0\t\n": : "r" (value)); asm volatile ("MCR p15, 0, %0, c15, c9, 0\t\n": : "r" (value));
bsp_init(); bsp_init();
} }

4
minix/kernel/arch/earmv6hf/bsp/rpi/rpi_init.c
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@@ -1,3 +1,4 @@
#include "kernel/kernel.h"
#include <sys/types.h> #include <sys/types.h>
#include "bsp_init.h" #include "bsp_init.h"
#include "bsp_padconf.h" #include "bsp_padconf.h"
@@ -8,10 +9,11 @@ void
bsp_init() bsp_init()
{ {
/* map memory for padconf */ /* map memory for padconf */
/* bcm2835 does not have pad ctrl */
bsp_padconf_init(); bsp_padconf_init();
/* map memory for rtc */ /* map memory for rtc */
omap3_rtc_init(); rpi_rtc_init();
/* map memory for reset control */ /* map memory for reset control */
bsp_reset_init(); bsp_reset_init();

168
minix/kernel/arch/earmv6hf/bsp/rpi/rpi_intr.c
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@@ -12,61 +12,145 @@
#include "hw_intr.h" #include "hw_intr.h"
#include "rpi_intr_registers.h" #include "rpi_intr_registers.h"
static struct omap_intr
#define NR_BANKS 3
static struct rpi_intr
{ {
vir_bytes base; vir_bytes base;
int size; int size;
} omap_intr; } rpi_intr;
static kern_phys_map intr_phys_map; /* Bitwise table of IRQs that have been enabled on the ARM. */
static u32_t bcm2835_enabled_irqs[3];
static kern_phys_map intr_phys_map;
int int intr_init(const int auto_eoi)
intr_init(const int auto_eoi)
{ {
if (BOARD_IS_BBXM(machine.board_id)) { if (BOARD_IS_RPI(machine.board_id))
omap_intr.base = OMAP3_DM37XX_INTR_BASE; {
} else if (BOARD_IS_BB(machine.board_id)) { rpi_intr.base = RPI_INTR_BASE;
omap_intr.base = OMAP3_AM335X_INTR_BASE; }
} else { else
panic {
("Can not do the interrupt setup. machine (0x%08x) is unknown\n", panic("Can not do the interrupt setup. machine (0x%08x) is unknown\n",machine.board_id);
machine.board_id); };
}; rpi_intr.size = 0x1000; /* 4K */
omap_intr.size = 0x1000; /* 4K */
kern_phys_map_ptr(omap_intr.base, omap_intr.size, kern_phys_map_ptr(rpi_intr.base, rpi_intr.size,
VMMF_UNCACHED | VMMF_WRITE, VMMF_UNCACHED | VMMF_WRITE,
&intr_phys_map, (vir_bytes) & omap_intr.base); &intr_phys_map, (vir_bytes) & rpi_intr.base);
return 0; return 0;
} }
void /*
bsp_irq_handle(void) * Check if the pending bit for an IRQ line is set; if so, call the handler
* function.
*/
void check_irq_pending(u32_t irq_num)
{ {
/* Function called from assembly to handle interrupts */ u32_t handle = FALSE;
/* get irq */ /* Check the appropriate hardware register, depending on the IRQ number. */
int irq = if ( irq_num >= 0x40 )
mmio_read(omap_intr.base + {
OMAP3_INTCPS_SIR_IRQ) & OMAP3_INTR_ACTIVEIRQ_MASK; u32_t irqPending = mmio_read( rpi_intr.base + RPI_INTCPS_PENDING_IRQ_BASIC );
/* handle irq */ if ( irqPending & ( 1 << ( irq_num - 0x40 ) ) )
irq_handle(irq); {
/* re-enable. this should not trigger interrupts due to current cpsr handle = TRUE;
* state */ }
mmio_write(omap_intr.base + OMAP3_INTCPS_CONTROL, }
OMAP3_INTR_NEWIRQAGR); else if ( irq_num >= 0x20 )
{
u32_t irqPending1 = mmio_read( rpi_intr.base + RPI_INTCPS_PENDING_IRQ1 );
if ( irqPending1 & ( 1 << ( irq_num - 0x20 ) ) )
{
handle = TRUE;
}
}
else
{
u32_t irqPending0 = mmio_read( rpi_intr.base + RPI_INTCPS_PENDING_IRQ0 );
if ( irqPending0 & ( 1 << irq_num ) )
{
handle = TRUE;
}
}
if (handle)
{
irq_handle(irq_num);
/* The pending bit should have been cleared in a device-specific way by
* the handler function. As far as we can tell, it cannot be cleared
* directly through the interrupt controller. */
}
} }
void /*
bsp_irq_unmask(int irq) * Processes all pending interrupt requests.
*
* On the BCM2835 (Raspberry Pi), this done by iterating through all registered
* interrupts on the ARM and checking whether each one is pending. This is not
* necessarily the fastest way to do it, but this should minimize problems with
* the poorly-documented hardware and conflicts with the GPU.
*/
/* Find index of first set bit in a nonzero word. */
static inline ulong first_set_bit(ulong word)
{ {
mmio_write(OMAP3_INTR_MIR_CLEAR(omap_intr.base, irq >> 5), return 31 - __builtin_clz(word);
1 << (irq & 0x1f));
} }
void void bsp_irq_handle(void)
bsp_irq_mask(const int irq)
{ {
mmio_write(OMAP3_INTR_MIR_SET(omap_intr.base, irq >> 5), u32_t bank;
1 << (irq & 0x1f));
for ( bank = 0; bank < NR_BANKS; bank++ )
{
u32_t mask = bcm2835_enabled_irqs[bank];
while ( mask != 0 )
{
u32_t bit = first_set_bit( mask );
mask ^= ( 1 << bit );
check_irq_pending( bit + ( bank << 5 ) );
}
}
} }
void bsp_irq_unmask(int irq)
{
if ( irq < 0x20 ) //gpu0: 0-31
{
mmio_write( rpi_intr.base + RPI_INTCPS_MIR_CLEAR0, ( 1 << irq ) );
bcm2835_enabled_irqs[0] |= ( 1 << irq );
}
else if ( irq < 0x40 ) //gpu1: 32-63
{
mmio_write( rpi_intr.base + RPI_INTCPS_MIR_CLEAR1, ( 1 << ( irq - 0x20 ) ) );
bcm2835_enabled_irqs[1] |= ( 1 << ( irq - 0x20 ) );
}
else //arm: 64-95 (in fact 71)
{
mmio_write( rpi_intr.base + RPI_INTCPS_MIR_CLEAR_BASIC, ( 1 << ( irq - 0x40 ) ) );
bcm2835_enabled_irqs[2] |= ( 1 << ( irq - 0x40 ) );
}
}
void bsp_irq_mask(const int irq)
{
if ( irq < 0x20 )
{
mmio_write( ( rpi_intr.base + RPI_INTCPS_MIR_SET0 ), ( 1 << irq ) );
bcm2835_enabled_irqs[0] &= ~( 1 << irq );
}
else if ( irq < 0x40 )
{
mmio_write( ( rpi_intr.base + RPI_INTCPS_MIR_SET1 ), ( 1 << ( irq - 0x20 ) ) );
bcm2835_enabled_irqs[1] &= ~( 1 << ( irq - 0x20 ) );
}
else
{
mmio_write( ( rpi_intr.base + RPI_INTCPS_MIR_SET_BASIC ), ( 1 << ( irq - 0x40 ) ) );
bcm2835_enabled_irqs[2] &= ~( 1 << ( irq - 0x40 ) );
}
}

16
minix/kernel/arch/earmv6hf/bsp/rpi/rpi_intr_registers.h
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@@ -1,9 +1,17 @@
#ifndef _OMAP_INTR_H #ifndef _RPI_INTR_H
#define _OMAP_INTR_H #define _RPI_INTR_H
/* Interrupt controller memory map */ /* Interrupt controller memory map */
#define OMAP3_DM37XX_INTR_BASE 0x48200000 /* INTCPS physical address */ #define RPI_INTR_BASE 0x2000B200 /* INTCPS physical address */
#define RPI_INTCPS_PENDING_IRQ_BASIC 0x00
#define RPI_INTCPS_PENDING_IRQ0 0x04
#define RPI_INTCPS_PENDING_IRQ1 0x08
#define RPI_INTCPS_MIR_SET0 0x1C /* Set interrupt mask bits */
#define RPI_INTCPS_MIR_SET1 0x20 /* Set interrupt mask bits */
#define RPI_INTCPS_MIR_SET_BASIC 0x24 /* Set interrupt mask bits */
#define RPI_INTCPS_MIR_CLEAR0 0x10 /* Clear interrupt mask bits */
#define RPI_INTCPS_MIR_CLEAR1 0x14 /* Clear interrupt mask bits */
#define RPI_INTCPS_MIR_CLEAR_BASIC 0x18 /* Clear interrupt mask bits */
/* Interrupt controller memory map */ /* Interrupt controller memory map */
#define OMAP3_AM335X_INTR_BASE 0x48200000 /* INTCPS physical address */ #define OMAP3_AM335X_INTR_BASE 0x48200000 /* INTCPS physical address */

56
minix/kernel/arch/earmv6hf/bsp/rpi/rpi_padconf.c
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@@ -1,4 +1,4 @@
/* Implements sys_padconf() for the AM335X and DM37XX. */ /* Implements sys_padconf() for the BCM2835. */
#include "kernel/kernel.h" #include "kernel/kernel.h"
#include "arch_proto.h" #include "arch_proto.h"
@@ -15,69 +15,15 @@
#include "bsp_padconf.h" #include "bsp_padconf.h"
struct omap_padconf
{
vir_bytes base;
vir_bytes offset;
vir_bytes size;
unsigned int board_filter_value;
unsigned int board_filter_mask;
};
static struct omap_padconf omap_padconfs[] = {
{
.base = PADCONF_DM37XX_REGISTERS_BASE,
.offset = PADCONF_DM37XX_REGISTERS_OFFSET,
.size = PADCONF_DM37XX_REGISTERS_SIZE,
.board_filter_value = BOARD_FILTER_BBXM_VALUE,
.board_filter_mask = BOARD_FILTER_BBXM_MASK,
},
{
.base = PADCONF_AM335X_REGISTERS_BASE,
.offset = PADCONF_AM335X_REGISTERS_OFFSET,
.size = PADCONF_AM335X_REGISTERS_SIZE,
.board_filter_value = BOARD_FILTER_BB_VALUE,
.board_filter_mask = BOARD_FILTER_BB_MASK,
},
};
/* initialized in init */
static struct omap_padconf *omap_padconf;
static kern_phys_map padconf_phys_map;
int int
bsp_padconf_set(u32_t padconf, u32_t mask, u32_t value) bsp_padconf_set(u32_t padconf, u32_t mask, u32_t value)
{ {
/* check that the value will be inside the padconf memory range */
if (padconf >= (omap_padconf->size - omap_padconf->offset)) {
return EINVAL; /* outside of valid range */
}
set32(padconf + omap_padconf->base + omap_padconf->offset, mask,
value);
return OK; return OK;
} }
void void
bsp_padconf_init(void) bsp_padconf_init(void)
{ {
int x;
omap_padconf = NULL;
/* find the correct padconf */
for (x = 0; x < sizeof(omap_padconfs) / sizeof(omap_padconfs[0]); x++) {
if ((omap_padconfs[x].board_filter_mask & machine.board_id) ==
omap_padconfs[x].board_filter_value) {
omap_padconf = &omap_padconfs[x];
break;
}
}
assert(omap_padconf);
kern_phys_map_ptr(omap_padconf->base, omap_padconf->size,
VMMF_UNCACHED | VMMF_WRITE,
&padconf_phys_map, (vir_bytes) & omap_padconf->base);
return; return;
} }

64
minix/kernel/arch/earmv6hf/bsp/rpi/rpi_reset.c
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@@ -15,55 +15,13 @@
#include "rpi_timer_registers.h" #include "rpi_timer_registers.h"
#include "rpi_rtc.h" #include "rpi_rtc.h"
#define AM335X_CM_BASE 0x44E00000 void bsp_reset_init(void)
#define AM335X_CM_SIZE 0x1000
#define AM335X_PRM_DEVICE_OFFSET 0xf00
#define AM335X_PRM_RSTCTRL_REG 0x00
#define AM335X_RST_GLOBAL_WARM_SW_BIT 0
#define DM37XX_CM_BASE 0x48307000
#define DM37XX_CM_SIZE 0x1000
#define DM37XX_PRM_RSTCTRL_REG 0x250
#define DM37XX_RST_DPLL3_BIT 2
struct omap_reset
{ {
vir_bytes base;
vir_bytes size;
};
static struct omap_reset omap_reset;
static kern_phys_map reset_phys_map;
void
bsp_reset_init(void)
{
if (BOARD_IS_BBXM(machine.board_id)) {
omap_reset.base = DM37XX_CM_BASE;
omap_reset.size = DM37XX_CM_SIZE;
} else if (BOARD_IS_BB(machine.board_id)) {
omap_reset.base = AM335X_CM_BASE;
omap_reset.size = AM335X_CM_SIZE;
}
kern_phys_map_ptr(omap_reset.base, omap_reset.size,
VMMF_UNCACHED | VMMF_WRITE,
&reset_phys_map, (vir_bytes) & omap_reset.base);
} }
void void
bsp_reset(void) bsp_reset(void)
{ {
if (BOARD_IS_BBXM(machine.board_id)) {
mmio_set((omap_reset.base + DM37XX_PRM_RSTCTRL_REG),
(1 << DM37XX_RST_DPLL3_BIT));
} else if (BOARD_IS_BB(machine.board_id)) {
mmio_set((omap_reset.base + AM335X_PRM_DEVICE_OFFSET +
AM335X_PRM_RSTCTRL_REG),
(1 << AM335X_RST_GLOBAL_WARM_SW_BIT));
}
} }
void void
@@ -77,10 +35,10 @@ bsp_poweroff(void)
* The only way to pull the pin low is via ALARM2 (see TRM 20.3.3.8). * The only way to pull the pin low is via ALARM2 (see TRM 20.3.3.8).
* At this point PM should have already signaled readclock to set the alarm. * At this point PM should have already signaled readclock to set the alarm.
*/ */
if (BOARD_IS_BB(machine.board_id)) { if (BOARD_IS_RPI(machine.board_id)) {
/* rtc was frozen to prevent premature power-off, unfreeze it /* rtc was frozen to prevent premature power-off, unfreeze it
* now */ * now */
omap3_rtc_run(); rpi_rtc_run();
/* wait for the alarm to go off and PMIC to disable power to /* wait for the alarm to go off and PMIC to disable power to
* SoC */ * SoC */
@@ -90,11 +48,17 @@ bsp_poweroff(void)
void bsp_disable_watchdog(void) void bsp_disable_watchdog(void)
{ {
if(BOARD_IS_BB(machine.board_id)) { if(BOARD_IS_RPI(machine.board_id))
mmio_write(AM335X_WDT_BASE+AM335X_WDT_WSPR, 0xAAAA); {
while(mmio_read(AM335X_WDT_BASE+AM335X_WDT_WWPS) != 0) ; u32_t tmp, wdog, rstc;
mmio_write(AM335X_WDT_BASE+AM335X_WDT_WSPR, 0x5555); tmp = mmio_read(RPI_WDT_BASE+RPI_PM_RSTC);
while(mmio_read(AM335X_WDT_BASE+AM335X_WDT_WWPS) != 0) ; rstc = wdog = RPI_PM_PASSWORD;
rstc |= tmp &~ RPI_PM_RSTC_CONFIGMASK;
rstc |= RPI_PM_RSTC_FULL_RESET;
wdog |= ( 10 & RPI_PM_WDOG_TIMEMASK );
mmio_write( ( RPI_WDT_BASE + RPI_PM_WDOG ), wdog );
mmio_write( ( RPI_WDT_BASE + RPI_PM_RSTC ), rstc );
} }
} }

34
minix/kernel/arch/earmv6hf/bsp/rpi/rpi_rtc.c
View File

@@ -19,40 +19,12 @@
#include "arch_proto.h" #include "arch_proto.h"
#include "rpi_rtc.h" #include "rpi_rtc.h"
#define RTC_SS_BASE 0x44e3e000 void rpi_rtc_init(void)
#define RTC_SS_SIZE 0x1000
#define RTC_CTRL_REG 0x40
#define RTC_CTRL_RTC_STOP_BIT 0
struct omap_rtc
{ {
vir_bytes base;
vir_bytes size;
};
static struct omap_rtc omap_rtc = {
.base = RTC_SS_BASE,
.size = RTC_SS_SIZE
};
static kern_phys_map rtc_phys_map;
void
omap3_rtc_init(void)
{
if (BOARD_IS_BB(machine.board_id)) {
kern_phys_map_ptr(omap_rtc.base, omap_rtc.size,
VMMF_UNCACHED | VMMF_WRITE, &rtc_phys_map,
(vir_bytes) & omap_rtc.base);
}
} }
void void rpi_rtc_run(void)
omap3_rtc_run(void)
{ {
if (BOARD_IS_BB(machine.board_id)) {
/* Setting the stop bit starts the RTC running */
mmio_set((omap_rtc.base + RTC_CTRL_REG),
(1 << RTC_CTRL_RTC_STOP_BIT));
}
} }

10
minix/kernel/arch/earmv6hf/bsp/rpi/rpi_rtc.h
View File

@@ -1,7 +1,7 @@
#ifndef __OMAP_RTC_H #ifndef __RPI_RTC_H
#define __OMAP_RTC_H #define __RPI_RTC_H
void omap3_rtc_init(void); void rpi_rtc_init(void);
void omap3_rtc_run(void); void rpi_rtc_run(void);
#endif /* __OMAP_RTC_H */ #endif /* __RPI_RTC_H */

23
minix/kernel/arch/earmv6hf/bsp/rpi/rpi_serial.c
View File

@@ -45,11 +45,10 @@ static kern_phys_map serial_phys_map;
void void
bsp_ser_init() bsp_ser_init()
{ {
/*if (BOARD_IS_RPI(machine.board_id)) if (BOARD_IS_RPI(machine.board_id))
{ {
rpi_serial.base = RPI_BCM2835_DEBUG_UART_BASE; rpi_serial.base = RPI_BCM2835_DEBUG_UART_BASE;
}*/ }
rpi_serial.base = RPI_BCM2835_DEBUG_UART_BASE;
rpi_serial.size = 0x1000; /* 4k */ rpi_serial.size = 0x1000; /* 4k */
kern_phys_map_ptr(rpi_serial.base, rpi_serial.size, kern_phys_map_ptr(rpi_serial.base, rpi_serial.size,
@@ -63,14 +62,24 @@ bsp_ser_putc(char c)
{ {
int i; int i;
assert(rpi_serial.base); assert(rpi_serial.base);
/* Wait until there is space in the FIFO */
/* Wait until FIFO's empty */ /* Wait until FIFO's empty */
while ( mmio_read(rpi_serial.base + RPI_UART_FR) & RPI_UARTFR_TXFF ); for (i = 0; i < 100000; i++)
{
if ( mmio_read(rpi_serial.base + RPI_UART_FR) & RPI_UARTFR_TXFF )
{
break;
}
}
/* Write character */ /* Write character */
mmio_write(rpi_serial.base + RPI_UART_DR, c); mmio_write(rpi_serial.base + RPI_UART_DR, c);
/* Wait until FIFO's empty */ /* Wait until FIFO's empty */
while ( mmio_read(rpi_serial.base + RPI_UART_FR) & RPI_UARTFR_TXFF ); for (i = 0; i < 100000; i++)
{
if ( mmio_read(rpi_serial.base + RPI_UART_FR) & RPI_UARTFR_TXFF )
{
break;
}
}
} }

17
minix/kernel/arch/earmv6hf/bsp/rpi/rpi_serial.h
View File

@@ -2,30 +2,13 @@
#define _RPI_SERIAL_H #define _RPI_SERIAL_H
/* UART register map */ /* UART register map */
//#define OMAP3_DM37XX_DEBUG_UART_BASE 0x49020000 /* UART3 physical address */
//#define OMAP3_AM335X_DEBUG_UART_BASE 0x44E09000 /* UART0? physical address */
#define RPI_BCM2835_DEBUG_UART_BASE 0x20201000 /* miniUART - uses PL011 module */ #define RPI_BCM2835_DEBUG_UART_BASE 0x20201000 /* miniUART - uses PL011 module */
/* UART registers */ /* UART registers */
//#define OMAP3_THR 0x000 /* Transmit holding register */
//#define OMAP3_LSR 0x014 /* Line status register */
//#define OMAP3_SSR 0x044 /* Supplementary status register */
#define RPI_UART_DR 0 // data register #define RPI_UART_DR 0 // data register
#define RPI_UART_FR 0x18 // flag register #define RPI_UART_FR 0x18 // flag register
/* Line status register fields */ /* Line status register fields */
//#define OMAP3_LSR_TEMT 0x40 /* Transmitter empty */
//#define OMAP3_LSR_THRE 0x20 /* Transmit-hold-register empty */
#define RPI_UARTFR_TXFF (1 << 5) // tramit FIFO full #define RPI_UARTFR_TXFF (1 << 5) // tramit FIFO full
/* Supplementary status register fields */
//#define OMAP3_SSR_TX_FIFO_FULL (1 << 0) /* Transmit FIFO full */
#ifndef __ASSEMBLY__
void omap3_ser_init();
void omap3_ser_putc(char c);
#endif /* __ASSEMBLY__ */
#endif /* _RPI_SERIAL_H */ #endif /* _RPI_SERIAL_H */

12
minix/kernel/arch/earmv6hf/bsp/rpi/rpi_timer_registers.h
View File

@@ -1,7 +1,6 @@
#ifndef _OMAP_TIMER_REGISTERS_H #ifndef _OMAP_TIMER_REGISTERS_H
#define _OMAP_TIMER_REGISTERS_H #define _OMAP_TIMER_REGISTERS_H
/* General-purpose timer register map */ /* General-purpose timer register map */
#define OMAP3_GPTIMER1_BASE 0x48318000 /* GPTIMER1 physical address */ #define OMAP3_GPTIMER1_BASE 0x48318000 /* GPTIMER1 physical address */
#define OMAP3_GPTIMER2_BASE 0x49032000 /* GPTIMER2 physical address */ #define OMAP3_GPTIMER2_BASE 0x49032000 /* GPTIMER2 physical address */
@@ -65,9 +64,14 @@
#define AM335X_TIMER_TSICR 0x054 /* Control posted mode and functional SW reset */ #define AM335X_TIMER_TSICR 0x054 /* Control posted mode and functional SW reset */
#define AM335X_TIMER_TCAR2 0x058 /* Second captured value of counter register */ #define AM335X_TIMER_TCAR2 0x058 /* Second captured value of counter register */
#define AM335X_WDT_BASE 0x44E35000 /* watchdog timer */ #define RPI_WDT_BASE 0x20100000 /* watchdog timer */
#define AM335X_WDT_WWPS 0x34 /* command posted status */ #define RPI_PM_RSTC 0x1c
#define AM335X_WDT_WSPR 0x48 /* activate/deactivate sequence */ #define RPI_PM_WDOG 0x24
#define RPI_PM_PASSWORD 0x5a00000
#define RPI_PM_RSTC_RESET 0x00000102
#define RPI_PM_RSTC_CONFIGMASK 0x00000030
#define RPI_PM_RSTC_FULL_RESET 0x00000020
#define RPI_PM_WDOG_TIMEMASK 0x000fffff
/* Interrupt status register fields */ /* Interrupt status register fields */
#define OMAP3_TISR_MAT_IT_FLAG (1 << 0) /* Pending match interrupt status */ #define OMAP3_TISR_MAT_IT_FLAG (1 << 0) /* Pending match interrupt status */

4
minix/kernel/arch/earmv6hf/exception.c
View File

@@ -71,8 +71,8 @@ static void pagefault( struct proc *pr,
} }
if(is_nested) { if(is_nested) {
printf("pagefault in kernel at pc 0x%lx address 0x%lx\n", printf("pagefault in kernel at pc 0x%lx address 0x%lx, flags = 0x%x\n",
*saved_lr, pagefault_addr); *saved_lr, pagefault_addr, pagefault_status);
inkernel_disaster(pr, saved_lr, NULL, is_nested); inkernel_disaster(pr, saved_lr, NULL, is_nested);
} }

3
minix/kernel/arch/earmv6hf/head.S
View File

@@ -31,8 +31,7 @@ multiboot_init:
ldr sp, =load_stack_start /* make usable stack */ ldr sp, =load_stack_start /* make usable stack */
mov fp, #0 mov fp, #0
bl _C_LABEL(pre_init) bl _C_LABEL(pre_init)
b hang
/*b multiboot_init*/
/* Kernel is mapped high now and ready to go, with /* Kernel is mapped high now and ready to go, with
* the boot info pointer returned by pre_init in r0. * the boot info pointer returned by pre_init in r0.
* Set the highly mapped stack and initialize it. * Set the highly mapped stack and initialize it.

21
minix/kernel/arch/earmv6hf/include/cpufunc.h
View File

@@ -103,6 +103,7 @@ static inline u32_t ipow2(u32_t t)
* type = 2 == INVALIDATE * type = 2 == INVALIDATE
*/ */
static inline void dcache_maint(int type){ static inline void dcache_maint(int type){
#if 0
u32_t cache_level ; u32_t cache_level ;
u32_t clidr; u32_t clidr;
u32_t ctype; u32_t ctype;
@@ -138,16 +139,30 @@ static inline void dcache_maint(int type){
u32_t val = ( way << (32 - way_bits) ) | (set << l) | (cache_level << 1 ); u32_t val = ( way << (32 - way_bits) ) | (set << l) | (cache_level << 1 );
if (type == 1) { if (type == 1) {
/* DCCISW, Data Cache Clean and Invalidate by Set/Way */ /* DCCISW, Data Cache Clean and Invalidate by Set/Way */
asm volatile("mcr p15, 0, %[set], c7, c14, 2 @ DCCISW" asm volatile("mcr p15, 0, %[set], c7, c14, 2 @ DCCISW"
: : [set] "r" (val)); : : [set] "r" (val));
} else if (type ==2 ){ } else if (type ==2 ){
/* DCISW, Data Cache Invalidate by Set/Way */ /* DCISW, Data Cache Invalidate by Set/Way */
asm volatile("mcr p15, 0, %[set], c7, c6, 2" asm volatile("mcr p15, 0, %[set], c7, c6, 2"
: : [set] "r" (val)); : : [set] "r" (val));
} }
} }
} }
} }
#endif //0
if (type == 1)
{
// invalidate caches
asm volatile ("mcr p15, 0, %0, c7, c7, 0" :: "r" (0) : "memory");
//invalidate tlb
asm volatile ("mcr p15, 0, %0, c8, c7, 0" :: "r" (0) : "memory");
//mcr p15,0,r2,c8,c7,0 ;@ invalidate tlb
}
else if (type ==2 )
{
// invalidate d-cache
asm volatile("mcr p15, 0, r0, c7, c6, 0" : : "r" (0) : );
}
dsb(); dsb();
isb(); isb();

4
minix/kernel/arch/earmv6hf/kernel.lds
View File

@@ -1,8 +1,8 @@
OUTPUT_ARCH("arm") OUTPUT_ARCH("arm")
ENTRY(__k_unpaged_MINIX) ENTRY(__k_unpaged_MINIX)
_kern_phys_base = 0x00008000; _kern_phys_base = 0x00200000;
_kern_vir_base = 0xc0008000; /* map kernel high for max. user vir space */ _kern_vir_base = 0xc0400000; /* map kernel high for max. user vir space */
_kern_offset = (_kern_vir_base - _kern_phys_base); _kern_offset = (_kern_vir_base - _kern_phys_base);
__k_unpaged__kern_offset = _kern_offset; __k_unpaged__kern_offset = _kern_offset;

13
minix/kernel/arch/earmv6hf/pg_utils.c
View File

@@ -218,24 +218,21 @@ void vm_enable_paging(void)
sctlr |= CPU_CONTROL_MMU_ENABLE; sctlr |= CPU_CONTROL_MMU_ENABLE;
/* TRE set to zero (default reset value): TEX[2:0] are used, plus C and B bits.*/ /* TRE set to zero (default reset value): TEX[2:0] are used, plus C and B bits.*/
sctlr &= ~CPU_CONTROL_TR_ENABLE; //sctlr &= ~CPU_CONTROL_TR_ENABLE;
/* AFE set to zero (default reset value): not using simplified model. */ /* AFE set to zero (default reset value): not using simplified model. */
sctlr &= ~CPU_CONTROL_AF_ENABLE; //sctlr &= ~CPU_CONTROL_AF_ENABLE;
/* Enable instruction ,data cache and branch prediction */ /* Enable instruction ,data cache and branch prediction */
sctlr |= CPU_CONTROL_DC_ENABLE; sctlr |= CPU_CONTROL_DC_ENABLE;
sctlr |= CPU_CONTROL_IC_ENABLE; sctlr |= CPU_CONTROL_IC_ENABLE;
sctlr |= CPU_CONTROL_BPRD_ENABLE;
/* Enable barriers */ /* Enable barriers */
sctlr |= CPU_CONTROL_32BD_ENABLE; sctlr |= CPU_CONTROL_32BD_ENABLE;
sctlr |= CPU_CONTROL_32BP_ENABLE;
/* Enable L2 cache (cortex-a8) */ sctlr |= CPU_CONTROL_UNAL_ENABLE;
#define CORTEX_A8_L2EN (0x02) sctlr |= CPU_CONTROL_XP_ENABLE;
actlr = read_actlr();
actlr |= CORTEX_A8_L2EN;
write_actlr(actlr);
write_sctlr(sctlr); write_sctlr(sctlr);
} }

29
minix/kernel/arch/earmv6hf/pre_init.c
View File

@@ -179,9 +179,9 @@ int overlaps(multiboot_module_t *mod, int n, int cmp_mod)
/* XXX: hard-coded stuff for modules */ /* XXX: hard-coded stuff for modules */
#define MB_MODS_NR NR_BOOT_MODULES #define MB_MODS_NR NR_BOOT_MODULES
#define MB_MODS_BASE 0x82000000 #define MB_MODS_BASE 0x02000000
#define MB_MODS_ALIGN 0x00800000 /* 8 MB */ #define MB_MODS_ALIGN 0x00800000 /* 8 MB */
#define MB_MMAP_START 0x80000000 #define MB_MMAP_START 0x00000000
#define MB_MMAP_SIZE 0x10000000 /* 256 MB */ #define MB_MMAP_SIZE 0x10000000 /* 256 MB */
multiboot_module_t mb_modlist[MB_MODS_NR]; multiboot_module_t mb_modlist[MB_MODS_NR];
@@ -371,7 +371,7 @@ void set_machine_id(char *cmdline)
} }
} }
kinfo_t *pre_init( int argc, char **argv) kinfo_t *pre_init(int argc, char **argv)
{ {
char *bootargs; char *bootargs;
/* This is the main "c" entry point into the kernel. It gets called /* This is the main "c" entry point into the kernel. It gets called
@@ -386,30 +386,27 @@ kinfo_t *pre_init( int argc, char **argv)
* arguments. by convention the second argument is the * arguments. by convention the second argument is the
* command line */ * command line */
if (argc != 2) { if (argc != 2) {
//POORMANS_FAILURE_NOTIFICATION; POORMANS_FAILURE_NOTIFICATION;
} }
//bootargs = argv[1]; bootargs = argv[1];
//set_machine_id(bootargs); set_machine_id(bootargs);
bsp_ser_init(); bsp_ser_init();
bsp_ser_putc('t');
bsp_ser_putc('a');
bsp_ser_putc('k');
/* Get our own copy boot params pointed to by ebx. /* Get our own copy boot params pointed to by ebx.
* Here we find out whether we should do serial output. * Here we find out whether we should do serial output.
*/ */
//get_parameters(&kinfo, bootargs); get_parameters(&kinfo, bootargs);
/* Make and load a pagetable that will map the kernel /* Make and load a pagetable that will map the kernel
* to where it should be; but first a 1:1 mapping so * to where it should be; but first a 1:1 mapping so
* this code stays where it should be. * this code stays where it should be.
*/ */
//dcache_clean(); /* clean the caches */ dcache_clean(); /* clean the caches */
//pg_clear(); pg_clear();
//pg_identity(&kinfo); pg_identity(&kinfo);
//kinfo.freepde_start = pg_mapkernel(); kinfo.freepde_start = pg_mapkernel();
//pg_load(); pg_load();
//vm_enable_paging(); vm_enable_paging();
/* Done, return boot info so it can be passed to kmain(). */ /* Done, return boot info so it can be passed to kmain(). */
return &kinfo; return &kinfo;

67
minix/kernel/priv.h
View File

@@ -18,45 +18,34 @@
#include "kernel/const.h" #include "kernel/const.h"
#include "kernel/type.h" #include "kernel/type.h"
struct priv { struct priv
proc_nr_t s_proc_nr; /* number of associated process */ {
sys_id_t s_id; /* index of this system structure */ proc_nr_t s_proc_nr; /* number of associated process */
short s_flags; /* PREEMTIBLE, BILLABLE, etc. */ sys_id_t s_id; /* index of this system structure */
short s_flags; /* PREEMTIBLE, BILLABLE, etc. */
/* Asynchronous sends */ /* Asynchronous sends */
vir_bytes s_asyntab; /* addr. of table in process' address space */ vir_bytes s_asyntab; /* addr. of table in process' address space */
size_t s_asynsize; /* number of elements in table. 0 when not in size_t s_asynsize; /* number of elements in table. 0 when not in use */
* use short s_trap_mask; /* allowed system call traps */
*/ sys_map_t s_ipc_to; /* allowed destination processes */
bitchunk_t s_k_call_mask[SYS_CALL_MASK_SIZE]; /* allowed kernel calls */
short s_trap_mask; /* allowed system call traps */ endpoint_t s_sig_mgr; /* signal manager for system signals */
sys_map_t s_ipc_to; /* allowed destination processes */ endpoint_t s_bak_sig_mgr; /* backup signal manager for system signals */
sys_map_t s_notify_pending; /* bit map with pending notifications */
/* allowed kernel calls */ sys_map_t s_asyn_pending; /* bit map with pending asyn messages */
bitchunk_t s_k_call_mask[SYS_CALL_MASK_SIZE]; irq_id_t s_int_pending; /* pending hardware interrupts */
sigset_t s_sig_pending; /* pending signals */
endpoint_t s_sig_mgr; /* signal manager for system signals */ minix_timer_t s_alarm_timer; /* synchronous alarm timer */
endpoint_t s_bak_sig_mgr; /* backup signal manager for system signals */ reg_t *s_stack_guard; /* stack guard word for kernel tasks */
sys_map_t s_notify_pending; /* bit map with pending notifications */ char s_diag_sig; /* send a SIGKMESS when diagnostics arrive? */
sys_map_t s_asyn_pending; /* bit map with pending asyn messages */ int s_nr_io_range; /* allowed I/O ports */
irq_id_t s_int_pending; /* pending hardware interrupts */ struct io_range s_io_tab[NR_IO_RANGE];
sigset_t s_sig_pending; /* pending signals */ int s_nr_mem_range; /* allowed memory ranges */
struct minix_mem_range s_mem_tab[NR_MEM_RANGE];
minix_timer_t s_alarm_timer; /* synchronous alarm timer */ int s_nr_irq; /* allowed IRQ lines */
reg_t *s_stack_guard; /* stack guard word for kernel tasks */ int s_irq_tab[NR_IRQ];
vir_bytes s_grant_table; /* grant table address of process, or 0 */
char s_diag_sig; /* send a SIGKMESS when diagnostics arrive? */ int s_grant_entries; /* no. of entries, or 0 */
int s_nr_io_range; /* allowed I/O ports */
struct io_range s_io_tab[NR_IO_RANGE];
int s_nr_mem_range; /* allowed memory ranges */
struct minix_mem_range s_mem_tab[NR_MEM_RANGE];
int s_nr_irq; /* allowed IRQ lines */
int s_irq_tab[NR_IRQ];
vir_bytes s_grant_table; /* grant table address of process, or 0 */
int s_grant_entries; /* no. of entries, or 0 */
}; };
/* Guard word for task stacks. */ /* Guard word for task stacks. */

73
minix/kernel/proc.c
View File

@@ -118,44 +118,47 @@ static void set_idle_name(char * name, int n)
void proc_init(void) void proc_init(void)
{ {
struct proc * rp; struct proc * rp;
struct priv *sp; struct priv *sp;
int i; int i;
/* Clear the process table. Announce each slot as empty and set up /* Clear the process table. Announce each slot as empty and set up
* mappings for proc_addr() and proc_nr() macros. Do the same for the * mappings for proc_addr() and proc_nr() macros. Do the same for the
* table with privilege structures for the system processes. * table with privilege structures for the system processes.
*/ */
for (rp = BEG_PROC_ADDR, i = -NR_TASKS; rp < END_PROC_ADDR; ++rp, ++i) { for (rp = BEG_PROC_ADDR, i = -NR_TASKS; rp < END_PROC_ADDR; ++rp, ++i)
rp->p_rts_flags = RTS_SLOT_FREE;/* initialize free slot */ {
rp->p_magic = PMAGIC; rp->p_rts_flags = RTS_SLOT_FREE; /* initialize free slot */
rp->p_nr = i; /* proc number from ptr */ rp->p_magic = PMAGIC;
rp->p_endpoint = _ENDPOINT(0, rp->p_nr); /* generation no. 0 */ rp->p_nr = i; /* proc number from ptr */
rp->p_scheduler = NULL; /* no user space scheduler */ rp->p_endpoint = _ENDPOINT(0, rp->p_nr); /* generation no. 0 */
rp->p_priority = 0; /* no priority */ rp->p_scheduler = NULL; /* no user space scheduler */
rp->p_quantum_size_ms = 0; /* no quantum size */ rp->p_priority = 0; /* no priority */
rp->p_quantum_size_ms = 0; /* no quantum size */
/* arch-specific initialization */ /* arch-specific initialization */
arch_proc_reset(rp); arch_proc_reset(rp);
} }
for (sp = BEG_PRIV_ADDR, i = 0; sp < END_PRIV_ADDR; ++sp, ++i) { for (sp = BEG_PRIV_ADDR, i = 0; sp < END_PRIV_ADDR; ++sp, ++i)
sp->s_proc_nr = NONE; /* initialize as free */ {
sp->s_id = (sys_id_t) i; /* priv structure index */ sp->s_proc_nr = NONE; /* initialize as free */
ppriv_addr[i] = sp; /* priv ptr from number */ sp->s_id = (sys_id_t) i; /* priv structure index */
sp->s_sig_mgr = NONE; /* clear signal managers */ ppriv_addr[i] = sp; /* priv ptr from number */
sp->s_bak_sig_mgr = NONE; sp->s_sig_mgr = NONE; /* clear signal managers */
} sp->s_bak_sig_mgr = NONE;
}
idle_priv.s_flags = IDL_F; idle_priv.s_flags = IDL_F;
/* initialize IDLE structures for every CPU */ /* initialize IDLE structures for every CPU */
for (i = 0; i < CONFIG_MAX_CPUS; i++) { for (i = 0; i < CONFIG_MAX_CPUS; i++)
struct proc * ip = get_cpu_var_ptr(i, idle_proc); {
ip->p_endpoint = IDLE; struct proc * ip = get_cpu_var_ptr(i, idle_proc);
ip->p_priv = &idle_priv; ip->p_endpoint = IDLE;
/* must not let idle ever get scheduled */ ip->p_priv = &idle_priv;
ip->p_rts_flags |= RTS_PROC_STOP; /* must not let idle ever get scheduled */
set_idle_name(ip->p_name, i); ip->p_rts_flags |= RTS_PROC_STOP;
} set_idle_name(ip->p_name, i);
}
} }
static void switch_address_space_idle(void) static void switch_address_space_idle(void)

239
minix/kernel/proc.h
View File

@@ -6,79 +6,71 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
/* Here is the declaration of the process table. It contains all process /* Here is the declaration of the process table. It contains all process data, including
* data, including registers, flags, scheduling priority, memory map, * registers, flags, scheduling priority, memory map, accounting, message passing (IPC)
* accounting, message passing (IPC) information, and so on. * information, and so on.
* * Many assembly code routines reference fields in it. The offsets to these fields are
* Many assembly code routines reference fields in it. The offsets to these * defined in the assembler include file sconst.h. When changing struct proc, be sure
* fields are defined in the assembler include file sconst.h. When changing * to change sconst.h to match. */
* struct proc, be sure to change sconst.h to match.
*/
#include <minix/com.h> #include <minix/com.h>
#include <minix/portio.h> #include <minix/portio.h>
#include "const.h" #include "const.h"
#include "priv.h" #include "priv.h"
struct proc { struct proc
struct stackframe_s p_reg; /* process' registers saved in stack frame */ {
struct segframe p_seg; /* segment descriptors */ struct stackframe_s p_reg; /* process' registers saved in stack frame */
proc_nr_t p_nr; /* number of this process (for fast access) */ struct segframe p_seg; /* segment descriptors */
struct priv *p_priv; /* system privileges structure */ proc_nr_t p_nr; /* number of this process (for fast access) */
volatile u32_t p_rts_flags; /* process is runnable only if zero */ struct priv *p_priv; /* system privileges structure */
volatile u32_t p_misc_flags; /* flags that do not suspend the process */ volatile u32_t p_rts_flags; /* process is runnable only if zero */
volatile u32_t p_misc_flags; /* flags that do not suspend the process */
char p_priority; /* current process priority */
u64_t p_cpu_time_left; /* time left to use the cpu */
unsigned p_quantum_size_ms; /* assigned time quantum in ms FIXME remove this*/
struct proc *p_scheduler; /* who should get out of quantum msg */
unsigned p_cpu; /* what CPU is the process running on */
char p_priority; /* current process priority */
u64_t p_cpu_time_left; /* time left to use the cpu */
unsigned p_quantum_size_ms; /* assigned time quantum in ms
FIXME remove this */
struct proc *p_scheduler; /* who should get out of quantum msg */
unsigned p_cpu; /* what CPU is the process running on */
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
bitchunk_t p_cpu_mask[BITMAP_CHUNKS(CONFIG_MAX_CPUS)]; /* what CPUs is the bitchunk_t p_cpu_mask[BITMAP_CHUNKS(CONFIG_MAX_CPUS)];
process allowed to /* what CPUs is the process allowed to run on */
run on */ bitchunk_t p_stale_tlb[BITMAP_CHUNKS(CONFIG_MAX_CPUS)];
bitchunk_t p_stale_tlb[BITMAP_CHUNKS(CONFIG_MAX_CPUS)]; /* On which cpu are /* On which cpu are possibly stale entries from
possibly stale entries from this process and has this process and has to be fresed the next
to be fresed the next kernel touches this kernel touches this processes memory */
processes memory
*/
#endif #endif
/* Accounting statistics that get passed to the process' scheduler */ /* Accounting statistics that get passed to the process' scheduler */
struct { struct
u64_t enter_queue; /* time when enqueued (cycles) */ {
u64_t time_in_queue; /* time spent in queue */ u64_t enter_queue; /* time when enqueued (cycles) */
unsigned long dequeues; u64_t time_in_queue; /* time spent in queue */
unsigned long ipc_sync; unsigned long dequeues;
unsigned long ipc_async; unsigned long ipc_sync;
unsigned long preempted; unsigned long ipc_async;
} p_accounting; unsigned long preempted;
} p_accounting;
clock_t p_user_time; /* user time in ticks */
clock_t p_sys_time; /* sys time in ticks */
clock_t p_virt_left; /* number of ticks left on virtual timer */
clock_t p_prof_left; /* number of ticks left on profile timer */
u64_t p_cycles; /* how many cycles did the process use */
u64_t p_kcall_cycles; /* kernel cycles caused by this proc (kcall) */
u64_t p_kipc_cycles; /* cycles caused by this proc (ipc) */
clock_t p_user_time; /* user time in ticks */ struct proc *p_nextready; /* pointer to next ready process */
clock_t p_sys_time; /* sys time in ticks */ struct proc *p_caller_q; /* head of list of procs wishing to send */
struct proc *p_q_link; /* link to next proc wishing to send */
clock_t p_virt_left; /* number of ticks left on virtual timer */ endpoint_t p_getfrom_e; /* from whom does process want to receive? */
clock_t p_prof_left; /* number of ticks left on profile timer */ endpoint_t p_sendto_e; /* to whom does process want to send? */
sigset_t p_pending; /* bit map for pending kernel signals */
u64_t p_cycles; /* how many cycles did the process use */ char p_name[PROC_NAME_LEN];/* name of the process, including \0 */
u64_t p_kcall_cycles; /* kernel cycles caused by this proc (kcall) */ endpoint_t p_endpoint; /* endpoint number, generation-aware */
u64_t p_kipc_cycles; /* cycles caused by this proc (ipc) */ message p_sendmsg; /* Message from this process if SENDING */
message p_delivermsg; /* Message for this process if MF_DELIVERMSG */
struct proc *p_nextready; /* pointer to next ready process */ vir_bytes p_delivermsg_vir; /* Virtual addr this proc wants message at */
struct proc *p_caller_q; /* head of list of procs wishing to send */
struct proc *p_q_link; /* link to next proc wishing to send */
endpoint_t p_getfrom_e; /* from whom does process want to receive? */
endpoint_t p_sendto_e; /* to whom does process want to send? */
sigset_t p_pending; /* bit map for pending kernel signals */
char p_name[PROC_NAME_LEN]; /* name of the process, including \0 */
endpoint_t p_endpoint; /* endpoint number, generation-aware */
message p_sendmsg; /* Message from this process if SENDING */
message p_delivermsg; /* Message for this process if MF_DELIVERMSG */
vir_bytes p_delivermsg_vir; /* Virtual addr this proc wants message at */
/* If handler functions detect a process wants to do something with /* If handler functions detect a process wants to do something with
* memory that isn't present, VM has to fix it. Until it has asked * memory that isn't present, VM has to fix it. Until it has asked
@@ -87,80 +79,81 @@ struct proc {
* The requester gets a copy of its request message in reqmsg and gets * The requester gets a copy of its request message in reqmsg and gets
* VMREQUEST set. * VMREQUEST set.
*/ */
struct { struct
struct proc *nextrestart; /* next in vmrestart chain */ {
struct proc *nextrequestor; /* next in vmrequest chain */ struct proc *nextrestart; /* next in vmrestart chain */
#define VMSTYPE_SYS_NONE 0 struct proc *nextrequestor; /* next in vmrequest chain */
#define VMSTYPE_KERNELCALL 1 #define VMSTYPE_SYS_NONE 0
#define VMSTYPE_DELIVERMSG 2 #define VMSTYPE_KERNELCALL 1
#define VMSTYPE_MAP 3 #define VMSTYPE_DELIVERMSG 2
#define VMSTYPE_MAP 3
int type; /* suspended operation */
union
{
/* VMSTYPE_SYS_MESSAGE */
message reqmsg; /* suspended request message */
} saved;
int type; /* suspended operation */ /* Parameters of request to VM */
union { int req_type;
/* VMSTYPE_SYS_MESSAGE */ endpoint_t target;
message reqmsg; /* suspended request message */ union
} saved; {
struct
{
vir_bytes start, length; /* memory range */
u8_t writeflag; /* nonzero for write access */
} check;
} params;
/* VM result when available */
int vmresult;
/* Parameters of request to VM */ /* If the suspended operation is a sys_call, its details are stored here. */
int req_type;
endpoint_t target;
union {
struct {
vir_bytes start, length; /* memory range */
u8_t writeflag; /* nonzero for write access */
} check;
} params;
/* VM result when available */
int vmresult;
/* If the suspended operation is a sys_call, its details are
* stored here.
*/
} p_vmrequest; } p_vmrequest;
int p_found; /* consistency checking variables */ int p_found; /* consistency checking variables */
int p_magic; /* check validity of proc pointers */ int p_magic; /* check validity of proc pointers */
/* if MF_SC_DEFER is set, this struct is valid and contains the /* if MF_SC_DEFER is set, this struct is valid and contains the do_ipc() arguments that are still to be executed */
* do_ipc() arguments that are still to be executed struct
*/ {
struct { reg_t r1, r2, r3; } p_defer; reg_t r1, r2, r3;
} p_defer;
u64_t p_signal_received; u64_t p_signal_received;
#if DEBUG_TRACE #if DEBUG_TRACE
int p_schedules; int p_schedules;
#endif #endif
}; };
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
/* Bits for the runtime flags. A process is runnable iff p_rts_flags == 0. */ /* Bits for the runtime flags. A process is runnable iff p_rts_flags == 0. */
#define RTS_SLOT_FREE 0x01 /* process slot is free */ #define RTS_SLOT_FREE 0x01 /* process slot is free */
#define RTS_PROC_STOP 0x02 /* process has been stopped */ #define RTS_PROC_STOP 0x02 /* process has been stopped */
#define RTS_SENDING 0x04 /* process blocked trying to send */ #define RTS_SENDING 0x04 /* process blocked trying to send */
#define RTS_RECEIVING 0x08 /* process blocked trying to receive */ #define RTS_RECEIVING 0x08 /* process blocked trying to receive */
#define RTS_SIGNALED 0x10 /* set when new kernel signal arrives */ #define RTS_SIGNALED 0x10 /* set when new kernel signal arrives */
#define RTS_SIG_PENDING 0x20 /* unready while signal being processed */ #define RTS_SIG_PENDING 0x20 /* unready while signal being processed */
#define RTS_P_STOP 0x40 /* set when process is being traced */ #define RTS_P_STOP 0x40 /* set when process is being traced */
#define RTS_NO_PRIV 0x80 /* keep forked system process from running */ #define RTS_NO_PRIV 0x80 /* keep forked system process from running */
#define RTS_NO_ENDPOINT 0x100 /* process cannot send or receive messages */ #define RTS_NO_ENDPOINT 0x100 /* process cannot send or receive messages */
#define RTS_VMINHIBIT 0x200 /* not scheduled until pagetable set by VM */ #define RTS_VMINHIBIT 0x200 /* not scheduled until pagetable set by VM */
#define RTS_PAGEFAULT 0x400 /* process has unhandled pagefault */ #define RTS_PAGEFAULT 0x400 /* process has unhandled pagefault */
#define RTS_VMREQUEST 0x800 /* originator of vm memory request */ #define RTS_VMREQUEST 0x800 /* originator of vm memory request */
#define RTS_VMREQTARGET 0x1000 /* target of vm memory request */ #define RTS_VMREQTARGET 0x1000 /* target of vm memory request */
#define RTS_PREEMPTED 0x4000 /* this process was preempted by a higher #define RTS_PREEMPTED 0x4000 /* this process was preempted by a higher
priority process and we should pick a new one priority process and we should pick a
to run. Processes with this flag should be new one to run. Processes with this flag
returned to the front of their current should be returned to the front of their
priority queue if they are still runnable current priority queue if they are still
before we pick a new one runnable before we pick a new one */
*/ #define RTS_NO_QUANTUM 0x8000 /* process ran out of its quantum and we should
#define RTS_NO_QUANTUM 0x8000 /* process ran out of its quantum and we should pick a new one. Process was dequeued and
pick a new one. Process was dequeued and should be enqueued at the end of some run
should be enqueued at the end of some run queue again */
queue again */ #define RTS_BOOTINHIBIT 0x10000 /* not ready until VM has made it */
#define RTS_BOOTINHIBIT 0x10000 /* not ready until VM has made it */
/* A process is runnable iff p_rts_flags == 0. */ /* A process is runnable iff p_rts_flags == 0. */
#define rts_f_is_runnable(flg) ((flg) == 0) #define rts_f_is_runnable(flg) ((flg) == 0)

21
releasetools/arm_sdimage.sh
View File

@@ -163,7 +163,6 @@ mkdir -p ${IMG_DIR}
# #
${RELEASETOOLSDIR}/fetch_u-boot.sh -o ${RELEASETOOLSDIR}/u-boot -a $U_BOOT_SOURCE -b $U_BOOT_BRANCH -n $U_BOOT_GIT_VERSION -d $U_BOOT_BIN_DIR ${RELEASETOOLSDIR}/fetch_u-boot.sh -o ${RELEASETOOLSDIR}/u-boot -a $U_BOOT_SOURCE -b $U_BOOT_BRANCH -n $U_BOOT_GIT_VERSION -d $U_BOOT_BIN_DIR
cp ${RELEASETOOLSDIR}/u-boot/${U_BOOT_BIN_DIR}/u-boot.img ${IMG_DIR}/ cp ${RELEASETOOLSDIR}/u-boot/${U_BOOT_BIN_DIR}/u-boot.img ${IMG_DIR}/
#cp ${RELEASETOOLSDIR}/u-boot/${U_BOOT_BIN_DIR}/MLO ${IMG_DIR}/
if [ ${CREATE_IMAGE_ONLY} -eq 0 ] if [ ${CREATE_IMAGE_ONLY} -eq 0 ]
then then
@@ -176,8 +175,8 @@ then
# #
# Now start the build. # Now start the build.
# #
#sh ${BUILDSH} -j ${JOBS} -m ${ARCH} -O ${OBJ} -D ${DESTDIR} ${BUILDVARS} -U -u cleandir
sh ${BUILDSH} -j ${JOBS} -m ${ARCH} -O ${OBJ} -D ${DESTDIR} ${BUILDVARS} -U -u distribution sh ${BUILDSH} -j ${JOBS} -m ${ARCH} -O ${OBJ} -D ${DESTDIR} ${BUILDVARS} -U -u distribution
fi fi
# #
@@ -247,14 +246,16 @@ ${MKFS_VFAT_CMD} ${MKFS_VFAT_OPTS} ${IMG_DIR}/fat.img
#${RELEASETOOLSDIR}/gen_uEnv.txt.sh -c ${CONSOLE} -n -p bb/ > ${IMG_DIR}/uEnv.txt #${RELEASETOOLSDIR}/gen_uEnv.txt.sh -c ${CONSOLE} -n -p bb/ > ${IMG_DIR}/uEnv.txt
echo "Copying configuration kernel and boot modules" echo "Copying configuration kernel and boot modules"
${RELEASETOOLSDIR}/gen_uEnv.txt.sh -c ${CONSOLE} -a ${ARCH} > ${IMG_DIR}/textfile.txt ${RELEASETOOLSDIR}/gen_uEnv.txt.sh -c ${CONSOLE} -a ${ARCH} -t uEnv > ${IMG_DIR}/uEnv.txt
case $ARCH in case $ARCH in
evbearm-el) evbearm-el)
mcopy -bsp -i ${IMG_DIR}/fat.img ${IMG_DIR}/$MLO ::MLO mcopy -bsp -i ${IMG_DIR}/fat.img ${IMG_DIR}/$MLO ::MLO
mcopy -bsp -i ${IMG_DIR}/fat.img ${IMG_DIR}/textfile.txt ::uEnv.txt mcopy -bsp -i ${IMG_DIR}/fat.img ${IMG_DIR}/uEnv.txt ::uEnv.txt
;; ;;
evbearmv6hf-el) evbearmv6hf-el)
${RELEASETOOLSDIR}/gen_uEnv.txt.sh -c ${CONSOLE} -a ${ARCH} -t config > ${IMG_DIR}/config.txt
#copy rpi FW #copy rpi FW
mcopy -bsp -i ${IMG_DIR}/fat.img ${RELEASETOOLSDIR}/fw/rpi/bootcode.bin ::bootcode.bin mcopy -bsp -i ${IMG_DIR}/fat.img ${RELEASETOOLSDIR}/fw/rpi/bootcode.bin ::bootcode.bin
mcopy -bsp -i ${IMG_DIR}/fat.img ${RELEASETOOLSDIR}/fw/rpi/fixup_cd.dat ::fixup_cd.dat mcopy -bsp -i ${IMG_DIR}/fat.img ${RELEASETOOLSDIR}/fw/rpi/fixup_cd.dat ::fixup_cd.dat
@@ -263,7 +264,8 @@ evbearmv6hf-el)
mcopy -bsp -i ${IMG_DIR}/fat.img ${RELEASETOOLSDIR}/fw/rpi/start_cd.elf ::start_cd.elf mcopy -bsp -i ${IMG_DIR}/fat.img ${RELEASETOOLSDIR}/fw/rpi/start_cd.elf ::start_cd.elf
mcopy -bsp -i ${IMG_DIR}/fat.img ${RELEASETOOLSDIR}/fw/rpi/start_x.elf ::start_x.elf mcopy -bsp -i ${IMG_DIR}/fat.img ${RELEASETOOLSDIR}/fw/rpi/start_x.elf ::start_x.elf
mcopy -bsp -i ${IMG_DIR}/fat.img ${RELEASETOOLSDIR}/fw/rpi/start.elf ::start.elf mcopy -bsp -i ${IMG_DIR}/fat.img ${RELEASETOOLSDIR}/fw/rpi/start.elf ::start.elf
mcopy -bsp -i ${IMG_DIR}/fat.img ${IMG_DIR}/textfile.txt ::config.txt mcopy -bsp -i ${IMG_DIR}/fat.img ${IMG_DIR}/config.txt ::config.txt
mcopy -bsp -i ${IMG_DIR}/fat.img ${IMG_DIR}/uEnv.txt ::uEnv.txt
;; ;;
esac esac
@@ -298,8 +300,11 @@ done
# #
# For tftp booting # For tftp booting
# #
cp ${IMG_DIR}/textfile.txt ${OBJ}/ cp ${IMG_DIR}/uEnv.txt ${OBJ}/
if [ "$ARCH" == "evbearmv6hf-el" ]
then
cp ${IMG_DIR}/config.txt ${OBJ}/
fi
# #
# Create the empty image where we later will put the partitions in. # Create the empty image where we later will put the partitions in.
# Make sure it is at least 2GB, otherwise the SD card will not be detected # Make sure it is at least 2GB, otherwise the SD card will not be detected

64
releasetools/gen_uEnv.txt.sh
View File

@@ -1,7 +1,7 @@
#!/usr/bin/env bash #!/usr/bin/env bash
#generate a u-boot u-env. #generate a u-boot u-env.
list="0x80200000 kernel.bin list_BBB="0x80200000 kernel.bin
0x82000000 ds.elf 0x82000000 ds.elf
0x82800000 rs.elf 0x82800000 rs.elf
0x83000000 pm.elf 0x83000000 pm.elf
@@ -14,6 +14,18 @@ list="0x80200000 kernel.bin
0x86800000 pfs.elf 0x86800000 pfs.elf
0x87000000 init.elf" 0x87000000 init.elf"
list_RPI="0x200000 kernel.bin
0x2000000 ds.elf
0x2800000 rs.elf
0x3000000 pm.elf
0x3800000 sched.elf
0x4000000 vfs.elf
0x4800000 memory.elf
0x5000000 tty.elf
0x5800000 mfs.elf
0x6000000 vm.elf
0x6800000 pfs.elf
0x7000000 init.elf"
#################### ####################
fill_cmd() { fill_cmd() {
@@ -21,6 +33,13 @@ fill_cmd() {
#prefix is an optional directory containing the ending / #prefix is an optional directory containing the ending /
load=$1 load=$1
prefix=$2 prefix=$2
if [ "$ARCH" == "evbearm-el" ]
then
list=$list_BBB
elif [ "$ARCH" == "evbearmv6hf-el" ]
then
list=$list_RPI
fi
export IFS=" " export IFS=" "
echo $list | while true echo $list | while true
do do
@@ -29,11 +48,11 @@ fill_cmd() {
break break
fi fi
#e.g. ; fatloat mmc 0:1 0x82000000 mydir/ds.elf #e.g. ; fatloat mmc 0:1 0x82000000 mydir/ds.elf
echo -n "; $load $mem $prefix$addr" echo -n "$load $mem $prefix$addr;"
done done
} }
fill_uEnvFile() fill_uEnvFile_BBB()
{ {
echo "# Set the command to be executed" echo "# Set the command to be executed"
echo "uenvcmd=run $BOOT" echo "uenvcmd=run $BOOT"
@@ -52,7 +71,22 @@ fill_uEnvFile()
exit 0 exit 0
} }
fill_CmdFile() fill_uEnvFile_RPI()
{
echo "# Set the command to be executed"
echo "bootargs=console=$CONSOLE verbose=$VERBOSE hz=$HZ"
echo
echo 'bootminix=setenv bootargs \$bootargs board_name=\$board_name ; echo \$bootargs; go 0x200000 \\\"$bootargs\\\"'
echo
echo "bootcmd=echo starting from MMC; $(fill_cmd "fatload mmc 0:1" "") run bootminix"
echo "# Netbooting."
echo "ethaddr=e8:03:9a:24:f9:10"
echo "netbootcmd=echo starting from TFTP; usb start; $(fill_cmd "dhcp" "") run bootminix"
echo "bootcmd=run netbootcmd"
exit 0
}
fill_CfgFile_RPI()
{ {
echo "kernel=u-boot.img" echo "kernel=u-boot.img"
exit 0 exit 0
@@ -66,11 +100,12 @@ BOOT="mmcbootcmd"
#default for the beagleboard-xM #default for the beagleboard-xM
CONSOLE=tty02 CONSOLE=tty02
#verbosity #verbosity
VERBOSE=0 VERBOSE=3
HZ=1000 HZ=1000
ARCH=evbearm-el ARCH=evbearm-el
FILE_TYPE=""
while getopts "c:v:h:p:n:a:?" c while getopts "c:v:h:p:n:a:t:?" c
do do
case "$c" in case "$c" in
\?) \?)
@@ -97,14 +132,27 @@ do
;; ;;
a) a)
ARCH=$OPTARG ARCH=$OPTARG
;;
t)
FILE_TYPE=$OPTARG
;;
esac esac
done done
if [ "$ARCH" == "evbearm-el" ] if [ "$ARCH" == "evbearm-el" ]
then then
fill_uEnvFile if [ "$FILE_TYPE" == "uEnv" ]
then
fill_uEnvFile_BBB
fi
elif [ "$ARCH" == "evbearmv6hf-el" ] elif [ "$ARCH" == "evbearmv6hf-el" ]
then then
fill_CmdFile if [ "$FILE_TYPE" == "uEnv" ]
then
fill_uEnvFile_RPI
elif [ "$FILE_TYPE" == "config" ]
then
fill_CfgFile_RPI
fi
fi fi