sambuc/atomthreads
1
0
Fork 0
mirror of https://github.com/kelvinlawson/atomthreads.git synced 2026-09-25 14:50:19 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity

Please enter the commit message for your changes. Lines starting

Browse Source
This commit is contained in:
Natie van Rooyen
2012-05-17 23:42:58 +02:00
parent 5cc1e9831d
commit 113f0a8690
4 changed files with 51 additions and 35 deletions
Download Patch File Download Diff File Expand all files Collapse all files
ports/armv7/atomport.c
+17 -1
View File
@@ -83,6 +83,7 @@ thread_shell (void)
void void
archThreadContextInit (ATOM_TCB *tcb_ptr, void *stack_top, void (*entry_point)(uint32_t), uint32_t entry_param) archThreadContextInit (ATOM_TCB *tcb_ptr, void *stack_top, void (*entry_point)(uint32_t), uint32_t entry_param)
{ {
static uint32_t context_thread_id = 0 ;
uint32_t * stack_ptr ; uint32_t * stack_ptr ;
tcb_ptr->sp_save_ptr = stack_top; tcb_ptr->sp_save_ptr = stack_top;
@@ -91,7 +92,7 @@ archThreadContextInit (ATOM_TCB *tcb_ptr, void *stack_top, void (*entry_point)(u
stack_ptr = (uint32_t *)stack_top; //-- Load stack pointer stack_ptr = (uint32_t *)stack_top; //-- Load stack pointer
*stack_ptr = ( uint32_t ) entry ; *stack_ptr = ( uint32_t ) thread_shell ;
stack_ptr--; stack_ptr--;
*stack_ptr = ( uint32_t ) 0x00001111; /* R11 */ *stack_ptr = ( uint32_t ) 0x00001111; /* R11 */
@@ -166,5 +167,20 @@ archTickHandler (void)
atomIntExit(TRUE); atomIntExit(TRUE);
} }
/**
* \b archTickInit
*
* System timer initialization.
*
*/
void
archTickInit (void)
{
/* Initialize NVIC PendSV */
contextInit () ;
/* Initializa Timer Hardware */
/* ... */
}
ports/armv7/atomport_arm.asm
+31 -33
View File
@@ -37,10 +37,9 @@
EXPORT contextEnableInterrupts EXPORT contextEnableInterrupts
EXPORT contextEnterCritical EXPORT contextEnterCritical
EXPORT contextExitCritical EXPORT contextExitCritical
EXPORT __irq_context_handler EXPORT archIRQHandler
EXTERN __context_preempt_handler [WEAK]
EXTERN archTickHandler
;-- ;--
ARM_SVC_MODE EQU 0xd3 ARM_SVC_MODE EQU 0xd3
@@ -49,9 +48,7 @@ ARM_FIQ_MODE EQU 0xD1
ARM_MODE_MASK EQU 0x1F ARM_MODE_MASK EQU 0x1F
ARM_FIQ_MODE_BITS EQU 0x11 ARM_FIQ_MODE_BITS EQU 0x11
ARM_IRQ_MODE_BITS EQU 0x12 ARM_IRQ_MODE_BITS EQU 0x12
ARM_SVC_MODE_BITS EQU 0x13
CONTEXT_SWITCH_MODE EQU ARM_SVC_MODE
ARM ARM
@@ -85,19 +82,19 @@ contextSwitch
STMFD sp!, {r4 - r11, lr} ;- Save registers STMFD sp!, {r4 - r11, lr} ;- Save registers
;- IF :DEF:CONTEXT_THREAD_ID ;- IF :DEF:CONTEXT_THREAD_ID
MRC p15,0,r3,c13,c0,2 MRC p15, 0, r3, c13, c0, 2
STMFD sp!, {r3} STMFD sp!, {r3}
;- ENDIF ;- ENDIF
STR sp, [r0] ;- Save old stack pointer STR sp, [r0] ;- Save old stack pointer
LDR r1, [r1] LDR r1, [r1] ;- Load new stack pointer
MOV sp, r1 ;- Load new stack pointer MOV sp, r1
ISB ISB
;- IF :DEF:CONTEXT_THREAD_ID ;- IF :DEF:CONTEXT_THREAD_ID
LDMFD sp!, {r3} LDMFD sp!, {r3}
MCR p15,0,r3,c13,c0,2 MCR p15, 0, r3, c13, c0, 2
;- ENDIF ;- ENDIF
LDMFD sp!, {r4 - r11, pc} ;- Load new registers LDMFD sp!, {r4 - r11, pc} ;- Load new registers
@@ -113,11 +110,11 @@ contextSwitch
; ;
contextStart contextStart
LDR r0, [r0] LDR r0, [r0]
MOV sp, r0 ;- Load new stack pointer MOV sp, r0 ;- Load new stack pointer
;- IF :DEF:CONTEXT_THREAD_ID ;- IF :DEF:CONTEXT_THREAD_ID
LDMFD sp!, {r3} LDMFD sp!, {r3}
MCR p15,0,r3,c13,c0,2 MCR p15, 0, r3, c13, c0, 2
;- ENDIF ;- ENDIF
LDMFD sp!, {r4 - r11, pc} ;- Load new registers LDMFD sp!, {r4 - r11, pc} ;- Load new registers
@@ -130,7 +127,7 @@ contextStart
; @return ID ; @return ID
; ;
contextId contextId
MRC p15,0,r0,c13,c0,2 MRC p15, 0, r0, c13, c0, 2
BX lr BX lr
;-- ;--
@@ -141,12 +138,11 @@ contextId
; @return None ; @return None
; ;
contextEnableInterrupts contextEnableInterrupts
MRS r0,CPSR MRS r0, CPSR
MOV r1, #0x80 MOV r1, #0x80
BIC r0,r0,r1 BIC r0, r0, r1
MSR CPSR_c,r0 MSR CPSR_c, r0
BX lr BX lr
;-- ;--
; \b contextExitCritical ; \b contextExitCritical
@@ -158,9 +154,8 @@ contextEnableInterrupts
; @return None ; @return None
; ;
contextExitCritical contextExitCritical
MSR CPSR_cxsf,r0 MSR CPSR_cxsf, r0
BX lr BX lr
;-- ;--
; \b contextEnterCritical ; \b contextEnterCritical
@@ -170,42 +165,45 @@ contextExitCritical
; @return Current interrupt posture ; @return Current interrupt posture
; ;
contextEnterCritical contextEnterCritical
MRS r0,CPSR MRS r0, CPSR
ORR r1,r0,#0x80 ORR r1, r0, #0x80
MSR CPSR_cxsf,r1 MSR CPSR_cxsf, r1
BX lr BX lr
;-- ;--
; \b __irq_context_handler ; \b archIRQHandler
; ;
; IRQ entry point ; IRQ entry point.
;
; Save the process/thread context onto its own stackm before calling __context_preempt_handler ().
; __context_preempt_handler() might switch stacks. On return the same context is poped from the
; stack and control is returned to the process.
; ;
; @return None ; @return None
; ;
__irq_context_handler archIRQHandler
MSR cpsr_c, #CONTEXT_SWITCH_MODE ;- Save current process context MSR cpsr_c, #ARM_SVC_MODE ;- Save current process context in process stack
STMFD sp!, {r0 - r3, ip, lr} STMFD sp!, {r0 - r3, ip, lr}
MSR cpsr_c, #ARM_IRQ_MODE ;- Save lr_irq and spsr_irq in process stack MSR cpsr_c, #ARM_IRQ_MODE ;- Save lr_irq and spsr_irq in process stack
SUB lr,lr,#4 SUB lr, lr, #4
MOV r1, lr MOV r1, lr
MRS r2, spsr MRS r2, spsr
MSR cpsr_c, #CONTEXT_SWITCH_MODE MSR cpsr_c, #ARM_SVC_MODE
STMFD sp!, {r1, r2} STMFD sp!, {r1, r2}
BL __context_preempt_handler ;- Dispatch the interrupt to archTickHandler for the timer tick interrupt or a simular function for other interrupts which might call atomthread functions. BL __context_preempt_handler ;- Dispatch the interrupt to archTickHandler for the timer tick interrupt or a simular function for other interrupts which might call atomthread functions.
LDMFD sp!, {r1, r2} ;- Restore lr_irq and spsr_irq from process stack LDMFD sp!, {r1, r2} ;- Restore lr_irq and spsr_irq from process stack
MSR cpsr_c, #ARM_IRQ_MODE MSR cpsr_c, #ARM_IRQ_MODE
STMFD sp!, {r1} STMFD sp!, {r1}
MSR spsr_cxsf, r2 MSR spsr_cxsf, r2
MSR cpsr_c, #CONTEXT_SWITCH_MODE ;- Restore process regs MSR cpsr_c, #ARM_SVC_MODE ;- Restore process regs
LDMFD sp!, {r0 - r3, ip, lr} LDMFD sp!, {r0 - r3, ip, lr}
MSR cpsr_c, #ARM_IRQ_MODE ;- Exit from ISR MSR cpsr_c, #ARM_IRQ_MODE ;- Exit from IRQ
LDMFD sp!, {pc}^ LDMFD sp!, {pc}^
ports/armv7/atomport_private.h
+2
View File
@@ -33,5 +33,7 @@
/* Function prototypes */ /* Function prototypes */
extern void archTickHandler (void) ; extern void archTickHandler (void) ;
extern void archTickInit (void) ;
extern void archIRQHandler (void) ;
#endif /* __ATOM_PORT_PRIVATE_H__ */ #endif /* __ATOM_PORT_PRIVATE_H__ */
ports/cortex_m3/atomport.c
+1 -1
View File
@@ -94,7 +94,7 @@ archThreadContextInit (ATOM_TCB *tcb_ptr, void *stack_top, void (*entry_point)(u
*stack_ptr = 0x01000000L; //-- xPSR *stack_ptr = 0x01000000L; //-- xPSR
stack_ptr--; stack_ptr--;
*stack_ptr = ((uint32_t)entry_point) | 1; //-- Entry Point (1 for THUMB mode) *stack_ptr = ((uint32_t)thread_shell) | 1; //-- Entry Point (1 for THUMB mode)
stack_ptr--; stack_ptr--;
*stack_ptr = ((uint32_t)/*exit*/0) | 1; //-- R14 (LR) (1 for THUMB mode) *stack_ptr = ((uint32_t)/*exit*/0) | 1; //-- R14 (LR) (1 for THUMB mode)
stack_ptr--; stack_ptr--;