mirror of
https://github.com/kelvinlawson/atomthreads.git
synced 2026-01-11 18:33:16 +01:00
@@ -36,7 +36,7 @@ PART=atmega16
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BUILD_DIR=build
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# Port/application object files
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APP_OBJECTS = atomport.o uart.o tests-main.o
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APP_OBJECTS = atomport.o atomport-private.o uart.o tests-main.o
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APP_ASM_OBJECTS = atomport-asm.o
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# Kernel object files
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90
ports/avr/atomport-private.c
Normal file
90
ports/avr/atomport-private.c
Normal file
@@ -0,0 +1,90 @@
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#include <avr/interrupt.h>
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#include "atom.h"
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#include "atomport-private.h"
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/**
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* \b avrInitSystemTickTimer
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*
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* Initialise the system tick timer. Uses the AVR's timer1 facility.
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*
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* @return None
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*/
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void avrInitSystemTickTimer ( void )
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{
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/* Set timer 1 compare match value for configured system tick,
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* with a prescaler of 256. We will get a compare match 1A
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* interrupt on every system tick, in which we must call the
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* OS's system tick handler. */
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OCR1A = (AVR_CPU_HZ / 256 / SYSTEM_TICKS_PER_SEC);
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/* Enable compare match 1A interrupt */
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#ifdef TIMSK
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TIMSK = _BV(OCIE1A);
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#else
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TIMSK1 = _BV(OCIE1A);
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#endif
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/* Set prescaler 256 */
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TCCR1B = _BV(CS12) | _BV(WGM12);
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}
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/**
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*
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* System tick ISR.
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*
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* This is responsible for regularly calling the OS system tick handler.
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* The system tick handler checks if any timer callbacks are necessary,
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* and runs the scheduler.
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*
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* The compiler automatically saves all registers necessary before calling
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* out to a C routine. This will be (at least) R0, R1, SREG, R18-R27 and
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* R30/R31.
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*
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* The system may decide to schedule in a new thread during the call to
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* atomTimerTick(), in which case around half of the thread's context will
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* already have been saved here, ready for when we return here when the
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* interrupted thread is scheduled back in. The remaining context will be
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* saved by the context switch routine.
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*
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* As with all interrupts, the ISR should call atomIntEnter() and
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* atomIntExit() on entry and exit. This serves two purposes:
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*
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* a) To notify the OS that it is running in interrupt context
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* b) To defer the scheduler until after the ISR is completed
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*
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* We defer all scheduling decisions until after the ISR has completed
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* in case the interrupt handler makes more than one thread ready.
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*
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* @return None
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*/
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ISR (TIMER1_COMPA_vect)
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{
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/* Call the interrupt entry routine */
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atomIntEnter();
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/* Call the OS system tick handler */
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atomTimerTick();
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/* Call the interrupt exit routine */
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atomIntExit(TRUE);
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}
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/**
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*
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* Default (no handler installed) ISR.
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*
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* Installs a default handler to be called if any interrupts occur for
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* which we have not registered an ISR. This is empty and has only been
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* included to handle user-created code which may enable interrupts. The
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* core OS does not enable any interrupts other than the system timer
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* tick interrupt.
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*
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* @return None
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*/
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ISR (BADISR_vect)
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{
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/* Empty */
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}
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@@ -31,9 +31,21 @@
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#define __ATOM_PORT_PRIVATE_H
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/* CPU Frequency */
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#ifdef F_CPU
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#define AVR_CPU_HZ F_CPU
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#else
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#define AVR_CPU_HZ 1000000
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Function prototypes */
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void avrInitSystemTickTimer ( void );
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ATOM_PORT_PRIVATE_H */
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@@ -28,10 +28,7 @@
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*/
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#include <avr/interrupt.h>
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#include "atom.h"
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#include "atomport-private.h"
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/** Forward declarations */
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@@ -268,89 +265,3 @@ void archThreadContextInit (ATOM_TCB *tcb_ptr, void *stack_top, void (*entry_poi
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}
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/**
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* \b avrInitSystemTickTimer
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*
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* Initialise the system tick timer. Uses the AVR's timer1 facility.
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*
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* @return None
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*/
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void avrInitSystemTickTimer ( void )
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{
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/* Set timer 1 compare match value for configured system tick,
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* with a prescaler of 256. We will get a compare match 1A
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* interrupt on every system tick, in which we must call the
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* OS's system tick handler. */
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OCR1A = (AVR_CPU_HZ / 256 / SYSTEM_TICKS_PER_SEC);
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/* Enable compare match 1A interrupt */
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#ifdef TIMSK
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TIMSK = _BV(OCIE1A);
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#else
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TIMSK1 = _BV(OCIE1A);
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#endif
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/* Set prescaler 256 */
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TCCR1B = _BV(CS12) | _BV(WGM12);
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}
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/**
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*
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* System tick ISR.
|
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*
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* This is responsible for regularly calling the OS system tick handler.
|
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* The system tick handler checks if any timer callbacks are necessary,
|
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* and runs the scheduler.
|
||||
*
|
||||
* The compiler automatically saves all registers necessary before calling
|
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* out to a C routine. This will be (at least) R0, R1, SREG, R18-R27 and
|
||||
* R30/R31.
|
||||
*
|
||||
* The system may decide to schedule in a new thread during the call to
|
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* atomTimerTick(), in which case around half of the thread's context will
|
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* already have been saved here, ready for when we return here when the
|
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* interrupted thread is scheduled back in. The remaining context will be
|
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* saved by the context switch routine.
|
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*
|
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* As with all interrupts, the ISR should call atomIntEnter() and
|
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* atomIntExit() on entry and exit. This serves two purposes:
|
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*
|
||||
* a) To notify the OS that it is running in interrupt context
|
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* b) To defer the scheduler until after the ISR is completed
|
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*
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* We defer all scheduling decisions until after the ISR has completed
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* in case the interrupt handler makes more than one thread ready.
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*
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* @return None
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*/
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ISR (TIMER1_COMPA_vect)
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{
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/* Call the interrupt entry routine */
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atomIntEnter();
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/* Call the OS system tick handler */
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atomTimerTick();
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/* Call the interrupt exit routine */
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atomIntExit(TRUE);
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}
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|
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/**
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*
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* Default (no handler installed) ISR.
|
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*
|
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* Installs a default handler to be called if any interrupts occur for
|
||||
* which we have not registered an ISR. This is empty and has only been
|
||||
* included to handle user-created code which may enable interrupts. The
|
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* core OS does not enable any interrupts other than the system timer
|
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* tick interrupt.
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*
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* @return None
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*/
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ISR (BADISR_vect)
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{
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/* Empty */
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}
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@@ -13,6 +13,9 @@
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|
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#include "atom.h"
|
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|
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Perform UART startup initialization.
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@@ -23,3 +26,7 @@ int uart_init(uint32_t baudrate);
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* Send one character to the UART.
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*/
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int uart_putchar(char c, FILE *stream);
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|
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#ifdef __cplusplus
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}
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#endif
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