diff --git a/ports/stm8/stm8s-periphs/stm8s_clk.c b/ports/stm8/stm8s-periphs/stm8s_clk.c index 63fb957..2d1c634 100644 --- a/ports/stm8/stm8s-periphs/stm8s_clk.c +++ b/ports/stm8/stm8s-periphs/stm8s_clk.c @@ -49,549 +49,6 @@ uc8 CLKPrescTable[8] = {1, 2, 4, 8, 10, 16, 20, 40}; /*!< Holds the different CL * @{ */ -/** - * @brief Deinitializes the CLK peripheral registers to their default reset - * values. - * @par Parameters: - * None - * @retval None - * @par Warning: - * Resetting the CCOR register: \n - * When the CCOEN bit is set, the reset of the CCOR register require - * two consecutive write instructions in order to reset first the CCOEN bit - * and the second one is to reset the CCOSEL bits. - */ -void CLK_DeInit(void) -{ - - CLK->ICKR = CLK_ICKR_RESET_VALUE; - CLK->ECKR = CLK_ECKR_RESET_VALUE; - CLK->SWR = CLK_SWR_RESET_VALUE; - CLK->SWCR = CLK_SWCR_RESET_VALUE; - CLK->CKDIVR = CLK_CKDIVR_RESET_VALUE; - CLK->PCKENR1 = CLK_PCKENR1_RESET_VALUE; - CLK->PCKENR2 = CLK_PCKENR2_RESET_VALUE; - CLK->CSSR = CLK_CSSR_RESET_VALUE; - CLK->CCOR = CLK_CCOR_RESET_VALUE; - while (CLK->CCOR & CLK_CCOR_CCOEN) - {} - CLK->CCOR = CLK_CCOR_RESET_VALUE; - CLK->CANCCR = CLK_CANCCR_RESET_VALUE; - CLK->HSITRIMR = CLK_HSITRIMR_RESET_VALUE; - CLK->SWIMCCR = CLK_SWIMCCR_RESET_VALUE; - -} - -/** - * @brief Configures the High Speed Internal oscillator (HSI). - * @par Full description: - * If CLK_FastHaltWakeup is enabled, HSI oscillator is automatically - * switched-on (HSIEN=1) and selected as next clock master - * (CKM=SWI=HSI) when resuming from HALT/ActiveHalt modes.\n - * @param[in] NewState this parameter is the Wake-up Mode state. - * @retval None - */ -void CLK_FastHaltWakeUpCmd(FunctionalState NewState) -{ - - /* check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Set FHWU bit (HSI oscillator is automatically switched-on) */ - CLK->ICKR |= CLK_ICKR_FHWU; - } - else /* FastHaltWakeup = DISABLE */ - { - /* Reset FHWU bit */ - CLK->ICKR &= (u8)(~CLK_ICKR_FHWU); - } - -} - -/** - * @brief Enable or Disable the External High Speed oscillator (HSE). - * @param[in] NewState new state of HSEEN, value accepted ENABLE, DISABLE. - * @retval None - */ -void CLK_HSECmd(FunctionalState NewState) -{ - - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Set HSEEN bit */ - CLK->ECKR |= CLK_ECKR_HSEEN; - } - else - { - /* Reset HSEEN bit */ - CLK->ECKR &= (u8)(~CLK_ECKR_HSEEN); - } - -} - -/** - * @brief Enables or disables the Internal High Speed oscillator (HSI). - * @param[in] NewState new state of HSIEN, value accepted ENABLE, DISABLE. - * @retval None - */ -void CLK_HSICmd(FunctionalState NewState) -{ - - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Set HSIEN bit */ - CLK->ICKR |= CLK_ICKR_HSIEN; - } - else - { - /* Reset HSIEN bit */ - CLK->ICKR &= (u8)(~CLK_ICKR_HSIEN); - } - -} - -/** - * @brief Enables or disables the Internal Low Speed oscillator (LSI). - * @param[in] NewState new state of LSIEN, value accepted ENABLE, DISABLE. - * @retval None - */ -void CLK_LSICmd(FunctionalState NewState) -{ - - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Set LSIEN bit */ - CLK->ICKR |= CLK_ICKR_LSIEN; - } - else - { - /* Reset LSIEN bit */ - CLK->ICKR &= (u8)(~CLK_ICKR_LSIEN); - } - -} - -/** - * @brief Enables or disablle the Configurable Clock Output (CCO). - * @param[in] NewState : New state of CCEN bit (CCO register). - * This parameter can be any of the @ref FunctionalState enumeration. - * @retval None - */ -void CLK_CCOCmd(FunctionalState NewState) -{ - - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Set CCOEN bit */ - CLK->CCOR |= CLK_CCOR_CCOEN; - } - else - { - /* Reset CCOEN bit */ - CLK->CCOR &= (u8)(~CLK_CCOR_CCOEN); - } - -} - -/** - * @brief Starts or Stops manually the clock switch execution. - * @par Full description: - * NewState parameter set the SWEN. - * @param[in] NewState new state of SWEN, value accepted ENABLE, DISABLE. - * @retval None - */ -void CLK_ClockSwitchCmd(FunctionalState NewState) -{ - - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE ) - { - /* Enable the Clock Switch */ - CLK->SWCR |= CLK_SWCR_SWEN; - } - else - { - /* Disable the Clock Switch */ - CLK->SWCR &= (u8)(~CLK_SWCR_SWEN); - } - -} - -/** - * @brief Configures the slow active halt wake up - * @param[in] NewState: specifies the Slow Active Halt wake up state. - * can be set of the following values: - * - DISABLE: Slow Active Halt mode disabled; - * - ENABLE: Slow Active Halt mode enabled. - * @retval None - */ -void CLK_SlowActiveHaltWakeUpCmd(FunctionalState NewState) -{ - - /* check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Set S_ACTHALT bit */ - CLK->ICKR |= CLK_ICKR_SWUAH; - } - else - { - /* Reset S_ACTHALT bit */ - CLK->ICKR &= (u8)(~CLK_ICKR_SWUAH); - } - -} - -/** - * @brief Enables or disables the specified peripheral CLK. - * @param[in] CLK_Peripheral : This parameter specifies the peripheral clock to gate. - * This parameter can be any of the @ref CLK_Peripheral_TypeDef enumeration. - * @param[in] NewState : New state of specified peripheral clock. - * This parameter can be any of the @ref FunctionalState enumeration. - * @retval None - */ -void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState) -{ - - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - assert_param(IS_CLK_PERIPHERAL_OK(CLK_Peripheral)); - - if (((u8)CLK_Peripheral & (u8)0x10) == 0x00) - { - if (NewState != DISABLE) - { - /* Enable the peripheral Clock */ - CLK->PCKENR1 |= (u8)((u8)1 << ((u8)CLK_Peripheral & (u8)0x0F)); - } - else - { - /* Disable the peripheral Clock */ - CLK->PCKENR1 &= (u8)(~(u8)(((u8)1 << ((u8)CLK_Peripheral & (u8)0x0F)))); - } - } - else - { - if (NewState != DISABLE) - { - /* Enable the peripheral Clock */ - CLK->PCKENR2 |= (u8)((u8)1 << ((u8)CLK_Peripheral & (u8)0x0F)); - } - else - { - /* Disable the peripheral Clock */ - CLK->PCKENR2 &= (u8)(~(u8)(((u8)1 << ((u8)CLK_Peripheral & (u8)0x0F)))); - } - } - -} - -/** - * @brief configures the Switch from one clock to another - * @param[in] CLK_SwitchMode select the clock switch mode. - * It can be set of the values of @ref CLK_SwitchMode_TypeDef - * @param[in] CLK_NewClock choice of the future clock. - * It can be set of the values of @ref CLK_Source_TypeDef - * @param[in] NewState Enable or Disable the Clock Switch interrupt. - * @param[in] CLK_CurrentClockState current clock to switch OFF or to keep ON. - * It can be set of the values of @ref CLK_CurrentClockState_TypeDef - * @retval ErrorStatus this shows the clock switch status (ERROR/SUCCESS). - */ -ErrorStatus CLK_ClockSwitchConfig(CLK_SwitchMode_TypeDef CLK_SwitchMode, CLK_Source_TypeDef CLK_NewClock, FunctionalState ITState, CLK_CurrentClockState_TypeDef CLK_CurrentClockState) -{ - - CLK_Source_TypeDef clock_master; - u16 DownCounter = CLK_TIMEOUT; - ErrorStatus Swif = ERROR; - - /* Check the parameters */ - assert_param(IS_CLK_SOURCE_OK(CLK_NewClock)); - assert_param(IS_CLK_SWITCHMODE_OK(CLK_SwitchMode)); - assert_param(IS_FUNCTIONALSTATE_OK(ITState)); - assert_param(IS_CLK_CURRENTCLOCKSTATE_OK(CLK_CurrentClockState)); - - /* Current clock master saving */ - clock_master = (CLK_Source_TypeDef)CLK->CMSR; - - /* Automatic switch mode management */ - if (CLK_SwitchMode == CLK_SWITCHMODE_AUTO) - { - - /* Enables Clock switch */ - CLK->SWCR |= CLK_SWCR_SWEN; - - /* Enables or Disables Switch interrupt */ - if (ITState != DISABLE) - { - CLK->SWCR |= CLK_SWCR_SWIEN; - } - else - { - CLK->SWCR &= (u8)(~CLK_SWCR_SWIEN); - } - - /* Selection of the target clock source */ - CLK->SWR = (u8)CLK_NewClock; - - while (((CLK->SWCR & CLK_SWCR_SWBSY) && (DownCounter != 0))) - { - DownCounter--; - } - - if (DownCounter != 0) - { - Swif = SUCCESS; - } - else - { - Swif = ERROR; - } - - } - else /* CLK_SwitchMode == CLK_SWITCHMODE_MANUAL */ - { - - /* Enables or Disables Switch interrupt if required */ - if (ITState != DISABLE) - { - CLK->SWCR |= CLK_SWCR_SWIEN; - } - else - { - CLK->SWCR &= (u8)(~CLK_SWCR_SWIEN); - } - - /* Selection of the target clock source */ - CLK->SWR = (u8)CLK_NewClock; - - /* In manual mode, there is no risk to be stucked in a loop, value returned - is then always SUCCESS */ - Swif = SUCCESS; - - } - - /* Switch OFF current clock if required */ - if ((CLK_CurrentClockState == CLK_CURRENTCLOCKSTATE_DISABLE) && ( clock_master == CLK_SOURCE_HSI)) - { - CLK->ICKR &= (u8)(~CLK_ICKR_HSIEN); - } - else if ((CLK_CurrentClockState == CLK_CURRENTCLOCKSTATE_DISABLE) && ( clock_master == CLK_SOURCE_LSI)) - { - CLK->ICKR &= (u8)(~CLK_ICKR_LSIEN); - } - else if ((CLK_CurrentClockState == CLK_CURRENTCLOCKSTATE_DISABLE) && ( clock_master == CLK_SOURCE_HSE)) - { - CLK->ECKR &= (u8)(~CLK_ECKR_HSEEN); - } - - return(Swif); - -} - -/** - * @brief Configures the HSI clock dividers. - * @param[in] HSIPrescaler : Specifies the HSI clock divider to apply. - * This parameter can be any of the @ref CLK_Prescaler_TypeDef enumeration. - * @retval None - */ -void CLK_HSIPrescalerConfig(CLK_Prescaler_TypeDef HSIPrescaler) -{ - - /* check the parameters */ - assert_param(IS_CLK_HSIPRESCALER_OK(HSIPrescaler)); - - /* Clear High speed internal clock prescaler */ - CLK->CKDIVR &= (u8)(~CLK_CKDIVR_HSIDIV); - - /* Set High speed internal clock prescaler */ - CLK->CKDIVR |= (u8)HSIPrescaler; - -} - -/** - * @brief Output the selected clock on a dedicated I/O pin. - * @param[in] CLK_CCO : Specifies the clock source. - * This parameter can be any of the @ref CLK_Output_TypeDef enumeration. - * @retval None - * @par Required preconditions: - * The dedicated I/O pin must be set at 1 in the corresponding Px_CR1 register \n - * to be set as input with pull-up or push-pull output. - */ -void CLK_CCOConfig(CLK_Output_TypeDef CLK_CCO) -{ - - /* check the parameters */ - assert_param(IS_CLK_OUTPUT_OK(CLK_CCO)); - - /* Clears of the CCO type bits part */ - CLK->CCOR &= (u8)(~CLK_CCOR_CCOSEL); - - /* Selects the source provided on cco_ck output */ - CLK->CCOR |= (u8)CLK_CCO; - - /* Enable the clock output */ - CLK->CCOR |= CLK_CCOR_CCOEN; - -} - -/** - * @brief Enables or disables the specified CLK interrupts. - * @param[in] CLK_IT This parameter specifies the interrupt sources. - * It can be one of the values of @ref CLK_IT_TypeDef. - * @param[in] NewState New state of the Interrupt. - * Value accepted ENABLE, DISABLE. - * @retval None - */ -void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState) -{ - - /* check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - assert_param(IS_CLK_IT_OK(CLK_IT)); - - if (NewState != DISABLE) - { - switch (CLK_IT) - { - case CLK_IT_SWIF: /* Enable the clock switch interrupt */ - CLK->SWCR |= CLK_SWCR_SWIEN; - break; - case CLK_IT_CSSD: /* Enable the clock security system detection interrupt */ - CLK->CSSR |= CLK_CSSR_CSSDIE; - break; - default: - break; - } - } - else /*(NewState == DISABLE)*/ - { - switch (CLK_IT) - { - case CLK_IT_SWIF: /* Disable the clock switch interrupt */ - CLK->SWCR &= (u8)(~CLK_SWCR_SWIEN); - break; - case CLK_IT_CSSD: /* Disable the clock security system detection interrupt */ - CLK->CSSR &= (u8)(~CLK_CSSR_CSSDIE); - break; - default: - break; - } - } - -} - -/** - * @brief Configures the HSI and CPU clock dividers. - * @param[in] ClockPrescaler Specifies the HSI or CPU clock divider to apply. - * @retval None - */ -void CLK_SYSCLKConfig(CLK_Prescaler_TypeDef ClockPrescaler) -{ - - /* check the parameters */ - assert_param(IS_CLK_PRESCALER_OK(ClockPrescaler)); - - if (((u8)ClockPrescaler & (u8)0x80) == 0x00) /* Bit7 = 0 means HSI divider */ - { - CLK->CKDIVR &= (u8)(~CLK_CKDIVR_HSIDIV); - CLK->CKDIVR |= (u8)((u8)ClockPrescaler & (u8)CLK_CKDIVR_HSIDIV); - } - else /* Bit7 = 1 means CPU divider */ - { - CLK->CKDIVR &= (u8)(~CLK_CKDIVR_CPUDIV); - CLK->CKDIVR |= (u8)((u8)ClockPrescaler & (u8)CLK_CKDIVR_CPUDIV); - } - -} -/** - * @brief Configures the SWIM clock frequency on the fly. - * @param[in] CLK_SWIMDivider Specifies the SWIM clock divider to apply. - * can be one of the value of @ref CLK_SWIMDivider_TypeDef - * @retval None - */ -void CLK_SWIMConfig(CLK_SWIMDivider_TypeDef CLK_SWIMDivider) -{ - - /* check the parameters */ - assert_param(IS_CLK_SWIMDIVIDER_OK(CLK_SWIMDivider)); - - if (CLK_SWIMDivider != CLK_SWIMDIVIDER_2) - { - /* SWIM clock is not divided by 2 */ - CLK->SWIMCCR |= CLK_SWIMCCR_SWIMDIV; - } - else /* CLK_SWIMDivider == CLK_SWIMDIVIDER_2 */ - { - /* SWIM clock is divided by 2 */ - CLK->SWIMCCR &= (u8)(~CLK_SWIMCCR_SWIMDIV); - } - -} - -/** - * @brief Configure the divider for the external CAN clock. - * @param[in] CLK_CANDivider Specifies the CAN clock divider to apply. - * can be one of the value of @ref CLK_CANDivider_TypeDef - * @retval None - */ -void CLK_CANConfig(CLK_CANDivider_TypeDef CLK_CANDivider) -{ - - /* check the parameters */ - assert_param(IS_CLK_CANDIVIDER_OK(CLK_CANDivider)); - - /* Clear the CANDIV bits */ - CLK->CANCCR &= (u8)(~CLK_CANCCR_CANDIV); - - /* Select divider */ - CLK->CANCCR |= (u8)CLK_CANDivider; - -} - -/** - * @brief Enables the Clock Security System. - * @par Full description: - * once CSS is enabled it cannot be disabled until the next reset. - * @par Parameters: - * None - * @retval None - */ -void CLK_ClockSecuritySystemEnable(void) -{ - /* Set CSSEN bit */ - CLK->CSSR |= CLK_CSSR_CSSEN; -} - -/** - * @brief Returns the clock source used as system clock. - * @par Parameters: - * None - * @retval Clock source used. - * can be one of the values of @ref CLK_Source_TypeDef - */ -CLK_Source_TypeDef CLK_GetSYSCLKSource(void) -{ - return((CLK_Source_TypeDef)CLK->CMSR); -} - /** * @brief This function returns the frequencies of different on chip clocks. @@ -628,164 +85,8 @@ u32 CLK_GetClockFreq(void) return((u32)clockfrequency); } + -/** - * @brief Adjusts the Internal High Speed oscillator (HSI) calibration value. - * @par Full description: - * @param[in] CLK_HSICalibrationValue calibration trimming value. - * can be one of the values of @ref CLK_HSITrimValue_TypeDef - * @retval None - */ -void CLK_AdjustHSICalibrationValue(CLK_HSITrimValue_TypeDef CLK_HSICalibrationValue) -{ - - /* check the parameters */ - assert_param(IS_CLK_HSITRIMVALUE_OK(CLK_HSICalibrationValue)); - - /* Store the new value */ - CLK->HSITRIMR = (u8)((CLK->HSITRIMR & (u8)(~CLK_HSITRIMR_HSITRIM))|((u8)CLK_HSICalibrationValue)); - -} - -/** - * @brief Reset the SWBSY flag (SWICR Reister) - * @par Full description: - * This function reset SWBSY flag in order to reset clock switch operations (target - * oscillator is broken, stabilization is longing too much, etc.). If at the same time \n - * software attempts to set SWEN and clear SWBSY, SWBSY action takes precedence. - * @par Parameters: - * None - * @retval None - */ -void CLK_SYSCLKEmergencyClear(void) -{ - CLK->SWCR &= (u8)(~CLK_SWCR_SWBSY); -} - -/** - * @brief Checks whether the specified CLK flag is set or not. - * @par Full description: - * @param[in] CLK_FLAG Flag to check. - * can be one of the values of @ref CLK_Flag_TypeDef - * @retval FlagStatus, status of the checked flag - */ -FlagStatus CLK_GetFlagStatus(CLK_Flag_TypeDef CLK_FLAG) -{ - - u16 statusreg = 0; - u8 tmpreg = 0; - FlagStatus bitstatus = RESET; - - /* check the parameters */ - assert_param(IS_CLK_FLAG_OK(CLK_FLAG)); - - /* Get the CLK register index */ - statusreg = (u16)((u16)CLK_FLAG & (u16)0xFF00); - - - if (statusreg == 0x0100) /* The flag to check is in ICKRregister */ - { - tmpreg = CLK->ICKR; - } - else if (statusreg == 0x0200) /* The flag to check is in ECKRregister */ - { - tmpreg = CLK->ECKR; - } - else if (statusreg == 0x0300) /* The flag to check is in SWIC register */ - { - tmpreg = CLK->SWCR; - } - else if (statusreg == 0x0400) /* The flag to check is in CSS register */ - { - tmpreg = CLK->CSSR; - } - else /* The flag to check is in CCO register */ - { - tmpreg = CLK->CCOR; - } - - if ((tmpreg & (u8)CLK_FLAG) != (u8)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - - /* Return the flag status */ - return((FlagStatus)bitstatus); - -} - -/** - * @brief Checks whether the specified CLK interrupt has is enabled or not. - * @param[in] CLK_IT specifies the CLK interrupt. - * can be one of the values of @ref CLK_IT_TypeDef - * @retval ITStatus, new state of CLK_IT (SET or RESET). - */ -ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT) -{ - - ITStatus bitstatus = RESET; - - /* check the parameters */ - assert_param(IS_CLK_IT_OK(CLK_IT)); - - if (CLK_IT == CLK_IT_SWIF) - { - /* Check the status of the clock switch interrupt */ - if ((CLK->SWCR & (u8)CLK_IT) == (u8)0x0C) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - } - else /* CLK_IT == CLK_IT_CSSDIE */ - { - /* Check the status of the security system detection interrupt */ - if ((CLK->CSSR & (u8)CLK_IT) == (u8)0x0C) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - } - - /* Return the CLK_IT status */ - return bitstatus; - -} - -/** - * @brief Clears the CLK’s interrupt pending bits. - * @param[in] CLK_IT specifies the interrupt pending bits. - * can be one of the values of @ref CLK_IT_TypeDef - * @retval None - */ -void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT) -{ - - /* check the parameters */ - assert_param(IS_CLK_IT_OK(CLK_IT)); - - if (CLK_IT == (u8)CLK_IT_CSSD) - { - /* Clear the status of the security system detection interrupt */ - CLK->CSSR &= (u8)(~CLK_CSSR_CSSD); - } - else /* CLK_PendingBit == (u8)CLK_IT_SWIF */ - { - /* Clear the status of the clock switch interrupt */ - CLK->SWCR &= (u8)(~CLK_SWCR_SWIF); - } - -} /** * @} */ diff --git a/ports/stm8/stm8s-periphs/stm8s_tim1.c b/ports/stm8/stm8s-periphs/stm8s_tim1.c index 3405286..ec36a5c 100644 --- a/ports/stm8/stm8s-periphs/stm8s_tim1.c +++ b/ports/stm8/stm8s-periphs/stm8s_tim1.c @@ -27,15 +27,7 @@ /* Private macro -------------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/ -static void TI1_Config(u8 TIM1_ICPolarity, u8 TIM1_ICSelection, - u8 TIM1_ICFilter); -static void TI2_Config(u8 TIM1_ICPolarity, u8 TIM1_ICSelection, - u8 TIM1_ICFilter); -static void TI3_Config(u8 TIM1_ICPolarity, u8 TIM1_ICSelection, - u8 TIM1_ICFilter); -static void TI4_Config(u8 TIM1_ICPolarity, u8 TIM1_ICSelection, - u8 TIM1_ICFilter); - + /** * @addtogroup TIM1_Public_Functions * @{ @@ -125,385 +117,6 @@ void TIM1_TimeBaseInit(u16 TIM1_Prescaler, } -/** - * @brief Initializes the TIM1 Channel1 according to the specified parameters. - * @param[in] TIM1_OCMode specifies the Output Compare mode from @ref TIM1_OCMode_TypeDef. - * @param[in] TIM1_OutputState specifies the Output State from @ref TIM1_OutputState_TypeDef. - * @param[in] TIM1_OutputNState specifies the Complementary Output State from @ref TIM1_OutputNState_TypeDef. - * @param[in] TIM1_Pulse specifies the Pulse width value. - * @param[in] TIM1_OCPolarity specifies the Output Compare Polarity from @ref TIM1_OCPolarity_TypeDef. - * @param[in] TIM1_OCNPolarity specifies the Complementary Output Compare Polarity from @ref TIM1_OCNPolarity_TypeDef. - * @param[in] TIM1_OCIdleState specifies the Output Compare Idle State from @ref TIM1_OCIdleState_TypeDef. - * @param[in] TIM1_OCNIdleState specifies the Complementary Output Compare Idle State from @ref TIM1_OCIdleState_TypeDef. - * @retval None - */ -void TIM1_OC1Init(TIM1_OCMode_TypeDef TIM1_OCMode, - TIM1_OutputState_TypeDef TIM1_OutputState, - TIM1_OutputNState_TypeDef TIM1_OutputNState, - u16 TIM1_Pulse, - TIM1_OCPolarity_TypeDef TIM1_OCPolarity, - TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity, - TIM1_OCIdleState_TypeDef TIM1_OCIdleState, - TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState) -{ - /* Check the parameters */ - assert_param(IS_TIM1_OC_MODE_OK(TIM1_OCMode)); - assert_param(IS_TIM1_OUTPUT_STATE_OK(TIM1_OutputState)); - assert_param(IS_TIM1_OUTPUTN_STATE_OK(TIM1_OutputNState)); - assert_param(IS_TIM1_OC_POLARITY_OK(TIM1_OCPolarity)); - assert_param(IS_TIM1_OCN_POLARITY_OK(TIM1_OCNPolarity)); - assert_param(IS_TIM1_OCIDLE_STATE_OK(TIM1_OCIdleState)); - assert_param(IS_TIM1_OCNIDLE_STATE_OK(TIM1_OCNIdleState)); - - /* Disable the Channel 1: Reset the CCE Bit, Set the Output State , the Output N State, the Output Polarity & the Output N Polarity*/ - TIM1->CCER1 &= (u8)(~( TIM1_CCER1_CC1E | TIM1_CCER1_CC1NE | TIM1_CCER1_CC1P | TIM1_CCER1_CC1NP)); - /* Set the Output State & Set the Output N State & Set the Output Polarity & Set the Output N Polarity */ - TIM1->CCER1 |= (u8)((TIM1_OutputState & TIM1_CCER1_CC1E ) | (TIM1_OutputNState & TIM1_CCER1_CC1NE ) | (TIM1_OCPolarity & TIM1_CCER1_CC1P ) | (TIM1_OCNPolarity & TIM1_CCER1_CC1NP )); - - /* Reset the Output Compare Bits & Set the Ouput Compare Mode */ - TIM1->CCMR1 = (u8)((TIM1->CCMR1 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_OCMode); - - /* Reset the Output Idle state & the Output N Idle state bits */ - TIM1->OISR &= (u8)(~(TIM1_OISR_OIS1 | TIM1_OISR_OIS1N)); - /* Set the Output Idle state & the Output N Idle state configuration */ - TIM1->OISR |= (u8)(( TIM1_OCIdleState & TIM1_OISR_OIS1 ) | ( TIM1_OCNIdleState & TIM1_OISR_OIS1N )); - - /* Set the Pulse value */ - TIM1->CCR1H = (u8)(TIM1_Pulse >> 8); - TIM1->CCR1L = (u8)(TIM1_Pulse); -} - -/** - * @brief Initializes the TIM1 Channel2 according to the specified parameters. - * @param[in] TIM1_OCMode specifies the Output Compare mode from @ref TIM1_OCMode_TypeDef. - * @param[in] TIM1_OutputState specifies the Output State from @ref TIM1_OutputState_TypeDef. - * @param[in] TIM1_OutputNState specifies the Complementary Output State from @ref TIM1_OutputNState_TypeDef. - * @param[in] TIM1_Pulse specifies the Pulse width value. - * @param[in] TIM1_OCPolarity specifies the Output Compare Polarity from @ref TIM1_OCPolarity_TypeDef. - * @param[in] TIM1_OCNPolarity specifies the Complementary Output Compare Polarity from @ref TIM1_OCNPolarity_TypeDef. - * @param[in] TIM1_OCIdleState specifies the Output Compare Idle State from @ref TIM1_OCIdleState_TypeDef. - * @param[in] TIM1_OCNIdleState specifies the Complementary Output Compare Idle State from @ref TIM1_OCIdleState_TypeDef. - * @retval None - */ -void TIM1_OC2Init(TIM1_OCMode_TypeDef TIM1_OCMode, - TIM1_OutputState_TypeDef TIM1_OutputState, - TIM1_OutputNState_TypeDef TIM1_OutputNState, - u16 TIM1_Pulse, - TIM1_OCPolarity_TypeDef TIM1_OCPolarity, - TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity, - TIM1_OCIdleState_TypeDef TIM1_OCIdleState, - TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState) -{ - - - /* Check the parameters */ - assert_param(IS_TIM1_OC_MODE_OK(TIM1_OCMode)); - assert_param(IS_TIM1_OUTPUT_STATE_OK(TIM1_OutputState)); - assert_param(IS_TIM1_OUTPUTN_STATE_OK(TIM1_OutputNState)); - assert_param(IS_TIM1_OC_POLARITY_OK(TIM1_OCPolarity)); - assert_param(IS_TIM1_OCN_POLARITY_OK(TIM1_OCNPolarity)); - assert_param(IS_TIM1_OCIDLE_STATE_OK(TIM1_OCIdleState)); - assert_param(IS_TIM1_OCNIDLE_STATE_OK(TIM1_OCNIdleState)); - - /* Disable the Channel 1: Reset the CCE Bit, Set the Output State , the Output N State, the Output Polarity & the Output N Polarity*/ - TIM1->CCER1 &= (u8)(~( TIM1_CCER1_CC2E | TIM1_CCER1_CC2NE | TIM1_CCER1_CC2P | TIM1_CCER1_CC2NP)); - /* Set the Output State & Set the Output N State & Set the Output Polarity & Set the Output N Polarity */ - TIM1->CCER1 |= (u8)((TIM1_OutputState & TIM1_CCER1_CC2E ) | (TIM1_OutputNState & TIM1_CCER1_CC2NE ) | (TIM1_OCPolarity & TIM1_CCER1_CC2P ) | (TIM1_OCNPolarity & TIM1_CCER1_CC2NP )); - - - /* Reset the Output Compare Bits & Set the Ouput Compare Mode */ - TIM1->CCMR2 = (u8)((TIM1->CCMR2 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_OCMode); - - /* Reset the Output Idle state & the Output N Idle state bits */ - TIM1->OISR &= (u8)(~(TIM1_OISR_OIS2 | TIM1_OISR_OIS2N)); - /* Set the Output Idle state & the Output N Idle state configuration */ - TIM1->OISR |= (u8)((TIM1_OISR_OIS2 & TIM1_OCIdleState) | (TIM1_OISR_OIS2N & TIM1_OCNIdleState)); - - /* Set the Pulse value */ - TIM1->CCR2H = (u8)(TIM1_Pulse >> 8); - TIM1->CCR2L = (u8)(TIM1_Pulse); - -} - -/** - * @brief Initializes the TIM1 Channel3 according to the specified parameters. - * @param[in] TIM1_OCMode specifies the Output Compare mode from @ref TIM1_OCMode_TypeDef. - * @param[in] TIM1_OutputState specifies the Output State from @ref TIM1_OutputState_TypeDef. - * @param[in] TIM1_OutputNState specifies the Complementary Output State from @ref TIM1_OutputNState_TypeDef. - * @param[in] TIM1_Pulse specifies the Pulse width value. - * @param[in] TIM1_OCPolarity specifies the Output Compare Polarity from @ref TIM1_OCPolarity_TypeDef. - * @param[in] TIM1_OCNPolarity specifies the Complementary Output Compare Polarity from @ref TIM1_OCNPolarity_TypeDef. - * @param[in] TIM1_OCIdleState specifies the Output Compare Idle State from @ref TIM1_OCIdleState_TypeDef. - * @param[in] TIM1_OCNIdleState specifies the Complementary Output Compare Idle State from @ref TIM1_OCIdleState_TypeDef. - * @retval None - */ -void TIM1_OC3Init(TIM1_OCMode_TypeDef TIM1_OCMode, - TIM1_OutputState_TypeDef TIM1_OutputState, - TIM1_OutputNState_TypeDef TIM1_OutputNState, - u16 TIM1_Pulse, - TIM1_OCPolarity_TypeDef TIM1_OCPolarity, - TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity, - TIM1_OCIdleState_TypeDef TIM1_OCIdleState, - TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState) -{ - - /* Check the parameters */ - assert_param(IS_TIM1_OC_MODE_OK(TIM1_OCMode)); - assert_param(IS_TIM1_OUTPUT_STATE_OK(TIM1_OutputState)); - assert_param(IS_TIM1_OUTPUTN_STATE_OK(TIM1_OutputNState)); - assert_param(IS_TIM1_OC_POLARITY_OK(TIM1_OCPolarity)); - assert_param(IS_TIM1_OCN_POLARITY_OK(TIM1_OCNPolarity)); - assert_param(IS_TIM1_OCIDLE_STATE_OK(TIM1_OCIdleState)); - assert_param(IS_TIM1_OCNIDLE_STATE_OK(TIM1_OCNIdleState)); - - /* Disable the Channel 1: Reset the CCE Bit, Set the Output State , the Output N State, the Output Polarity & the Output N Polarity*/ - TIM1->CCER2 &= (u8)(~( TIM1_CCER2_CC3E | TIM1_CCER2_CC3NE | TIM1_CCER2_CC3P | TIM1_CCER2_CC3NP)); - /* Set the Output State & Set the Output N State & Set the Output Polarity & Set the Output N Polarity */ - TIM1->CCER2 |= (u8)((TIM1_OutputState & TIM1_CCER2_CC3E ) | (TIM1_OutputNState & TIM1_CCER2_CC3NE ) | (TIM1_OCPolarity & TIM1_CCER2_CC3P ) | (TIM1_OCNPolarity & TIM1_CCER2_CC3NP )); - - - - /* Reset the Output Compare Bits & Set the Ouput Compare Mode */ - TIM1->CCMR3 = (u8)((TIM1->CCMR3 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_OCMode); - - /* Reset the Output Idle state & the Output N Idle state bits */ - TIM1->OISR &= (u8)(~(TIM1_OISR_OIS3 | TIM1_OISR_OIS3N)); - /* Set the Output Idle state & the Output N Idle state configuration */ - TIM1->OISR |= (u8)((TIM1_OISR_OIS3 & TIM1_OCIdleState) | (TIM1_OISR_OIS3N & TIM1_OCNIdleState)); - - /* Set the Pulse value */ - TIM1->CCR3H = (u8)(TIM1_Pulse >> 8); - TIM1->CCR3L = (u8)(TIM1_Pulse); - -} - -/** - * @brief Initializes the TIM1 Channel4 according to the specified parameters. - * @param[in] TIM1_OCMode specifies the Output Compare mode from @ref TIM1_OCMode_TypeDef. - * @param[in] TIM1_OutputState specifies the Output State from @ref TIM1_OutputState_TypeDef. - * @param[in] TIM1_Pulse specifies the Pulse width value. - * @param[in] TIM1_OCPolarity specifies the Output Compare Polarity from @ref TIM1_OCPolarity_TypeDef. - * @param[in] TIM1_OCIdleState specifies the Output Compare Idle State from @ref TIM1_OCIdleState_TypeDef. - * @retval None - */ -void TIM1_OC4Init(TIM1_OCMode_TypeDef TIM1_OCMode, - TIM1_OutputState_TypeDef TIM1_OutputState, - u16 TIM1_Pulse, - TIM1_OCPolarity_TypeDef TIM1_OCPolarity, - TIM1_OCIdleState_TypeDef TIM1_OCIdleState) -{ - - /* Check the parameters */ - assert_param(IS_TIM1_OC_MODE_OK(TIM1_OCMode)); - assert_param(IS_TIM1_OUTPUT_STATE_OK(TIM1_OutputState)); - assert_param(IS_TIM1_OC_POLARITY_OK(TIM1_OCPolarity)); - assert_param(IS_TIM1_OCIDLE_STATE_OK(TIM1_OCIdleState)); - - - - /* Disable the Channel 4: Reset the CCE Bit */ - TIM1->CCER2 &= (u8)(~(TIM1_CCER2_CC4E | TIM1_CCER2_CC4P)); - /* Set the Output State & the Output Polarity */ - TIM1->CCER2 |= (u8)((TIM1_OutputState & TIM1_CCER2_CC4E ) | (TIM1_OCPolarity & TIM1_CCER2_CC4P )); - - /* Reset the Output Compare Bit and Set the Ouput Compare Mode */ - TIM1->CCMR4 = (u8)((TIM1->CCMR4 & (u8)(~TIM1_CCMR_OCM)) | (TIM1_OCMode)); - - /* Set the Output Idle state */ - if (TIM1_OCIdleState != TIM1_OCIDLESTATE_RESET) - { - TIM1->OISR |= (u8)(~TIM1_CCER2_CC4P); - } - else - { - TIM1->OISR &= (u8)(~TIM1_OISR_OIS4); - } - - /* Set the Pulse value */ - TIM1->CCR4H = (u8)(TIM1_Pulse >> 8); - TIM1->CCR4L = (u8)(TIM1_Pulse); - -} - -/** - * @brief Configures the Break feature, dead time, Lock level, the OSSI, - * and the AOE(automatic output enable). - * @param[in] TIM1_OSSIState specifies the OSSIS State from @ref TIM1_OSSIState_TypeDef. - * @param[in] TIM1_LockLevel specifies the lock level from @ref TIM1_LockLevel_TypeDef. - * @param[in] TIM1_DeadTime specifies the dead time value. - * @param[in] TIM1_Break specifies the Break state @ref TIM1_BreakState_TypeDef. - * @param[in] TIM1_BreakPolarity specifies the Break polarity from @ref TIM1_BreakPolarity_TypeDef. - * @param[in] TIM1_AutomaticOutput specifies the Automatic Output configuration from @ref TIM1_AutomaticOutput_TypeDef. - * @retval None - */ -void TIM1_BDTRConfig(TIM1_OSSIState_TypeDef TIM1_OSSIState, - TIM1_LockLevel_TypeDef TIM1_LockLevel, - u8 TIM1_DeadTime, - TIM1_BreakState_TypeDef TIM1_Break, - TIM1_BreakPolarity_TypeDef TIM1_BreakPolarity, - TIM1_AutomaticOutput_TypeDef TIM1_AutomaticOutput) -{ - - - /* Check the parameters */ - assert_param(IS_TIM1_OSSI_STATE_OK(TIM1_OSSIState)); - assert_param(IS_TIM1_LOCK_LEVEL_OK(TIM1_LockLevel)); - assert_param(IS_TIM1_BREAK_STATE_OK(TIM1_Break)); - assert_param(IS_TIM1_BREAK_POLARITY_OK(TIM1_BreakPolarity)); - assert_param(IS_TIM1_AUTOMATIC_OUTPUT_STATE_OK(TIM1_AutomaticOutput)); - - - TIM1->DTR = (u8)(TIM1_DeadTime); - /* Set the Lock level, the Break enable Bit and the Ploarity, the OSSI State, - the dead time value and the Automatic Output Enable Bit */ - - TIM1->BKR = (u8)((u8)TIM1_OSSIState | \ - (u8)TIM1_LockLevel | \ - (u8)TIM1_Break | \ - (u8)TIM1_BreakPolarity | \ - (u8)TIM1_AutomaticOutput); - -} - -/** - * @brief Initializes the TIM1 peripheral according to the specified parameters. - * @param[in] TIM1_Channel specifies the input capture channel from TIM1_Channel_TypeDef. - * @param[in] TIM1_ICPolarity specifies the Input capture polarity from TIM1_ICPolarity_TypeDef . - * @param[in] TIM1_ICSelection specifies the Input capture source selection from TIM1_ICSelection_TypeDef. - * @param[in] TIM1_ICPrescaler specifies the Input capture Prescaler from TIM1_ICPSC_TypeDef. - * @param[in] TIM1_ICFilter specifies the Input capture filter value. - * @retval None - */ - -void TIM1_ICInit(TIM1_Channel_TypeDef TIM1_Channel, - TIM1_ICPolarity_TypeDef TIM1_ICPolarity, - TIM1_ICSelection_TypeDef TIM1_ICSelection, - TIM1_ICPSC_TypeDef TIM1_ICPrescaler, - u8 TIM1_ICFilter) -{ - - /* Check the parameters */ - assert_param(IS_TIM1_CHANNEL_OK(TIM1_Channel)); - assert_param(IS_TIM1_IC_POLARITY_OK(TIM1_ICPolarity)); - assert_param(IS_TIM1_IC_SELECTION_OK(TIM1_ICSelection)); - assert_param(IS_TIM1_IC_PRESCALER_OK(TIM1_ICPrescaler)); - assert_param(IS_TIM1_IC_FILTER_OK(TIM1_ICFilter)); - - if (TIM1_Channel == TIM1_CHANNEL_1) - { - /* TI1 Configuration */ - TI1_Config((u8)TIM1_ICPolarity, - (u8)TIM1_ICSelection, - (u8)TIM1_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM1_SetIC1Prescaler(TIM1_ICPrescaler); - } - else if (TIM1_Channel == TIM1_CHANNEL_2) - { - /* TI2 Configuration */ - TI2_Config((u8)TIM1_ICPolarity, - (u8)TIM1_ICSelection, - (u8)TIM1_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM1_SetIC2Prescaler(TIM1_ICPrescaler); - } - else if (TIM1_Channel == TIM1_CHANNEL_3) - { - /* TI3 Configuration */ - TI3_Config((u8)TIM1_ICPolarity, - (u8)TIM1_ICSelection, - (u8)TIM1_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM1_SetIC3Prescaler(TIM1_ICPrescaler); - } - else - { - /* TI4 Configuration */ - TI4_Config((u8)TIM1_ICPolarity, - (u8)TIM1_ICSelection, - (u8)TIM1_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM1_SetIC4Prescaler(TIM1_ICPrescaler); - } - -} - -/** - * @brief Configures the TIM1 peripheral in PWM Input Mode according to the specified parameters. - * @param[in] TIM1_Channel specifies the input capture channel from TIM1_Channel_TypeDef. - * @param[in] TIM1_ICPolarity specifies the Input capture polarity from TIM1_ICPolarity_TypeDef . - * @param[in] TIM1_ICSelection specifies the Input capture source selection from TIM1_ICSelection_TypeDef. - * @param[in] TIM1_ICPrescaler specifies the Input capture Prescaler from TIM1_ICPSC_TypeDef. - * @param[in] TIM1_ICFilter specifies the Input capture filter value. - * @retval None - */ -void TIM1_PWMIConfig(TIM1_Channel_TypeDef TIM1_Channel, - TIM1_ICPolarity_TypeDef TIM1_ICPolarity, - TIM1_ICSelection_TypeDef TIM1_ICSelection, - TIM1_ICPSC_TypeDef TIM1_ICPrescaler, - u8 TIM1_ICFilter) -{ - u8 icpolarity = TIM1_ICPOLARITY_RISING; - u8 icselection = TIM1_ICSELECTION_DIRECTTI; - - /* Check the parameters */ - assert_param(IS_TIM1_PWMI_CHANNEL_OK(TIM1_Channel)); - assert_param(IS_TIM1_IC_POLARITY_OK(TIM1_ICPolarity)); - assert_param(IS_TIM1_IC_SELECTION_OK(TIM1_ICSelection)); - assert_param(IS_TIM1_IC_PRESCALER_OK(TIM1_ICPrescaler)); - - /* Select the Opposite Input Polarity */ - if (TIM1_ICPolarity != TIM1_ICPOLARITY_FALLING) - { - icpolarity = TIM1_ICPOLARITY_FALLING; - } - else - { - icpolarity = TIM1_ICPOLARITY_RISING; - } - - /* Select the Opposite Input */ - if (TIM1_ICSelection == TIM1_ICSELECTION_DIRECTTI) - { - icselection = TIM1_ICSELECTION_INDIRECTTI; - } - else - { - icselection = TIM1_ICSELECTION_DIRECTTI; - } - - if (TIM1_Channel == TIM1_CHANNEL_1) - { - /* TI1 Configuration */ - TI1_Config((u8)TIM1_ICPolarity, (u8)TIM1_ICSelection, - (u8)TIM1_ICFilter); - - /* Set the Input Capture Prescaler value */ - TIM1_SetIC1Prescaler(TIM1_ICPrescaler); - - /* TI2 Configuration */ - TI2_Config(icpolarity, icselection, TIM1_ICFilter); - - /* Set the Input Capture Prescaler value */ - TIM1_SetIC2Prescaler(TIM1_ICPrescaler); - } - else - { - /* TI2 Configuration */ - TI2_Config((u8)TIM1_ICPolarity, (u8)TIM1_ICSelection, - (u8)TIM1_ICFilter); - - /* Set the Input Capture Prescaler value */ - TIM1_SetIC2Prescaler(TIM1_ICPrescaler); - - /* TI1 Configuration */ - TI1_Config(icpolarity, icselection, TIM1_ICFilter); - - /* Set the Input Capture Prescaler value */ - TIM1_SetIC1Prescaler(TIM1_ICPrescaler); - } -} - /** * @brief Enables or disables the TIM1 peripheral. @@ -528,30 +141,6 @@ void TIM1_Cmd(FunctionalState NewState) } -/** - * @brief Enables or disables the TIM1 peripheral Main Outputs. - * @param[in] NewState new state of the TIM1 peripheral. - * This parameter can be ENABLE or DISABLE. - * @retval None - */ -void TIM1_CtrlPWMOutputs(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the MOE Bit */ - - if (NewState != DISABLE) - { - TIM1->BKR |= TIM1_BKR_MOE; - } - else - { - TIM1->BKR &= (u8)(~TIM1_BKR_MOE); - } -} - - /** * @brief Enables or disables the specified TIM1 interrupts. * @param[in] NewState new state of the TIM1 peripheral. @@ -588,1741 +177,6 @@ void TIM1_ITConfig(TIM1_IT_TypeDef TIM1_IT, FunctionalState NewState) } -/** - * @brief Configures the TIM1 internal Clock. - * @param[in] : - * None - * @retval None - */ -void TIM1_InternalClockConfig(void) -{ - /* Disable slave mode to clock the prescaler directly with the internal clock */ - TIM1->SMCR &= (u8)(~TIM1_SMCR_SMS); -} - - -/** - * @brief Configures the TIM1 External clock Mode1. - * @param[in] TIM1_ExtTRGPrescaler specifies the external Trigger Prescaler. - * This parameter can be one of the following values: - * - TIM1_EXTTRGPSC_OFF - * - TIM1_EXTTRGPSC_DIV2 - * - TIM1_EXTTRGPSC_DIV4 - * - TIM1_EXTTRGPSC_DIV8. - * @param[in] TIM1_ExtTRGPolarity specifies the external Trigger Polarity. - * This parameter can be one of the following values: - * - TIM1_EXTTRGPOLARITY_INVERTED - * - TIM1_EXTTRGPOLARITY_NONINVERTED - * @param[in] ExtTRGFilter specifies the External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM1_ETRClockMode1Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, - TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, - u8 ExtTRGFilter) -{ - /* Check the parameters */ - assert_param(IS_TIM1_EXT_PRESCALER_OK(TIM1_ExtTRGPrescaler)); - assert_param(IS_TIM1_EXT_POLARITY_OK(TIM1_ExtTRGPolarity)); - - /* Configure the ETR Clock source */ - TIM1_ETRConfig(TIM1_ExtTRGPrescaler, TIM1_ExtTRGPolarity, ExtTRGFilter); - - /* Select the External clock mode1 & Select the Trigger selection : ETRF */ - TIM1->SMCR = (u8)((TIM1->SMCR & (u8)(~(TIM1_SMCR_SMS | TIM1_SMCR_TS ))) | (u8)( TIM1_SLAVEMODE_EXTERNAL1 | TIM1_TS_ETRF )); -} - - -/** - * @brief Configures the TIM1 External clock Mode2. - * @param[in] TIM1_ExtTRGPrescaler specifies the external Trigger Prescaler. - * This parameter can be one of the following values: - * - TIM1_EXTTRGPSC_OFF - * - TIM1_EXTTRGPSC_DIV2 - * - TIM1_EXTTRGPSC_DIV4 - * - TIM1_EXTTRGPSC_DIV8. - * @param[in] TIM1_ExtTRGPolarity specifies the external Trigger Polarity. - * This parameter can be one of the following values: - * - TIM1_EXTTRGPOLARITY_INVERTED - * - TIM1_EXTTRGPOLARITY_NONINVERTED - * @param[in] ExtTRGFilter specifies the External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM1_ETRClockMode2Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, - TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, - u8 ExtTRGFilter) -{ - /* Check the parameters */ - assert_param(IS_TIM1_EXT_PRESCALER_OK(TIM1_ExtTRGPrescaler)); - assert_param(IS_TIM1_EXT_POLARITY_OK(TIM1_ExtTRGPolarity)); - - /* Configure the ETR Clock source */ - TIM1_ETRConfig(TIM1_ExtTRGPrescaler, TIM1_ExtTRGPolarity, ExtTRGFilter); - - /* Enable the External clock mode2 */ - TIM1->ETR |= TIM1_ETR_ECE; -} - - -/** - * @brief Configures the TIM1 External Trigger. - * @param[in] TIM1_ExtTRGPrescaler specifies the external Trigger Prescaler. - * This parameter can be one of the following values: - * - TIM1_EXTTRGPSC_OFF - * - TIM1_EXTTRGPSC_DIV2 - * - TIM1_EXTTRGPSC_DIV4 - * - TIM1_EXTTRGPSC_DIV8. - * @param[in] TIM1_ExtTRGPolarity specifies the external Trigger Polarity. - * This parameter can be one of the following values: - * - TIM1_EXTTRGPOLARITY_INVERTED - * - TIM1_EXTTRGPOLARITY_NONINVERTED - * @param[in] ExtTRGFilter specifies the External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM1_ETRConfig(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, - TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, - u8 ExtTRGFilter) -{ - /* Check the parameters */ - assert_param(IS_TIM1_EXT_TRG_FILTER_OK(ExtTRGFilter)); - /* Set the Prescaler, the Filter value and the Polarity */ - TIM1->ETR |= (u8)((u8)TIM1_ExtTRGPrescaler | - (u8)TIM1_ExtTRGPolarity | - (u8)ExtTRGFilter ); -} - - -/** - * @brief Configures the TIM1 Trigger as External Clock. - * @param[in] TIM1_TIxExternalCLKSource specifies Trigger source. - * This parameter can be one of the following values: - * - TIM1_TIXEXTERNALCLK1SOURCE_TI1: TI1 Edge Detector - * - TIM1_TIXEXTERNALCLK1SOURCE_TI2: Filtered TIM1 Input 1 - * - TIM1_TIXEXTERNALCLK1SOURCE_TI1ED: Filtered TIM1 Input 2 - * @param[in] TIM1_ICPolarity specifies the TIx Polarity. - * This parameter can be: - * - TIM1_ICPOLARITY_RISING - * - TIM1_ICPOLARITY_FALLING - * @param[in] ICFilter specifies the filter value. - * This parameter must be a value between 0x00 and 0x0F - * @retval None - * @par Required preconditions: - * TI1_Config - * TI2_Config - * TIM1_SelectInputTrigger - */ -void TIM1_TIxExternalClockConfig(TIM1_TIxExternalCLK1Source_TypeDef TIM1_TIxExternalCLKSource, - TIM1_ICPolarity_TypeDef TIM1_ICPolarity, - u8 ICFilter) -{ - /* Check the parameters */ - assert_param(IS_TIM1_TIXCLK_SOURCE_OK(TIM1_TIxExternalCLKSource)); - assert_param(IS_TIM1_IC_POLARITY_OK(TIM1_ICPolarity)); - assert_param(IS_TIM1_IC_FILTER_OK(ICFilter)); - - /* Configure the TIM1 Input Clock Source */ - if (TIM1_TIxExternalCLKSource == TIM1_TIXEXTERNALCLK1SOURCE_TI2) - { - TI2_Config((u8)TIM1_ICPolarity, (u8)TIM1_ICSELECTION_DIRECTTI, (u8)ICFilter); - } - else - { - TI1_Config((u8)TIM1_ICPolarity, (u8)TIM1_ICSELECTION_DIRECTTI, (u8)ICFilter); - } - - /* Select the Trigger source */ - TIM1_SelectInputTrigger(TIM1_TIxExternalCLKSource); - - /* Select the External clock mode1 */ - TIM1->SMCR |= (u8)(TIM1_SLAVEMODE_EXTERNAL1); -} - -/** - * @brief Selects the TIM1 Input Trigger source. - * @param[in] TIM1_InputTriggerSource specifies Input Trigger source. - * This parameter can be one of the following values: - * - TIM1_TS_TI1F_ED: TI1 Edge Detector - * - TIM1_TS_TI1FP1: Filtered Timer Input 1 - * - TIM1_TS_TI2FP2: Filtered Timer Input 2 - * - TIM1_TS_ETRF: External Trigger input - * @retval None - */ -void TIM1_SelectInputTrigger(TIM1_TS_TypeDef TIM1_InputTriggerSource) -{ - /* Check the parameters */ - assert_param(IS_TIM1_TRIGGER_SELECTION_OK(TIM1_InputTriggerSource)); - - /* Select the Tgigger Source */ - TIM1->SMCR = (u8)((TIM1->SMCR & (u8)(~TIM1_SMCR_TS)) | (u8)TIM1_InputTriggerSource); -} - - -/** - * @brief Enables or Disables the TIM1 Update event. - * @param[in] NewState new state of the TIM1 peripheral Preload register. This parameter can - * be ENABLE or DISABLE. - * @retval None - */ - -void TIM1_UpdateDisableConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the UDIS Bit */ - if (NewState != DISABLE) - { - TIM1->CR1 |= TIM1_CR1_UDIS; - } - else - { - TIM1->CR1 &= (u8)(~TIM1_CR1_UDIS); - } -} - -/** - * @brief Selects the TIM1 Update Request Interrupt source. - * @param[in] TIM1_UpdateSource specifies the Update source. - * This parameter can be one of the following values - * - TIM1_UPDATESOURCE_REGULAR - * - TIM1_UPDATESOURCE_GLOBAL - * @retval None - */ -void TIM1_UpdateRequestConfig(TIM1_UpdateSource_TypeDef TIM1_UpdateSource) -{ - /* Check the parameters */ - assert_param(IS_TIM1_UPDATE_SOURCE_OK(TIM1_UpdateSource)); - - /* Set or Reset the URS Bit */ - if (TIM1_UpdateSource != TIM1_UPDATESOURCE_GLOBAL) - { - TIM1->CR1 |= TIM1_CR1_URS; - } - else - { - TIM1->CR1 &= (u8)(~TIM1_CR1_URS); - } -} - - -/** - * @brief Enables or Disables the TIM1’s Hall sensor interface. - * @param[in] NewState new state of the TIM1 Hall sensor interface.This parameter can - * be ENABLE or DISABLE. - * @retval None - */ -void TIM1_SelectHallSensor(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the TI1S Bit */ - if (NewState != DISABLE) - { - TIM1->CR2 |= TIM1_CR2_TI1S; - } - else - { - TIM1->CR2 &= (u8)(~TIM1_CR2_TI1S); - } -} - - -/** - * @brief Selects the TIM1’s One Pulse Mode. - * @param[in] TIM1_OPMode specifies the OPM Mode to be used. - * This parameter can be one of the following values - * - TIM1_OPMODE_SINGLE - * - TIM1_OPMODE_REPETITIVE - * @retval None - */ -void TIM1_SelectOnePulseMode(TIM1_OPMode_TypeDef TIM1_OPMode) -{ - /* Check the parameters */ - assert_param(IS_TIM1_OPM_MODE_OK(TIM1_OPMode)); - - /* Set or Reset the OPM Bit */ - if (TIM1_OPMode != TIM1_OPMODE_REPETITIVE) - { - TIM1->CR1 |= TIM1_CR1_OPM; - } - else - { - TIM1->CR1 &= (u8)(~TIM1_CR1_OPM); - } - -} - - -/** - * @brief Selects the TIM1 Trigger Output Mode. - * @param[in] TIM1_TRGOSource specifies the Trigger Output source. - * This parameter can be one of the following values - * - TIM1_TRGOSOURCE_RESET - * - TIM1_TRGOSOURCE_ENABLE - * - TIM1_TRGOSOURCE_UPDATE - * - TIM1_TRGOSource_OC1 - * - TIM1_TRGOSOURCE_OC1REF - * - TIM1_TRGOSOURCE_OC2REF - * - TIM1_TRGOSOURCE_OC3REF - * @retval None - */ -void TIM1_SelectOutputTrigger(TIM1_TRGOSource_TypeDef TIM1_TRGOSource) -{ - - /* Check the parameters */ - assert_param(IS_TIM1_TRGO_SOURCE_OK(TIM1_TRGOSource)); - /* Reset the MMS Bits & Select the TRGO source */ - TIM1->CR2 = (u8)((TIM1->CR2 & (u8)(~TIM1_CR2_MMS )) | (u8) TIM1_TRGOSource); -} - -/** - * @brief Selects the TIM1 Slave Mode. - * @param[in] TIM1_SlaveMode specifies the TIM1 Slave Mode. - * This parameter can be one of the following values - * - TIM1_SLAVEMODE_RESET - * - TIM1_SLAVEMODE_GATED - * - TIM1_SLAVEMODE_TRIGGER - * - TIM1_SLAVEMODE_EXTERNAL1 - * @retval None - */ -void TIM1_SelectSlaveMode(TIM1_SlaveMode_TypeDef TIM1_SlaveMode) -{ - - /* Check the parameters */ - assert_param(IS_TIM1_SLAVE_MODE_OK(TIM1_SlaveMode)); - - /* Reset the SMS Bits */ /* Select the Slave Mode */ - TIM1->SMCR = (u8)((TIM1->SMCR & (u8)(~TIM1_SMCR_SMS)) | (u8)TIM1_SlaveMode); - -} - -/** - * @brief Sets or Resets the TIM1 Master/Slave Mode. - * @param[in] NewState new state of the synchronization between TIM1 and its slaves - * (through TRGO). This parameter can be ENABLE or DISABLE. - * @retval None - */ -void TIM1_SelectMasterSlaveMode(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the MSM Bit */ - if (NewState != DISABLE) - { - TIM1->SMCR |= TIM1_SMCR_MSM; - } - else - { - TIM1->SMCR &= (u8)(~TIM1_SMCR_MSM); - } -} - -/** - * @brief Configures the TIM1 Encoder Interface. - * @param[in] TIM1_EncoderMode specifies the TIM1 Encoder Mode. - * This parameter can be one of the following values - * - TIM1_ENCODERMODE_TI1: Counter counts on TI1FP1 edge - * depending on TI2FP2 level. - * - TIM1_ENCODERMODE_TI2: Counter counts on TI2FP2 edge - * depending on TI1FP1 level. - * - TIM1_ENCODERMODE_TI12: Counter counts on both TI1FP1 and - * TI2FP2 edges depending on the level of the other input. - * @param[in] TIM1_IC1Polarity specifies the IC1 Polarity. - * This parameter can be one of the following values - * - TIM1_ICPOLARITY_FALLING - * - TIM1_ICPOLARITY_RISING - * @param[in] TIM1_IC2Polarity specifies the IC2 Polarity. - * This parameter can be one of the following values - * - TIM1_ICPOLARITY_FALLING - * - TIM1_ICPOLARITY_RISING - * @retval None - */ -void TIM1_EncoderInterfaceConfig(TIM1_EncoderMode_TypeDef TIM1_EncoderMode, - TIM1_ICPolarity_TypeDef TIM1_IC1Polarity, - TIM1_ICPolarity_TypeDef TIM1_IC2Polarity) -{ - - - /* Check the parameters */ - assert_param(IS_TIM1_ENCODER_MODE_OK(TIM1_EncoderMode)); - assert_param(IS_TIM1_IC_POLARITY_OK(TIM1_IC1Polarity)); - assert_param(IS_TIM1_IC_POLARITY_OK(TIM1_IC2Polarity)); - - /* Set the TI1 and the TI2 Polarities */ - if (TIM1_IC1Polarity != TIM1_ICPOLARITY_RISING) - { - TIM1->CCER1 |= TIM1_CCER1_CC1P; - } - else - { - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC1P); - } - - if (TIM1_IC2Polarity != TIM1_ICPOLARITY_RISING) - { - TIM1->CCER1 |= TIM1_CCER1_CC2P; - } - else - { - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC2P); - } - /* Set the encoder Mode */ - TIM1->SMCR = (u8)((TIM1->SMCR & (u8)(TIM1_SMCR_MSM | TIM1_SMCR_TS)) | (u8) TIM1_EncoderMode); - - /* Select the Capture Compare 1 and the Capture Compare 2 as input */ - TIM1->CCMR1 = (u8)((TIM1->CCMR1 & (u8)(~TIM1_CCMR_CCxS)) | (u8) CCMR_TIxDirect_Set); - TIM1->CCMR2 = (u8)((TIM1->CCMR2 & (u8)(~TIM1_CCMR_CCxS)) | (u8) CCMR_TIxDirect_Set); - -} - -/** - * @brief Configures the TIM1 Prescaler. - * @param[in] Prescaler specifies the Prescaler Register value - * This parameter must be a value between 0x0000 and 0xFFFF - * @param[in] TIM1_PSCReloadMode specifies the TIM1 Prescaler Reload mode. - * This parameter can be one of the following values - * - TIM1_PSCRELOADMODE_IMMEDIATE: The Prescaler is loaded immediately. - * - TIM1_PSCRELOADMODE_UPDATE: The Prescaler is loaded at the update event. - * @retval None - */ - -void TIM1_PrescalerConfig(u16 Prescaler, - TIM1_PSCReloadMode_TypeDef TIM1_PSCReloadMode) -{ - /* Check the parameters */ - assert_param(IS_TIM1_PRESCALER_RELOAD_OK(TIM1_PSCReloadMode)); - - /* Set the Prescaler value */ - TIM1->PSCRH = (u8)(Prescaler >> 8); - TIM1->PSCRL = (u8)(Prescaler); - - /* Set or reset the UG Bit */ - TIM1->EGR = (u8)TIM1_PSCReloadMode; - -} - -/** - * @brief Specifies the TIM1 Counter Mode to be used. - * @param[in] TIM1_CounterMode specifies the Counter Mode to be used - * This parameter can be one of the following values: - * - TIM1_COUNTERMODE_UP: TIM1 Up Counting Mode - * - TIM1_COUNTERMODE_DOWN: TIM1 Down Counting Mode - * - TIM1_COUNTERMODE_CENTERALIGNED1: TIM1 Center Aligned Mode1 - * - TIM1_CounterMode_CenterAligned2: TIM1 Center Aligned Mode2 - * - TIM1_COUNTERMODE_CENTERALIGNED3: TIM1 Center Aligned Mode3 - * @retval None - */ -void TIM1_CounterModeConfig(TIM1_CounterMode_TypeDef TIM1_CounterMode) -{ - /* Check the parameters */ - assert_param(IS_TIM1_COUNTER_MODE_OK(TIM1_CounterMode)); - - - /* Reset the CMS and DIR Bits & Set the Counter Mode */ - TIM1->CR1 = (u8)((TIM1->CR1 & (u8)((u8)(~TIM1_CR1_CMS) & (u8)(~TIM1_CR1_DIR))) | (u8)TIM1_CounterMode); -} - - -/** - * @brief Forces the TIM1 Channel1 output waveform to active or inactive level. - * @param[in] TIM1_ForcedAction specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * - TIM1_FORCEDACTION_ACTIVE: Force active level on OC1REF - * - TIM1_FORCEDACTION_INACTIVE: Force inactive level on OC1REF. - * @retval None - */ -void TIM1_ForcedOC1Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) -{ - /* Check the parameters */ - assert_param(IS_TIM1_FORCED_ACTION_OK(TIM1_ForcedAction)); - - /* Reset the OCM Bits & Configure the Forced output Mode */ - TIM1->CCMR1 = (u8)((TIM1->CCMR1 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_ForcedAction); -} - - -/** - * @brief Forces the TIM1 Channel2 output waveform to active or inactive level. - * @param[in] TIM1_ForcedAction specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * - TIM1_FORCEDACTION_ACTIVE: Force active level on OC2REF - * - TIM1_FORCEDACTION_INACTIVE: Force inactive level on OC2REF. - * @retval None - */ -void TIM1_ForcedOC2Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) -{ - /* Check the parameters */ - assert_param(IS_TIM1_FORCED_ACTION_OK(TIM1_ForcedAction)); - - /* Reset the OCM Bits & Configure the Forced output Mode */ - TIM1->CCMR2 = (u8)((TIM1->CCMR2 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_ForcedAction); -} - - -/** - * @brief Forces the TIM1 Channel3 output waveform to active or inactive level. - * @param[in] TIM1_ForcedAction specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * - TIM1_FORCEDACTION_ACTIVE: Force active level on OC3REF - * - TIM1_FORCEDACTION_INACTIVE: Force inactive level on - * OC3REF. - * @retval None - */ -void TIM1_ForcedOC3Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) -{ - /* Check the parameters */ - assert_param(IS_TIM1_FORCED_ACTION_OK(TIM1_ForcedAction)); - - /* Reset the OCM Bits */ /* Configure The Forced output Mode */ - TIM1->CCMR3 = (u8)((TIM1->CCMR3 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_ForcedAction); -} - - -/** - * @brief Forces the TIM1 Channel4 output waveform to active or inactive level. - * @param[in] TIM1_ForcedAction specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * - TIM1_FORCEDACTION_ACTIVE: Force active level on OC4REF - * - TIM1_FORCEDACTION_INACTIVE: Force inactive level on - * OC4REF. - * @retval None - */ -void TIM1_ForcedOC4Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction) -{ - /* Check the parameters */ - assert_param(IS_TIM1_FORCED_ACTION_OK(TIM1_ForcedAction)); - - /* Reset the OCM Bits & Configure the Forced output Mode */ - TIM1->CCMR4 = (u8)((TIM1->CCMR4 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_ForcedAction); -} - - -/** - * @brief Enables or disables TIM1 peripheral Preload register on ARR. - * @param[in] NewState new state of the TIM1 peripheral Preload register. - * This parameter can be ENABLE or DISABLE. - * @retval None - */ -void TIM1_ARRPreloadConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the ARPE Bit */ - if (NewState != DISABLE) - { - TIM1->CR1 |= TIM1_CR1_ARPE; - } - else - { - TIM1->CR1 &= (u8)(~TIM1_CR1_ARPE); - } -} - - -/** - * @brief Selects the TIM1 peripheral Commutation event. - * @param[in] NewState new state of the Commutation event. - * This parameter can be ENABLE or DISABLE. - * @retval None - */ -void TIM1_SelectCOM(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the COMS Bit */ - if (NewState != DISABLE) - { - TIM1->CR2 |= TIM1_CR2_COMS; - } - else - { - TIM1->CR2 &= (u8)(~TIM1_CR2_COMS); - } -} - -/** - * @brief Sets or Resets the TIM1 peripheral Capture Compare Preload Control bit. - * @param[in] NewState new state of the Capture Compare Preload Control bit. - * This parameter can be ENABLE or DISABLE. - * @retval None - */ -void TIM1_CCPreloadControl(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the CCPC Bit */ - if (NewState != DISABLE) - { - TIM1->CR2 |= TIM1_CR2_CCPC; - } - else - { - TIM1->CR2 &= (u8)(~TIM1_CR2_CCPC); - } -} - - -/** - * @brief Enables or disables the TIM1 peripheral Preload Register on CCR1. - * @param[in] NewState new state of the Capture Compare Preload register. - * This parameter can be ENABLE or DISABLE. - * @retval None - */ -void TIM1_OC1PreloadConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the OC1PE Bit */ - if (NewState != DISABLE) - { - TIM1->CCMR1 |= TIM1_CCMR_OCxPE; - } - else - { - TIM1->CCMR1 &= (u8)(~TIM1_CCMR_OCxPE); - } -} - - -/** - * @brief Enables or disables the TIM1 peripheral Preload Register on CCR2. - * @param[in] NewState new state of the Capture Compare Preload register. - * This parameter can be ENABLE or DISABLE. - * @retval None - */ -void TIM1_OC2PreloadConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the OC2PE Bit */ - if (NewState != DISABLE) - { - TIM1->CCMR2 |= TIM1_CCMR_OCxPE; - } - else - { - TIM1->CCMR2 &= (u8)(~TIM1_CCMR_OCxPE); - } -} - - -/** - * @brief Enables or disables the TIM1 peripheral Preload Register on CCR3. - * @param[in] NewState new state of the Capture Compare Preload register. - * This parameter can be ENABLE or DISABLE. - * @retval None - */ -void TIM1_OC3PreloadConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the OC3PE Bit */ - if (NewState != DISABLE) - { - TIM1->CCMR3 |= TIM1_CCMR_OCxPE; - } - else - { - TIM1->CCMR3 &= (u8)(~TIM1_CCMR_OCxPE); - } -} - - -/** - * @brief Enables or disables the TIM1 peripheral Preload Register on CCR4. - * @param[in] NewState new state of the Capture Compare Preload register. - * This parameter can be ENABLE or DISABLE. - * @retval None - */ - -void TIM1_OC4PreloadConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the OC4PE Bit */ - if (NewState != DISABLE) - { - TIM1->CCMR4 |= TIM1_CCMR_OCxPE; - } - else - { - TIM1->CCMR4 &= (u8)(~TIM1_CCMR_OCxPE); - } -} - -/** - * @brief Configures the TIM1 Capture Compare 1 Fast feature. - * @param[in] NewState new state of the Output Compare Fast Enable bit. - * This parameter can be ENABLE or DISABLE. - * @retval None - */ -void TIM1_OC1FastConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the OC1FE Bit */ - if (NewState != DISABLE) - { - TIM1->CCMR1 |= TIM1_CCMR_OCxFE; - } - else - { - TIM1->CCMR1 &= (u8)(~TIM1_CCMR_OCxFE); - } -} - - -/** - * @brief Configures the TIM1 Capture Compare 2 Fast feature. - * @param[in] NewState new state of the Output Compare Fast Enable bit. - * This parameter can be ENABLE or DISABLE. - * @retval None - */ - -void TIM1_OC2FastConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the OC2FE Bit */ - if (NewState != DISABLE) - { - TIM1->CCMR2 |= TIM1_CCMR_OCxFE; - } - else - { - TIM1->CCMR2 &= (u8)(~TIM1_CCMR_OCxFE); - } -} - - -/** - * @brief Configures the TIM1 Capture Compare 3 Fast feature. - * @param[in] NewState new state of the Output Compare Fast Enable bit. - * This parameter can be ENABLE or DISABLE. - * @retval None - */ -void TIM1_OC3FastConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the OC3FE Bit */ - if (NewState != DISABLE) - { - TIM1->CCMR3 |= TIM1_CCMR_OCxFE; - } - else - { - TIM1->CCMR3 &= (u8)(~TIM1_CCMR_OCxFE); - } -} - - -/** - * @brief Configures the TIM1 Capture Compare 4 Fast feature. - * @param[in] NewState new state of the Output Compare Fast Enable bit. - * This parameter can be ENABLE or DISABLE. - * @retval None - */ -void TIM1_OC4FastConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Set or Reset the OC4FE Bit */ - if (NewState != DISABLE) - { - TIM1->CCMR4 |= TIM1_CCMR_OCxFE; - } - else - { - TIM1->CCMR4 &= (u8)(~TIM1_CCMR_OCxFE); - } -} - - -/** - * @brief Configures the TIM1 event to be generated by software. - * @param[in] TIM1_EventSource specifies the event source. - * This parameter can be one of the following values: - * - TIM1_EVENTSOURCE_UPDATE: TIM1 update Event source - * - TIM1_EVENTSOURCE_CC1: TIM1 Capture Compare 1 Event source - * - TIM1_EVENTSOURCE_CC2: TIM1 Capture Compare 2 Event source - * - TIM1_EVENTSOURCE_CC3: TIM1 Capture Compare 3 Event source - * - TIM1_EVENTSOURCE_CC4: TIM1 Capture Compare 4 Event source - * - TIM1_EVENTSOURCE_COM: TIM1 COM Event source - * - TIM1_EVENTSOURCE_TRIGGER: TIM1 Trigger Event source - * - TIM1_EventSourceBreak: TIM1 Break Event source - * @retval None - */ -void TIM1_GenerateEvent(TIM1_EventSource_TypeDef TIM1_EventSource) -{ - /* Check the parameters */ - assert_param(IS_TIM1_EVENT_SOURCE_OK(TIM1_EventSource)); - - /* Set the event sources */ - TIM1->EGR = (u8)TIM1_EventSource; -} - - -/** - * @brief Configures the TIM1 Channel 1 polarity. - * @param[in] TIM1_OCPolarity specifies the OC1 Polarity. - * This parameter can be one of the following values: - * - TIM1_OCPOLARITY_LOW: Output Compare active low - * - TIM1_OCPOLARITY_HIGH: Output Compare active high - * @retval None - */ -void TIM1_OC1PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) -{ - /* Check the parameters */ - assert_param(IS_TIM1_OC_POLARITY_OK(TIM1_OCPolarity)); - - /* Set or Reset the CC1P Bit */ - if (TIM1_OCPolarity != TIM1_OCPOLARITY_HIGH) - { - TIM1->CCER1 |= TIM1_CCER1_CC1P; - } - else - { - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC1P); - } -} - - -/** - * @brief Configures the TIM1 Channel 1N polarity. - * @param[in] TIM1_OCNPolarity specifies the OC1N Polarity. - * This parameter can be one of the following values: - * - TIM1_OCNPOLARITY_LOW: Output Compare active low - * - TIM1_OCNPOLARITY_HIGH: Output Compare active high - * @retval None - */ -void TIM1_OC1NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity) -{ - /* Check the parameters */ - assert_param(IS_TIM1_OCN_POLARITY_OK(TIM1_OCNPolarity)); - - /* Set or Reset the CC3P Bit */ - if (TIM1_OCNPolarity != TIM1_OCNPOLARITY_HIGH) - { - TIM1->CCER1 |= TIM1_CCER1_CC1NP; - } - else - { - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC1NP); - } -} - - -/** - * @brief Configures the TIM1 Channel 2 polarity. - * @param[in] TIM1_OCPolarity specifies the OC2 Polarity. - * This parameter can be one of the following values: - * - TIM1_OCPOLARITY_LOW: Output Compare active low - * - TIM1_OCPOLARITY_HIGH: Output Compare active high - * @retval None - */ -void TIM1_OC2PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) -{ - /* Check the parameters */ - assert_param(IS_TIM1_OC_POLARITY_OK(TIM1_OCPolarity)); - - /* Set or Reset the CC2P Bit */ - if (TIM1_OCPolarity != TIM1_OCPOLARITY_HIGH) - { - TIM1->CCER1 |= TIM1_CCER1_CC2P; - } - else - { - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC2P); - } -} - -/** - * @brief Configures the TIM1 Channel 2N polarity. - * @param[in] TIM1_OCNPolarity specifies the OC2N Polarity. - * This parameter can be one of the following values: - * - TIM1_OCNPOLARITY_LOW: Output Compare active low - * - TIM1_OCNPOLARITY_HIGH: Output Compare active high - * @retval None - */ -void TIM1_OC2NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity) -{ - /* Check the parameters */ - assert_param(IS_TIM1_OCN_POLARITY_OK(TIM1_OCNPolarity)); - - /* Set or Reset the CC3P Bit */ - if (TIM1_OCNPolarity != TIM1_OCNPOLARITY_HIGH) - { - TIM1->CCER1 |= TIM1_CCER1_CC2NP; - } - else - { - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC2NP); - } -} - - -/** - * @brief Configures the TIM1 Channel 3 polarity. - * @param[in] TIM1_OCPolarity specifies the OC3 Polarity. - * This parameter can be one of the following values: - * - TIM1_OCPOLARITY_LOW: Output Compare active low - * - TIM1_OCPOLARITY_HIGH: Output Compare active high - * @retval None - */ -void TIM1_OC3PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) -{ - /* Check the parameters */ - assert_param(IS_TIM1_OC_POLARITY_OK(TIM1_OCPolarity)); - - /* Set or Reset the CC3P Bit */ - if (TIM1_OCPolarity != TIM1_OCPOLARITY_HIGH) - { - TIM1->CCER2 |= TIM1_CCER2_CC3P; - } - else - { - TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC3P); - } -} - - -/** - * @brief Configures the TIM1 Channel 3N polarity. - * @param[in] TIM1_OCNPolarity specifies the OC3N Polarity. - * This parameter can be one of the following values: - * - TIM1_OCNPOLARITY_LOW: Output Compare active low - * - TIM1_OCNPOLARITY_HIGH: Output Compare active high - * @retval None - */ -void TIM1_OC3NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity) -{ - /* Check the parameters */ - assert_param(IS_TIM1_OCN_POLARITY_OK(TIM1_OCNPolarity)); - - /* Set or Reset the CC3P Bit */ - if (TIM1_OCNPolarity != TIM1_OCNPOLARITY_HIGH) - { - TIM1->CCER2 |= TIM1_CCER2_CC3NP; - } - else - { - TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC3NP); - } -} - -/** - * @brief Configures the TIM1 Channel 4 polarity. - * @param[in] TIM1_OCPolarity specifies the OC4 Polarity. - * This parameter can be one of the following values: - * - TIM1_OCPOLARITY_LOW: Output Compare active low - * - TIM1_OCPOLARITY_HIGH: Output Compare active high - * @retval None - */ -void TIM1_OC4PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity) -{ - /* Check the parameters */ - assert_param(IS_TIM1_OC_POLARITY_OK(TIM1_OCPolarity)); - - /* Set or Reset the CC4P Bit */ - if (TIM1_OCPolarity != TIM1_OCPOLARITY_HIGH) - { - TIM1->CCER2 |= TIM1_CCER2_CC4P; - } - else - { - TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC4P); - } -} - - -/** - * @brief Enables or disables the TIM1 Capture Compare Channel x (x=1,..,4). - * @param[in] TIM1_Channel specifies the TIM1 Channel. - * This parameter can be one of the following values: - * - TIM1_CHANNEL_1: TIM1 Channel1 - * - TIM1_CHANNEL_2: TIM1 Channel2 - * - TIM1_CHANNEL_3: TIM1 Channel3 - * - TIM1_CHANNEL_4: TIM1 Channel4 - * @param[in] NewState specifies the TIM1 Channel CCxE bit new state. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM1_CCxCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM1_CHANNEL_OK(TIM1_Channel)); - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (TIM1_Channel == TIM1_CHANNEL_1) - { - /* Set or Reset the CC1E Bit */ - if (NewState != DISABLE) - { - TIM1->CCER1 |= TIM1_CCER1_CC1E; - } - else - { - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC1E); - } - - } - else if (TIM1_Channel == TIM1_CHANNEL_2) - { - /* Set or Reset the CC2E Bit */ - if (NewState != DISABLE) - { - TIM1->CCER1 |= TIM1_CCER1_CC2E; - } - else - { - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC2E); - } - } - else if (TIM1_Channel == TIM1_CHANNEL_3) - { - /* Set or Reset the CC3E Bit */ - if (NewState != DISABLE) - { - TIM1->CCER2 |= TIM1_CCER2_CC3E; - } - else - { - TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC3E); - } - } - else - { - /* Set or Reset the CC4E Bit */ - if (NewState != DISABLE) - { - TIM1->CCER2 |= TIM1_CCER2_CC4E; - } - else - { - TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC4E); - } - } -} - -/** - * @brief Enables or disables the TIM1 Capture Compare Channel xN (xN=1,..,3). - * @param[in] TIM1_Channel specifies the TIM1 Channel. - * This parameter can be one of the following values: - * - TIM1_CHANNEL_1: TIM1 Channel1 - * - TIM1_CHANNEL_2: TIM1 Channel2 - * - TIM1_CHANNEL_3: TIM1 Channel3 - * @param[in] NewState specifies the TIM1 Channel CCxNE bit new state. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM1_CCxNCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM1_COMPLEMENTARY_CHANNEL_OK(TIM1_Channel)); - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (TIM1_Channel == TIM1_CHANNEL_1) - { - /* Set or Reset the CC1NE Bit */ - if (NewState != DISABLE) - { - TIM1->CCER1 |= TIM1_CCER1_CC1NE; - } - else - { - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC1NE); - } - } - else if (TIM1_Channel == TIM1_CHANNEL_2) - { - /* Set or Reset the CC2NE Bit */ - if (NewState != DISABLE) - { - TIM1->CCER1 |= TIM1_CCER1_CC2NE; - } - else - { - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC2NE); - } - } - else - { - /* Set or Reset the CC3NE Bit */ - if (NewState != DISABLE) - { - TIM1->CCER2 |= TIM1_CCER2_CC3NE; - } - else - { - TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC3NE); - } - } -} - - -/** - * @brief Selects the TIM1 Ouput Compare Mode. This function disables the - * selected channel before changing the Ouput Compare Mode. User has to - * enable this channel using TIM1_CCxCmd and TIM1_CCxNCmd functions. - * @param[in] TIM1_Channel specifies the TIM1 Channel. - * This parameter can be one of the following values: - * - TIM1_CHANNEL_1: TIM1 Channel1 - * - TIM1_CHANNEL_2: TIM1 Channel2 - * - TIM1_CHANNEL_3: TIM1 Channel3 - * - TIM1_CHANNEL_4: TIM1 Channel4 - * @param[in] TIM1_OCMode specifies the TIM1 Output Compare Mode. - * This paramter can be one of the following values: - * - TIM1_OCMODE_TIMING - * - TIM1_OCMODE_ACTIVE - * - TIM1_OCMODE_TOGGLE - * - TIM1_OCMODE_PWM1 - * - TIM1_OCMODE_PWM2 - * - TIM1_FORCEDACTION_ACTIVE - * - TIM1_FORCEDACTION_INACTIVE - * @retval None - */ -void TIM1_SelectOCxM(TIM1_Channel_TypeDef TIM1_Channel, TIM1_OCMode_TypeDef TIM1_OCMode) -{ - /* Check the parameters */ - assert_param(IS_TIM1_CHANNEL_OK(TIM1_Channel)); - assert_param(IS_TIM1_OCM_OK(TIM1_OCMode)); - - if (TIM1_Channel == TIM1_CHANNEL_1) - { - /* Disable the Channel 1: Reset the CCE Bit */ - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC1E); - - /* Reset the Output Compare Bits & Set the Output Compare Mode */ - TIM1->CCMR1 = (u8)((TIM1->CCMR1 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_OCMode); - } - else if (TIM1_Channel == TIM1_CHANNEL_2) - { - /* Disable the Channel 2: Reset the CCE Bit */ - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC2E); - - /* Reset the Output Compare Bits & Set the Output Compare Mode */ - TIM1->CCMR2 = (u8)((TIM1->CCMR2 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_OCMode); - } - else if (TIM1_Channel == TIM1_CHANNEL_3) - { - /* Disable the Channel 3: Reset the CCE Bit */ - TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC3E); - - /* Reset the Output Compare Bits & Set the Output Compare Mode */ - TIM1->CCMR3 = (u8)((TIM1->CCMR3 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_OCMode); - } - else - { - /* Disable the Channel 4: Reset the CCE Bit */ - TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC4E); - - /* Reset the Output Compare Bits & Set the Output Compare Mode */ - TIM1->CCMR4 = (u8)((TIM1->CCMR4 & (u8)(~TIM1_CCMR_OCM)) | (u8)TIM1_OCMode); - } -} - - -/** - * @brief Sets the TIM1 Counter Register value. - * @param[in] Counter specifies the Counter register new value. - * This parameter is between 0x0000 and 0xFFFF. - * @retval None - */ -void TIM1_SetCounter(u16 Counter) -{ - /* Set the Counter Register value */ - TIM1->CNTRH = (u8)(Counter >> 8); - TIM1->CNTRL = (u8)(Counter); - -} - - -/** - * @brief Sets the TIM1 Autoreload Register value. - * @param[in] Autoreload specifies the Autoreload register new value. - * This parameter is between 0x0000 and 0xFFFF. - * @retval None - */ -void TIM1_SetAutoreload(u16 Autoreload) -{ - - /* Set the Autoreload Register value */ - TIM1->ARRH = (u8)(Autoreload >> 8); - TIM1->ARRL = (u8)(Autoreload); - -} - - -/** - * @brief Sets the TIM1 Capture Compare1 Register value. - * @param[in] Compare1 specifies the Capture Compare1 register new value. - * This parameter is between 0x0000 and 0xFFFF. - * @retval None - */ -void TIM1_SetCompare1(u16 Compare1) -{ - /* Set the Capture Compare1 Register value */ - TIM1->CCR1H = (u8)(Compare1 >> 8); - TIM1->CCR1L = (u8)(Compare1); - -} - - -/** - * @brief Sets the TIM1 Capture Compare2 Register value. - * @param[in] Compare2 specifies the Capture Compare2 register new value. - * This parameter is between 0x0000 and 0xFFFF. - * @retval None - */ -void TIM1_SetCompare2(u16 Compare2) -{ - /* Set the Capture Compare2 Register value */ - TIM1->CCR2H = (u8)(Compare2 >> 8); - TIM1->CCR2L = (u8)(Compare2); - -} - - -/** - * @brief Sets the TIM1 Capture Compare3 Register value. - * @param[in] Compare3 specifies the Capture Compare3 register new value. - * This parameter is between 0x0000 and 0xFFFF. - * @retval None - */ -void TIM1_SetCompare3(u16 Compare3) -{ - /* Set the Capture Compare3 Register value */ - TIM1->CCR3H = (u8)(Compare3 >> 8); - TIM1->CCR3L = (u8)(Compare3); - -} - - -/** - * @brief Sets the TIM1 Capture Compare4 Register value. - * @param[in] Compare4 specifies the Capture Compare4 register new value. - * This parameter is between 0x0000 and 0xFFFF. - * @retval None - */ -void TIM1_SetCompare4(u16 Compare4) -{ - /* Set the Capture Compare4 Register value */ - TIM1->CCR4H = (u8)(Compare4 >> 8); - TIM1->CCR4L = (u8)(Compare4); -} - - -/** - * @brief Sets the TIM1 Input Capture 1 prescaler. - * @param[in] TIM1_IC1Prescaler specifies the Input Capture prescaler new value - * This parameter can be one of the following values: - * - TIM1_ICPSC_DIV1: no prescaler - * - TIM1_ICPSC_DIV2: capture is done once every 2 events - * - TIM1_ICPSC_DIV4: capture is done once every 4 events - * - TIM1_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -void TIM1_SetIC1Prescaler(TIM1_ICPSC_TypeDef TIM1_IC1Prescaler) -{ - /* Check the parameters */ - assert_param(IS_TIM1_IC_PRESCALER_OK(TIM1_IC1Prescaler)); - - /* Reset the IC1PSC Bits */ /* Set the IC1PSC value */ - TIM1->CCMR1 = (u8)((TIM1->CCMR1 & (u8)(~TIM1_CCMR_ICxPSC)) | (u8)TIM1_IC1Prescaler); - -} - -/** - * @brief Sets the TIM1 Input Capture 2 prescaler. - * @param[in] TIM1_IC2Prescaler specifies the Input Capture prescaler new value - * This parameter can be one of the following values: - * - TIM1_ICPSC_DIV1: no prescaler - * - TIM1_ICPSC_DIV2: capture is done once every 2 events - * - TIM1_ICPSC_DIV4: capture is done once every 4 events - * - TIM1_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -void TIM1_SetIC2Prescaler(TIM1_ICPSC_TypeDef TIM1_IC2Prescaler) -{ - - /* Check the parameters */ - assert_param(IS_TIM1_IC_PRESCALER_OK(TIM1_IC2Prescaler)); - - /* Reset the IC1PSC Bits */ /* Set the IC1PSC value */ - TIM1->CCMR2 = (u8)((TIM1->CCMR2 & (u8)(~TIM1_CCMR_ICxPSC)) | (u8)TIM1_IC2Prescaler); -} - - -/** - * @brief Sets the TIM1 Input Capture 3 prescaler. - * @param[in] TIM1_IC3Prescaler specifies the Input Capture prescaler new value - * This parameter can be one of the following values: - * - TIM1_ICPSC_DIV1: no prescaler - * - TIM1_ICPSC_DIV2: capture is done once every 2 events - * - TIM1_ICPSC_DIV4: capture is done once every 4 events - * - TIM1_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -void TIM1_SetIC3Prescaler(TIM1_ICPSC_TypeDef TIM1_IC3Prescaler) -{ - - /* Check the parameters */ - assert_param(IS_TIM1_IC_PRESCALER_OK(TIM1_IC3Prescaler)); - - /* Reset the IC1PSC Bits & Set the IC1PSC value */ - TIM1->CCMR3 = (u8)((TIM1->CCMR3 & (u8)(~TIM1_CCMR_ICxPSC)) | (u8)TIM1_IC3Prescaler); -} - - -/** - * @brief Sets the TIM1 Input Capture 4 prescaler. - * @param[in] TIM1_IC4Prescaler specifies the Input Capture prescaler new value - * This parameter can be one of the following values: - * - TIM1_ICPSC_DIV1: no prescaler - * - TIM1_ICPSC_DIV2: capture is done once every 2 events - * - TIM1_ICPSC_DIV4: capture is done once every 4 events - * - TIM1_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -void TIM1_SetIC4Prescaler(TIM1_ICPSC_TypeDef TIM1_IC4Prescaler) -{ - - /* Check the parameters */ - assert_param(IS_TIM1_IC_PRESCALER_OK(TIM1_IC4Prescaler)); - - /* Reset the IC1PSC Bits & Set the IC1PSC value */ - TIM1->CCMR4 = (u8)((TIM1->CCMR4 & (u8)(~TIM1_CCMR_ICxPSC)) | (u8)TIM1_IC4Prescaler); -} - - -/** - * @brief Gets the TIM1 Input Capture 1 value. - * @param[in] : - * None - * @retval Capture Compare 1 Register value. - */ -u16 TIM1_GetCapture1(void) -{ - /* Get the Capture 1 Register value */ - - u16 tmpccr1 = 0; - u8 tmpccr1l=0, tmpccr1h=0; - - tmpccr1h = TIM1->CCR1H; - tmpccr1l = TIM1->CCR1L; - - tmpccr1 = (u16)(tmpccr1l); - tmpccr1 |= (u16)((u16)tmpccr1h << 8); - /* Get the Capture 1 Register value */ - return (u16)tmpccr1; -} - -/** - * @brief Gets the TIM1 Input Capture 2 value. - * @param[in] : - * None - * @retval Capture Compare 2 Register value. - */ -u16 TIM1_GetCapture2(void) -{ - /* Get the Capture 2 Register value */ - - u16 tmpccr2 = 0; - u8 tmpccr2l=0, tmpccr2h=0; - - tmpccr2h = TIM1->CCR2H; - tmpccr2l = TIM1->CCR2L; - - tmpccr2 = (u16)(tmpccr2l); - tmpccr2 |= (u16)((u16)tmpccr2h << 8); - /* Get the Capture 2 Register value */ - return (u16)tmpccr2; -} - -/** - * @brief Gets the TIM1 Input Capture 3 value. - * @param[in] : - * None - * @retval Capture Compare 3 Register value. - */ -u16 TIM1_GetCapture3(void) -{ - /* Get the Capture 3 Register value */ - u16 tmpccr3 = 0; - u8 tmpccr3l=0, tmpccr3h=0; - - tmpccr3h = TIM1->CCR3H; - tmpccr3l = TIM1->CCR3L; - - tmpccr3 = (u16)(tmpccr3l); - tmpccr3 |= (u16)((u16)tmpccr3h << 8); - /* Get the Capture 3 Register value */ - return (u16)tmpccr3; -} - -/** - * @brief Gets the TIM1 Input Capture 4 value. - * @param[in] : - * None - * @retval Capture Compare 4 Register value. - */ -u16 TIM1_GetCapture4(void) -{ - /* Get the Capture 4 Register value */ - u16 tmpccr4 = 0; - u8 tmpccr4l=0, tmpccr4h=0; - - tmpccr4h = TIM1->CCR4H; - tmpccr4l = TIM1->CCR4L; - - tmpccr4 = (u16)(tmpccr4l); - tmpccr4 |= (u16)((u16)tmpccr4h << 8); - /* Get the Capture 4 Register value */ - return (u16)tmpccr4; -} - - -/** - * @brief Gets the TIM1 Counter value. - * @param[in] : - * None - * @retval Counter Register value. - */ -u16 TIM1_GetCounter(void) -{ - /* Get the Counter Register value */ - return (u16)(((u16)TIM1->CNTRH << 8) | (u16)(TIM1->CNTRL)); -} - - -/** - * @brief Gets the TIM1 Prescaler value. - * @param[in] : - * None - * @retval Prescaler Register value. - */ -u16 TIM1_GetPrescaler(void) -{ - /* Get the Prescaler Register value */ - return (u16)(((u16)TIM1->PSCRH << 8) | (u16)(TIM1->PSCRL)); -} - - -/** - * @brief Checks whether the specified TIM1 flag is set or not. - * @param[in] TIM1_FLAG specifies the flag to check. - * This parameter can be one of the following values: - * - TIM1_FLAG_UPDATE: TIM1 update Flag - * - TIM1_FLAG_CC1: TIM1 Capture Compare 1 Flag - * - TIM1_FLAG_CC2: TIM1 Capture Compare 2 Flag - * - TIM1_FLAG_CC3: TIM1 Capture Compare 3 Flag - * - TIM1_FLAG_CC4: TIM1 Capture Compare 4 Flag - * - TIM1_FLAG_COM: TIM1 Commutation Flag - * - TIM1_FLAG_TRIGGER: TIM1 Trigger Flag - * - TIM1_FLAG_BREAK: TIM1 Break Flag - * - TIM1_FLAG_CC1OF: TIM1 Capture Compare 1 overcapture Flag - * - TIM1_FLAG_CC2OF: TIM1 Capture Compare 2 overcapture Flag - * - TIM1_FLAG_CC3OF: TIM1 Capture Compare 3 overcapture Flag - * - TIM1_FLAG_CC4OF: TIM1 Capture Compare 4 overcapture Flag - * @retval FlagStatus The new state of TIM1_FLAG (SET or RESET). - */ -FlagStatus TIM1_GetFlagStatus(TIM1_FLAG_TypeDef TIM1_FLAG) -{ - volatile FlagStatus bitstatus = RESET; - vu8 tim1_flag_l, tim1_flag_h; - - /* Check the parameters */ - assert_param(IS_TIM1_GET_FLAG_OK(TIM1_FLAG)); - - tim1_flag_l = (u8)(TIM1_FLAG); - tim1_flag_h = (u8)((u16)TIM1_FLAG >> 8); - - if (((TIM1->SR1 & tim1_flag_l) | (TIM1->SR2 & tim1_flag_h)) != 0) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return (FlagStatus)(bitstatus); -} - - -/** - * @brief Clears the TIM1’s pending flags. - * @param[in] TIM1_FLAG specifies the flag to clear. - * This parameter can be one of the following values: - * - TIM1_FLAG_UPDATE: TIM1 update Flag - * - TIM1_FLAG_CC1: TIM1 Capture Compare 1 Flag - * - TIM1_FLAG_CC2: TIM1 Capture Compare 2 Flag - * - TIM1_FLAG_CC3: TIM1 Capture Compare 3 Flag - * - TIM1_FLAG_CC4: TIM1 Capture Compare 4 Flag - * - TIM1_FLAG_COM: TIM1 Commutation Flag - * - TIM1_FLAG_TRIGGER: TIM1 Trigger Flag - * - TIM1_FLAG_BREAK: TIM1 Break Flag - * - TIM1_FLAG_CC1OF: TIM1 Capture Compare 1 overcapture Flag - * - TIM1_FLAG_CC2OF: TIM1 Capture Compare 2 overcapture Flag - * - TIM1_FLAG_CC3OF: TIM1 Capture Compare 3 overcapture Flag - * - TIM1_FLAG_CC4OF: TIM1 Capture Compare 4 overcapture Flag - * @retval None. - */ -void TIM1_ClearFlag(TIM1_FLAG_TypeDef TIM1_FLAG) -{ - /* Check the parameters */ - assert_param(IS_TIM1_CLEAR_FLAG_OK(TIM1_FLAG)); - - /* Clear the flags (rc_w0) clear this bit by writing 0. Writing ‘1’ has no effect*/ - TIM1->SR1 = (u8)(~(u8)(TIM1_FLAG)); - TIM1->SR2 = (u8)((u8)(~((u8)((u16)TIM1_FLAG >> 8))) & (u8)0x1E); -} - - -/** - * @brief Checks whether the TIM1 interrupt has occurred or not. - * @param[in] TIM1_IT specifies the TIM1 interrupt source to check. - * This parameter can be one of the following values: - * - TIM1_IT_UPDATE: TIM1 update Interrupt source - * - TIM1_IT_CC1: TIM1 Capture Compare 1 Interrupt source - * - TIM1_IT_CC2: TIM1 Capture Compare 2 Interrupt source - * - TIM1_IT_CC3: TIM1 Capture Compare 3 Interrupt source - * - TIM1_IT_CC4: TIM1 Capture Compare 4 Interrupt source - * - TIM1_IT_COM: TIM1 Commutation Interrupt source - * - TIM1_IT_TRIGGER: TIM1 Trigger Interrupt source - * - TIM1_IT_BREAK: TIM1 Break Interrupt source - * @retval ITStatus The new state of the TIM1_IT(SET or RESET). - */ - -ITStatus TIM1_GetITStatus(TIM1_IT_TypeDef TIM1_IT) -{ - volatile ITStatus bitstatus = RESET; - vu8 TIM1_itStatus = 0, TIM1_itEnable = 0; - - /* Check the parameters */ - assert_param(IS_TIM1_GET_IT_OK(TIM1_IT)); - - TIM1_itStatus = (u8)(TIM1->SR1 & (u8)TIM1_IT); - - TIM1_itEnable = (u8)(TIM1->IER & (u8)TIM1_IT); - - if ((TIM1_itStatus != (u8)RESET ) && (TIM1_itEnable != (u8)RESET )) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return (ITStatus)(bitstatus); -} - - -/** - * @brief Clears the TIM1's interrupt pending bits. - * @param[in] TIM1_IT specifies the pending bit to clear. - * This parameter can be one of the following values: - * - TIM1_IT_UPDATE: TIM1 update Interrupt source - * - TIM1_IT_CC1: TIM1 Capture Compare 1 Interrupt source - * - TIM1_IT_CC2: TIM1 Capture Compare 2 Interrupt source - * - TIM1_IT_CC3: TIM1 Capture Compare 3 Interrupt source - * - TIM1_IT_CC4: TIM1 Capture Compare 4 Interrupt source - * - TIM1_IT_COM: TIM1 Commutation Interrupt source - * - TIM1_IT_TRIGGER: TIM1 Trigger Interrupt source - * - TIM1_IT_BREAK: TIM1 Break Interrupt source - * @retval None. - */ -void TIM1_ClearITPendingBit(TIM1_IT_TypeDef TIM1_IT) -{ - /* Check the parameters */ - assert_param(IS_TIM1_IT_OK(TIM1_IT)); - - /* Clear the IT pending Bit */ - TIM1->SR1 = (u8)(~(u8)TIM1_IT); -} - - -/** - * @brief Configure the TI1 as Input. - * @param[in] TIM1_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * - TIM1_ICPOLARITY_FALLING - * - TIM1_ICPOLARITY_RISING - * @param[in] TIM1_ICSelection specifies the input to be used. - * This parameter can be one of the following values: - * - TIM1_ICSELECTION_DIRECTTI: TIM1 Input 1 is selected to - * be connected to IC1. - * - TIM1_ICSELECTION_INDIRECTTI: TIM1 Input 1 is selected to - * be connected to IC2. - * @param[in] TIM1_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TI1_Config(u8 TIM1_ICPolarity, - u8 TIM1_ICSelection, - u8 TIM1_ICFilter) -{ - - /* Disable the Channel 1: Reset the CCE Bit */ - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC1E); - - /* Select the Input and set the filter */ - TIM1->CCMR1 = (u8)((TIM1->CCMR1 & (u8)(~( TIM1_CCMR_CCxS | TIM1_CCMR_ICxF ))) | (u8)(( (TIM1_ICSelection)) | ((u8)( TIM1_ICFilter << 4)))); - - - - /* Select the Polarity */ - if (TIM1_ICPolarity != TIM1_ICPOLARITY_RISING) - { - TIM1->CCER1 |= TIM1_CCER1_CC1P; - } - else - { - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC1P); - } - - /* Set the CCE Bit */ - TIM1->CCER1 |= TIM1_CCER1_CC1E; -} - - -/** - * @brief Configure the TI2 as Input. - * @param[in] TIM1_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * - TIM1_ICPOLARITY_FALLING - * - TIM1_ICPOLARITY_RISING - * @param[in] TIM1_ICSelection specifies the input to be used. - * This parameter can be one of the following values: - * - TIM1_ICSELECTION_DIRECTTI: TIM1 Input 2 is selected to - * be connected to IC2. - * - TIM1_ICSELECTION_INDIRECTTI: TIM1 Input 2 is selected to - * be connected to IC1. - * @param[in] TIM1_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TI2_Config(u8 TIM1_ICPolarity, - u8 TIM1_ICSelection, - u8 TIM1_ICFilter) -{ - /* Disable the Channel 2: Reset the CCE Bit */ - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC2E); - - /* Select the Input and set the filter */ - TIM1->CCMR2 = (u8)((TIM1->CCMR2 & (u8)(~( TIM1_CCMR_CCxS | TIM1_CCMR_ICxF ))) | (u8)(( (TIM1_ICSelection)) | ((u8)( TIM1_ICFilter << 4)))); - /* Select the Polarity */ - if (TIM1_ICPolarity != TIM1_ICPOLARITY_RISING) - { - TIM1->CCER1 |= TIM1_CCER1_CC2P; - } - else - { - TIM1->CCER1 &= (u8)(~TIM1_CCER1_CC2P); - } - /* Set the CCE Bit */ - TIM1->CCER1 |= TIM1_CCER1_CC2E; -} - -/** - * @brief Configure the TI3 as Input. - * @param[in] TIM1_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * - TIM1_ICPOLARITY_FALLING - * - TIM1_ICPOLARITY_RISING - * @param[in] TIM1_ICSelection specifies the input to be used. - * This parameter can be one of the following values: - * - TIM1_ICSELECTION_DIRECTTI: TIM1 Input 3 is selected to - * be connected to IC3. - * - TIM1_ICSELECTION_INDIRECTTI: TIM1 Input 3 is selected to - * be connected to IC4. - * @param[in] TIM1_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TI3_Config(u8 TIM1_ICPolarity, - u8 TIM1_ICSelection, - u8 TIM1_ICFilter) -{ - /* Disable the Channel 3: Reset the CCE Bit */ - TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC3E); - - /* Select the Input and set the filter */ - TIM1->CCMR3 = (u8)((TIM1->CCMR3 & (u8)(~( TIM1_CCMR_CCxS | TIM1_CCMR_ICxF ))) | (u8)(( (TIM1_ICSelection)) | ((u8)( TIM1_ICFilter << 4)))); - - /* Select the Polarity */ - if (TIM1_ICPolarity != TIM1_ICPOLARITY_RISING) - { - TIM1->CCER2 |= TIM1_CCER2_CC3P; - } - else - { - TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC3P); - } - /* Set the CCE Bit */ - TIM1->CCER2 |= TIM1_CCER2_CC3E; -} - - -/** - * @brief Configure the TI4 as Input. - * @param[in] TIM1_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * - TIM1_ICPOLARITY_FALLING - * - TIM1_ICPOLARITY_RISING - * @param[in] TIM1_ICSelection specifies the input to be used. - * This parameter can be one of the following values: - * - TIM1_ICSELECTION_DIRECTTI: TIM1 Input 4 is selected to - * be connected to IC4. - * - TIM1_ICSELECTION_INDIRECTTI: TIM1 Input 4 is selected to - * be connected to IC3. - * @param[in] TIM1_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TI4_Config(u8 TIM1_ICPolarity, - u8 TIM1_ICSelection, - u8 TIM1_ICFilter) -{ - - /* Disable the Channel 4: Reset the CCE Bit */ - TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC4E); - - /* Select the Input and set the filter */ - TIM1->CCMR4 = (u8)((TIM1->CCMR4 & (u8)(~( TIM1_CCMR_CCxS | TIM1_CCMR_ICxF ))) | (u8)(( (TIM1_ICSelection)) | ((u8)( TIM1_ICFilter << 4)))); - - - - /* Select the Polarity */ - if (TIM1_ICPolarity != TIM1_ICPOLARITY_RISING) - { - TIM1->CCER2 |= TIM1_CCER2_CC4P; - } - else - { - TIM1->CCER2 &= (u8)(~TIM1_CCER2_CC4P); - } - - /* Set the CCE Bit */ - TIM1->CCER2 |= TIM1_CCER2_CC4E; -} - - /** * @} */ diff --git a/ports/stm8/stm8s-periphs/stm8s_uart2.c b/ports/stm8/stm8s-periphs/stm8s_uart2.c index 48a2a2d..c6dd75e 100644 --- a/ports/stm8/stm8s-periphs/stm8s_uart2.c +++ b/ports/stm8/stm8s-periphs/stm8s_uart2.c @@ -149,336 +149,7 @@ void UART2_Init(u32 BaudRate, UART2_WordLength_TypeDef WordLength, UART2_StopBit UART2->CR3 |= (u8)((u8)SyncMode & UART2_CR3_CKEN); } } -/** - * @brief Enable the UART2 peripheral. - * @par Full description: - * Enable the UART2 peripheral. - * @param[in] NewState new state of the UART2 Communication. - * This parameter can be: - * - ENABLE - * - DISABLE - * @retval None - */ -void UART2_Cmd(FunctionalState NewState) -{ - - if (NewState != DISABLE) - { - UART2->CR1 &= (u8)(~UART2_CR1_UARTD); /**< UART2 Enable */ - } - else - { - UART2->CR1 |= UART2_CR1_UARTD; /**< UART2 Disable (for low power consumption) */ - } -} - -/** - * @brief Enables or disables the specified UART2 interrupts. - * @par Full description: - * Enables or disables the specified UART2 interrupts. - * @param[in] UART2_IT specifies the UART2 interrupt sources to be enabled or disabled. - * This parameter can be one of the following values: - * - UART2_IT_LBDF: LIN Break detection interrupt - * - UART2_IT_LHDF: LIN Break detection interrupt - * - UART2_IT_TXE: Tansmit Data Register empty interrupt - * - UART2_IT_TC: Transmission complete interrupt - * - UART2_IT_RXNE_OR: Receive Data register not empty/Over run error interrupt - * - UART2_IT_IDLE: Idle line detection interrupt - * - UART2_IT_PE: Parity Error interrupt - * @param[in] NewState new state of the specified UART2 interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void UART2_ITConfig(UART2_IT_TypeDef UART2_IT, FunctionalState NewState) -{ - u8 uartreg, itpos = 0x00; - assert_param(IS_UART2_CONFIG_IT_OK(UART2_IT)); - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - /* Get the UART2 register index */ - uartreg = (u8)(UART2_IT >> 0x08); - - /* Get the UART2 IT index */ - itpos = (u8)((u8)1 << (u8)((u8)UART2_IT & (u8)0x0F)); - - if (NewState != DISABLE) - { - /**< Enable the Interrupt bits according to UART2_IT mask */ - if (uartreg == 0x01) - { - UART2->CR1 |= itpos; - } - else if (uartreg == 0x02) - { - UART2->CR2 |= itpos; - } - else if (uartreg == 0x03) - { - UART2->CR4 |= itpos; - } - else - { - UART2->CR6 |= itpos; - } - } - else - { - /**< Disable the interrupt bits according to UART2_IT mask */ - if (uartreg == 0x01) - { - UART2->CR1 &= (u8)(~itpos); - } - else if (uartreg == 0x02) - { - UART2->CR2 &= (u8)(~itpos); - } - else if (uartreg == 0x03) - { - UART2->CR4 &= (u8)(~itpos); - } - else - { - UART2->CR6 &= (u8)(~itpos); - } - } -} -/** - * @brief Configures the UART2’s IrDA interface. - * @par Full description: - * Configures the UART2’s IrDA interface. - * @par This function is valid only for UART2. - * @param[in] UART2_IrDAMode specifies the IrDA mode. - * This parameter can be any of the @ref UART2_IrDAMode_TypeDef values. - * @retval None - */ -void UART2_IrDAConfig(UART2_IrDAMode_TypeDef UART2_IrDAMode) -{ - assert_param(IS_UART2_IRDAMODE_OK(UART2_IrDAMode)); - - if (UART2_IrDAMode != UART2_IRDAMODE_NORMAL) - { - UART2->CR5 |= UART2_CR5_IRLP; - } - else - { - UART2->CR5 &= ((u8)~UART2_CR5_IRLP); - } -} - -/** - * @brief Enables or disables the UART2’s IrDA interface. - * @par Full description: - * Enables or disables the UART2’s IrDA interface. - * @par This function is related to IrDA mode. - * @param[in] NewState new state of the IrDA mode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void UART2_IrDACmd(FunctionalState NewState) -{ - - /* Check parameters */ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Enable the IrDA mode by setting the IREN bit in the CR3 register */ - UART2->CR5 |= UART2_CR5_IREN; - } - else - { - /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */ - UART2->CR5 &= ((u8)~UART2_CR5_IREN); - } -} - -/** - * @brief Sets the UART2 LIN Break detection length. - * @par Full description: - * Sets the UART2 LIN Break detection length. - * @param[in] UART2_LINBreakDetectionLength specifies the LIN break detection length. - * This parameter can be any of the @ref UART2_LINBreakDetectionLength_TypeDef values. - * @retval None - */ -void UART2_LINBreakDetectionConfig(UART2_LINBreakDetectionLength_TypeDef UART2_LINBreakDetectionLength) -{ - assert_param(IS_UART2_LINBREAKDETECTIONLENGTH_OK(UART2_LINBreakDetectionLength)); - - if (UART2_LINBreakDetectionLength != UART2_LINBREAKDETECTIONLENGTH_10BITS) - { - UART2->CR4 |= UART2_CR4_LBDL; - } - else - { - UART2->CR4 &= ((u8)~UART2_CR4_LBDL); - } -} - -/** - * @brief Configue the UART2 peripheral. - * @par Full description: - * Configue the UART2 peripheral. - * @param[in] UART2_Mode specifies the LIN mode. - * This parameter can be any of the @ref UART2_LinMode_TypeDef values. - * @param[in] UART2_Autosync specifies the LIN automatic resynchronization mode. - * This parameter can be any of the @ref UART2_LinAutosync_TypeDef values. - * @param[in] UART2_DivUp specifies the LIN divider update method. - * This parameter can be any of the @ref UART2_LinDivUp_TypeDef values. - * @retval None - */ -void UART2_LINConfig(UART2_LinMode_TypeDef UART2_Mode, UART2_LinAutosync_TypeDef UART2_Autosync, UART2_LinDivUp_TypeDef UART2_DivUp) -{ - assert_param(IS_UART2_SLAVE_OK(UART2_Mode)); - - assert_param(IS_UART2_AUTOSYNC_OK(UART2_Autosync)); - - assert_param(IS_UART2_DIVUP_OK(UART2_DivUp)); - - if (UART2_Mode != UART2_LIN_MODE_MASTER) - { - UART2->CR6 |= UART2_CR6_LSLV; - } - else - { - UART2->CR6 &= ((u8)~UART2_CR6_LSLV); - } - - if (UART2_Autosync != UART2_LIN_AUTOSYNC_DISABLE) - { - UART2->CR6 |= UART2_CR6_LASE ; - } - else - { - UART2->CR6 &= ((u8)~ UART2_CR6_LASE ); - } - - if (UART2_DivUp != UART2_LIN_DIVUP_LBRR1) - { - UART2->CR6 |= UART2_CR6_LDUM; - } - else - { - UART2->CR6 &= ((u8)~ UART2_CR6_LDUM); - } - -} - -/** - * @brief Enables or disables the UART2 LIN mode. - * @par Full description: - * Enables or disables the UART2’s LIN mode. - * @param[in] NewState is new state of the UART2 LIN mode. - * This parameter can be: - * - ENABLE - * - DISABLE - * @retval None - */ -void UART2_LINCmd(FunctionalState NewState) -{ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Enable the LIN mode by setting the LINE bit in the CR2 register */ - UART2->CR3 |= UART2_CR3_LINEN; - } - else - { - /* Disable the LIN mode by clearing the LINE bit in the CR2 register */ - UART2->CR3 &= ((u8)~UART2_CR3_LINEN); - } -} -/** - * @brief Enables or disables the UART2 Smart Card mode. - * @par Full description: - * Enables or disables the UART2 Smart Card mode. - * @par This function is related to SmartCard mode. - * @param[in] NewState: new state of the Smart Card mode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void UART2_SmartCardCmd(FunctionalState NewState) -{ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Enable the SC mode by setting the SCEN bit in the CR5 register */ - UART2->CR5 |= UART2_CR5_SCEN; - } - else - { - /* Disable the SC mode by clearing the SCEN bit in the CR5 register */ - UART2->CR5 &= ((u8)(~UART2_CR5_SCEN)); - } -} - -/** - * @brief Enables or disables NACK transmission. - * @par Full description: - * Enables or disables NACK transmission. - * @par This function is valid only for UART2 because is related to SmartCard mode. - * @param[in] NewState: new state of the Smart Card mode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void UART2_SmartCardNACKCmd(FunctionalState NewState) -{ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Enable the NACK transmission by setting the NACK bit in the CR5 register */ - UART2->CR5 |= UART2_CR5_NACK; - } - else - { - /* Disable the NACK transmission by clearing the NACK bit in the CR5 register */ - UART2->CR5 &= ((u8)~(UART2_CR5_NACK)); - } -} -/** - * @brief Selects the UART2 WakeUp method. - * @par Full description: - * Selects the UART2 WakeUp method. - * @param[in] UART2_WakeUp: specifies the UART2 wakeup method. - * This parameter can be any of the @ref UART2_WakeUp_TypeDef values. - * @retval None - */ -void UART2_WakeUpConfig(UART2_WakeUp_TypeDef UART2_WakeUp) -{ - assert_param(IS_UART2_WAKEUP_OK(UART2_WakeUp)); - - UART2->CR1 &= ((u8)~UART2_CR1_WAKE); - UART2->CR1 |= (u8)UART2_WakeUp; -} - -/** - * @brief Determines if the UART2 is in mute mode or not. - * @par Full description: - * Determines if the UART2 is in mute mode or not. - * @param[in] NewState: new state of the UART2 mode. - * This parameter can be: - * - ENABLE - * - DISABLE - * @retval None - */ -void UART2_ReceiverWakeUpCmd(FunctionalState NewState) -{ - assert_param(IS_FUNCTIONALSTATE_OK(NewState)); - - if (NewState != DISABLE) - { - /* Enable the mute mode UART2 by setting the RWU bit in the CR2 register */ - UART2->CR2 |= UART2_CR2_RWU; - } - else - { - /* Disable the mute mode UART2 by clearing the RWU bit in the CR1 register */ - UART2->CR2 &= ((u8)~UART2_CR2_RWU); - } -} - + /** * @brief Returns the most recent received data by the UART2 peripheral. @@ -493,20 +164,6 @@ u8 UART2_ReceiveData8(void) return ((u8)UART2->DR); } -/** - * @brief Returns the most recent received data by the UART2 peripheral. - * @par Full description: - * Returns the most recent received data by the UART2 peripheral. - * @retval u16 Received Data - * @par Required preconditions: - * UART2_Cmd(ENABLE); - */ -u16 UART2_ReceiveData9(void) -{ - return (u16)((((u16)UART2->DR) | ((u16)(((u16)((u16)UART2->CR1 & (u16)UART2_CR1_R8)) << 1))) & ((u16)0x01FF)); -} - - /** * @brief Transmits 8 bit data through the UART2 peripheral. @@ -522,96 +179,7 @@ void UART2_SendData8(u8 Data) /* Transmit Data */ UART2->DR = Data; } - -/** - * @brief Transmits 9 bit data through the UART2 peripheral. - * @par Full description: - * Transmits 9 bit data through the UART2 peripheral. - * @param[in] Data: the data to transmit. - * @retval None - * @par Required preconditions: - * UART2_Cmd(ENABLE); - */ -void UART2_SendData9(u16 Data) -{ - UART2->CR1 &= ((u8)~UART2_CR1_T8); /* Clear the transmit data bit 8 */ - UART2->CR1 |= (u8)(((u8)(Data >> 2)) & UART2_CR1_T8); /* Write the transmit data bit [8] */ - UART2->DR = (u8)(Data); /* Write the transmit data bit [0:7] */ - -} -/** - * @brief Transmits break characters. - * @par Full description: - * Transmits break characters on the UART2 peripheral. - * @retval None - */ -void UART2_SendBreak(void) -{ - UART2->CR2 |= UART2_CR2_SBK; -} -/** - * @brief Sets the address of the UART2 node. - * @par Full description: - * Sets the address of the UART2 node. - * @param[in] UART2_Address: Indicates the address of the UART2 node. - * @retval None - */ - -void UART2_SetAddress(u8 UART2_Address) -{ - /*assert_param for x UART2_Address*/ - assert_param(IS_UART2_ADDRESS_OK(UART2_Address)); - - /* Clear the UART2 address */ - UART2->CR4 &= ((u8)~UART2_CR4_ADD); - /* Set the UART2 address node */ - UART2->CR4 |= UART2_Address; -} -/** - * @brief Sets the specified UART2 guard time. - * @par Full description: - * Sets the address of the UART2 node. - * @par This function is related to SmartCard mode. - * @param[in] UART2_GuardTime: specifies the guard time. - * @retval None - * @par Required preconditions: - * SmartCard Mode Enabled - */ -void UART2_SetGuardTime(u8 UART2_GuardTime) -{ - /* Set the UART2 guard time */ - UART2->GTR = UART2_GuardTime; -} - -/** - * @brief Sets the system clock prescaler. - * @par Full description: - * Sets the system clock prescaler. - * @par This function is related to SmartCard and IrDa mode. - * @param[in] UART2_Prescaler: specifies the prescaler clock. - * This parameter can be one of the following values: - * @par IrDA Low Power Mode - * The clock source is diveded by the value given in the register (8 bits) - * - 0000 0000 Reserved - * - 0000 0001 divides the clock source by 1 - * - 0000 0010 divides the clock source by 2 - * - ........................................................... - * @par Smart Card Mode - * The clock source is diveded by the value given in the register (5 significant bits) multipied by 2 - * - 0 0000 Reserved - * - 0 0001 divides the clock source by 2 - * - 0 0010 divides the clock source by 4 - * - 0 0011 divides the clock source by 6 - * - ........................................................... - * @retval None - * @par Required preconditions: - * IrDA Low Power mode or smartcard mode enabled - */ -void UART2_SetPrescaler(u8 UART2_Prescaler) -{ - /* Load the UART2 prescaler value*/ - UART2->PSCR = UART2_Prescaler; -} + /** * @brief Checks whether the specified UART2 flag is set or not. @@ -685,211 +253,9 @@ FlagStatus UART2_GetFlagStatus(UART2_Flag_TypeDef UART2_FLAG) /* Return the UART2_FLAG status*/ return status; -} -/** - * @brief Clears the UART2 flags. - * @par Full description: - * Clears the UART2 flags. - * @param[in] UART2_FLAG specifies the flag to clear - * This parameter can be any combination of the following values: - * - UART2_FLAG_LBDF: LIN Break detection flag. - * - UART2_FLAG_LHDF: LIN Header detection flag. - * - UART2_FLAG_LSF: LIN synchrone field flag. - * - UART2_FLAG_RXNE: Receive data register not empty flag. - * @par Notes: - * - PE (Parity error), FE (Framing error), NE (Noise error), OR (OverRun error) - * and IDLE (Idle line detected) flags are cleared by software sequence: a read - * operation to UART2_SR register (UART2_GetFlagStatus())followed by a read operation - * to UART2_DR register(UART2_ReceiveData8() or UART2_ReceiveData9()). - * - RXNE flag can be also cleared by a read to the UART2_DR register - * (UART2_ReceiveData8()or UART2_ReceiveData9()). - * - TC flag can be also cleared by software sequence: a read operation to UART2_SR - * register (UART2_GetFlagStatus()) followed by a write operation to UART2_DR register - * (UART2_SendData8() or UART2_SendData9()). - * - TXE flag is cleared only by a write to the UART2_DR register (UART2_SendData8() or - * UART2_SendData9()). - * - SBK flag is cleared during the stop bit of break. - * @retval None - */ +} + -void UART2_ClearFlag(UART2_Flag_TypeDef UART2_FLAG) -{ - assert_param(IS_UART2_CLEAR_FLAG_OK(UART2_FLAG)); - - /*< Clear the Receive Register Not Empty flag */ - if (UART2_FLAG == UART2_FLAG_RXNE) - { - UART2->SR = (u8)~(UART2_SR_RXNE); - } - /*< Clear the LIN Break Detection flag */ - else if (UART2_FLAG == UART2_FLAG_LBDF) - { - UART2->CR4 &= (u8)(~UART2_CR4_LBDF); - } - /*< Clear the LIN Header Detection Flag */ - else if (UART2_FLAG == UART2_FLAG_LHDF) - { - UART2->CR6 &= (u8)(~UART2_CR6_LHDF); - } - /*< Clear the LIN Synch Field flag */ - else - { - UART2->CR6 &= (u8)(~UART2_CR6_LSF); - } - -} - -/** - * @brief Checks whether the specified UART2 interrupt has occurred or not. - * @par Full description: - * Checks whether the specified UART2 interrupt has occurred or not. - * @param[in] UART2_IT: Specifies the UART2 interrupt pending bit to check. - * This parameter can be one of the following values: - * - UART2_IT_LBDF: LIN Break detection interrupt - * - UART2_IT_TXE: Tansmit Data Register empty interrupt - * - UART2_IT_TC: Transmission complete interrupt - * - UART2_IT_RXNE: Receive Data register not empty interrupt - * - UART2_IT_IDLE: Idle line detection interrupt - * - UART2_IT_OR: OverRun Error interrupt - * - UART2_IT_PE: Parity Error interrupt - * @retval - * ITStatus The new state of UART2_IT (SET or RESET). - */ -ITStatus UART2_GetITStatus(UART2_IT_TypeDef UART2_IT) -{ - ITStatus pendingbitstatus = RESET; - u8 itpos = 0; - u8 itmask1 = 0; - u8 itmask2 = 0; - u8 enablestatus = 0; - - /* Check parameters */ - assert_param(IS_UART2_GET_IT_OK(UART2_IT)); - - /* Get the UART2 IT index*/ - itpos = (u8)((u8)1 << (u8)((u8)UART2_IT & (u8)0x0F)); - /* Get the UART2 IT index*/ - itmask1 = (u8)((u8)UART2_IT >> (u8)4); - /* Set the IT mask*/ - itmask2 = (u8)((u8)1 << itmask1); - - - - /* Check the status of the specified UART2 pending bit*/ - if (UART2_IT == UART2_IT_PE) - { - /* Get the UART2_ITPENDINGBIT enable bit status*/ - enablestatus = (u8)((u8)UART2->CR1 & itmask2); - /* Check the status of the specified UART2 interrupt*/ - - if (((UART2->SR & itpos) != (u8)0x00) && enablestatus) - { - /* Interrupt occurred*/ - pendingbitstatus = SET; - } - else - { - /* Interrupt not occurred*/ - pendingbitstatus = RESET; - } - } - - else if (UART2_IT == UART2_IT_LBDF) - { - /* Get the UART2_IT enable bit status*/ - enablestatus = (u8)((u8)UART2->CR4 & itmask2); - /* Check the status of the specified UART2 interrupt*/ - if (((UART2->CR4 & itpos) != (u8)0x00) && enablestatus) - { - /* Interrupt occurred*/ - pendingbitstatus = SET; - } - else - { - /* Interrupt not occurred*/ - pendingbitstatus = RESET; - } - } - else if (UART2_IT == UART2_IT_LHDF) - { - /* Get the UART2_IT enable bit status*/ - enablestatus = (u8)((u8)UART2->CR6 & itmask2); - /* Check the status of the specified UART2 interrupt*/ - if (((UART2->CR6 & itpos) != (u8)0x00) && enablestatus) - { - /* Interrupt occurred*/ - pendingbitstatus = SET; - } - else - { - /* Interrupt not occurred*/ - pendingbitstatus = RESET; - } - } - else - { - /* Get the UART2_IT enable bit status*/ - enablestatus = (u8)((u8)UART2->CR2 & itmask2); - /* Check the status of the specified UART2 interrupt*/ - if (((UART2->SR & itpos) != (u8)0x00) && enablestatus) - { - /* Interrupt occurred*/ - pendingbitstatus = SET; - } - else - { - /* Interrupt not occurred*/ - pendingbitstatus = RESET; - } - } - /* Return the UART2_IT status*/ - return pendingbitstatus; -} - -/** - * @brief Clears the UART2 pending flags. - * @par Full description: - * Clears the UART2 pending bit. - * @param[in] UART2_IT specifies the pending bit to clear - * This parameter can be one of the following values: - * - UART2_IT_LBDF: LIN Break detection interrupt - * - UART2_IT_LHDF: LIN Header detection interrupt - * - UART2_IT_RXNE: Receive Data register not empty interrupt. - * - * @par Notes: - * - PE (Parity error), FE (Framing error), NE (Noise error), OR (OverRun error) and - * IDLE (Idle line detected) pending bits are cleared by software sequence: a read - * operation to UART2_SR register (UART2_GetITStatus()) followed by a read operation - * to UART2_DR register (UART2_ReceiveData8() or UART2_ReceiveData9() ). - * - RXNE pending bit can be also cleared by a read to the UART2_DR register - * (UART2_ReceiveData8() or UART2_ReceiveData9() ). - * - TC (Transmit complet) pending bit can be cleared by software sequence: a read - * operation to UART2_SR register (UART2_GetITStatus()) followed by a write operation - * to UART2_DR register (UART2_SendData8()or UART2_SendData9()). - * - TXE pending bit is cleared only by a write to the UART2_DR register - * (UART2_SendData8() or UART2_SendData9()). - * @retval None - */ -void UART2_ClearITPendingBit(UART2_IT_TypeDef UART2_IT) -{ - assert_param(IS_UART2_CLEAR_IT_OK(UART2_IT)); - - /*< Clear the Receive Register Not Empty pending bit */ - if (UART2_IT == UART2_IT_RXNE) - { - UART2->SR = (u8)~(UART2_SR_RXNE); - } - /*< Clear the LIN Break Detection pending bit */ - else if (UART2_IT == UART2_IT_LBDF) - { - UART2->CR4 &= (u8)~(UART2_CR4_LBDF); - } - /*< Clear the LIN Header Detection pending bit */ - else - { - UART2->CR6 &= (u8)(~UART2_CR6_LHDF); - } -} /** * @} */