diff --git a/kernel/atom-types.h b/kernel/atom-types.h new file mode 100755 index 0000000..898e2ca --- /dev/null +++ b/kernel/atom-types.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2011, Himanshu Chauhan. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. No personal names or organizations' names associated with the + * Atomthreads project may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE ATOMTHREADS PROJECT AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __ATOM_TYPES_H +#define __ATOM_TYPES_H + +#include + +#define NULL ((void *)(0)) + +#endif /* __ATOM_TYPES_H */ diff --git a/kernel/atomkernel.c b/kernel/atomkernel.c index 97daac4..6952576 100755 --- a/kernel/atomkernel.c +++ b/kernel/atomkernel.c @@ -143,8 +143,12 @@ * */ - +#ifndef STAND_ALONE #include +#else +#include +#endif + #include "atom.h" diff --git a/kernel/atommutex.c b/kernel/atommutex.c index cbb6371..fdb4fff 100755 --- a/kernel/atommutex.c +++ b/kernel/atommutex.c @@ -100,8 +100,12 @@ * */ - +#ifndef STAND_ALONE #include +#else +#include +#endif + #include "atom.h" #include "atommutex.h" #include "atomtimer.h" diff --git a/kernel/atomqueue.c b/kernel/atomqueue.c index 78599f5..70a65aa 100755 --- a/kernel/atomqueue.c +++ b/kernel/atomqueue.c @@ -90,8 +90,12 @@ * */ - +#ifndef STAND_ALONE #include +#else +#include +#endif + #include #include "atom.h" diff --git a/kernel/atomsem.c b/kernel/atomsem.c index 6c5d32d..d78bccc 100755 --- a/kernel/atomsem.c +++ b/kernel/atomsem.c @@ -87,8 +87,14 @@ * */ - +#ifndef STAND_ALONE #include +#endif + +#ifdef STAND_ALONE +#include +#endif + #include "atom.h" #include "atomsem.h" #include "atomtimer.h" diff --git a/kernel/atomtimer.c b/kernel/atomtimer.c index 5376fcb..136bf59 100755 --- a/kernel/atomtimer.c +++ b/kernel/atomtimer.c @@ -66,8 +66,12 @@ * */ - +#ifndef STAND_ALONE #include +#else +#include +#endif + #include "atom.h" diff --git a/ports/mips/8250-serial.c b/ports/mips/8250-serial.c new file mode 100644 index 0000000..a7a3f59 --- /dev/null +++ b/ports/mips/8250-serial.c @@ -0,0 +1,80 @@ +/* + * Copyright (c) Himanshu Chauhan 2009-11. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of Himanshu Chauhan nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include <8250-serial.h> + +#define PORT1 (void *)0x140003f8 +#define PORT2 (void *)0x140002F8 +#define PORT3 (void *)0x140003E8 +#define PORT4 (void *)0x140002E8 + +static inline unsigned int serial_in(int offset) +{ + return ioreadb(PORT1 + offset); +} + +static inline void serial_out(int offset, int value) +{ + iowriteb(PORT1 + offset, value); +} + +int putch(uint8_t c) +{ + while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0) + ; + + serial_out(UART_TX, c); + + return 1; +} + +void init_console() +{ + serial_out(1 , 0); /* Turn off interrupts */ + + /* Communication Settings */ + serial_out(3 , 0x80); /* SET DLAB ON */ + serial_out(0 , 0x01); /* Set Baud rate - Divisor Latch Low Byte */ + /* 0x03 = 38,400 BPS */ + /* Default 0x01 = 115,200 BPS */ + /* 0x02 = 57,600 BPS */ + /* 0x06 = 19,200 BPS */ + /* 0x0C = 9,600 BPS */ + /* 0x18 = 4,800 BPS */ + /* 0x30 = 2,400 BPS */ + serial_out(1 , 0x00); /* Set Baud rate - Divisor Latch High Byte */ + serial_out(3 , 0x03); /* 8 Bits, No Parity, 1 Stop Bit */ + serial_out(2 , 0xC7); /* FIFO Control Register */ + serial_out(4 , 0x0B); /* Turn on DTR, RTS, and OUT2 */ +} diff --git a/ports/mips/8250-serial.h b/ports/mips/8250-serial.h new file mode 100644 index 0000000..c7907a1 --- /dev/null +++ b/ports/mips/8250-serial.h @@ -0,0 +1,346 @@ +/* + * Copyright (c) Himanshu Chauhan 2009-11. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of Himanshu Chauhan nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _8250_SERIAL_H +#define _8250_SERIAL_H + +/* + * DLAB=0 + */ +#define UART_RX 0 /* In: Receive buffer */ +#define UART_TX 0 /* Out: Transmit buffer */ + +#define UART_IER 1 /* Out: Interrupt Enable Register */ +#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ +#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ +#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ +#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ +/* + * Sleep mode for ST16650 and TI16750. For the ST16650, EFR[4]=1 + */ +#define UART_IERX_SLEEP 0x10 /* Enable sleep mode */ + +#define UART_IIR 2 /* In: Interrupt ID Register */ +#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ +#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ +#define UART_IIR_MSI 0x00 /* Modem status interrupt */ +#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ +#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ +#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ + +#define UART_IIR_BUSY 0x07 /* DesignWare APB Busy Detect */ + +#define UART_FCR 2 /* Out: FIFO Control Register */ +#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */ +#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ +#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ +#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ +/* + * Note: The FIFO trigger levels are chip specific: + * RX:76 = 00 01 10 11 TX:54 = 00 01 10 11 + * PC16550D: 1 4 8 14 xx xx xx xx + * TI16C550A: 1 4 8 14 xx xx xx xx + * TI16C550C: 1 4 8 14 xx xx xx xx + * ST16C550: 1 4 8 14 xx xx xx xx + * ST16C650: 8 16 24 28 16 8 24 30 PORT_16650V2 + * NS16C552: 1 4 8 14 xx xx xx xx + * ST16C654: 8 16 56 60 8 16 32 56 PORT_16654 + * TI16C750: 1 16 32 56 xx xx xx xx PORT_16750 + * TI16C752: 8 16 56 60 8 16 32 56 + */ +#define UART_FCR_R_TRIG_00 0x00 +#define UART_FCR_R_TRIG_01 0x40 +#define UART_FCR_R_TRIG_10 0x80 +#define UART_FCR_R_TRIG_11 0xc0 +#define UART_FCR_T_TRIG_00 0x00 +#define UART_FCR_T_TRIG_01 0x10 +#define UART_FCR_T_TRIG_10 0x20 +#define UART_FCR_T_TRIG_11 0x30 + +#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ +#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ +#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ +#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ +#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ +/* 16650 definitions */ +#define UART_FCR6_R_TRIGGER_8 0x00 /* Mask for receive trigger set at 1 */ +#define UART_FCR6_R_TRIGGER_16 0x40 /* Mask for receive trigger set at 4 */ +#define UART_FCR6_R_TRIGGER_24 0x80 /* Mask for receive trigger set at 8 */ +#define UART_FCR6_R_TRIGGER_28 0xC0 /* Mask for receive trigger set at 14 */ +#define UART_FCR6_T_TRIGGER_16 0x00 /* Mask for transmit trigger set at 16 */ +#define UART_FCR6_T_TRIGGER_8 0x10 /* Mask for transmit trigger set at 8 */ +#define UART_FCR6_T_TRIGGER_24 0x20 /* Mask for transmit trigger set at 24 */ +#define UART_FCR6_T_TRIGGER_30 0x30 /* Mask for transmit trigger set at 30 */ +#define UART_FCR7_64BYTE 0x20 /* Go into 64 byte mode (TI16C750) */ + +#define UART_LCR 3 /* Out: Line Control Register */ +/* + * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting + * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits. + */ +#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ +#define UART_LCR_SBC 0x40 /* Set break control */ +#define UART_LCR_SPAR 0x20 /* Stick parity (?) */ +#define UART_LCR_EPAR 0x10 /* Even parity select */ +#define UART_LCR_PARITY 0x08 /* Parity Enable */ +#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 bit, 1=2 bits */ +#define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */ +#define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */ +#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */ +#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ + +#define UART_MCR 4 /* Out: Modem Control Register */ +#define UART_MCR_CLKSEL 0x80 /* Divide clock by 4 (TI16C752, EFR[4]=1) */ +#define UART_MCR_TCRTLR 0x40 /* Access TCR/TLR (TI16C752, EFR[4]=1) */ +#define UART_MCR_XONANY 0x20 /* Enable Xon Any (TI16C752, EFR[4]=1) */ +#define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS (TI16C550C/TI16C750) */ +#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ +#define UART_MCR_OUT2 0x08 /* Out2 complement */ +#define UART_MCR_OUT1 0x04 /* Out1 complement */ +#define UART_MCR_RTS 0x02 /* RTS complement */ +#define UART_MCR_DTR 0x01 /* DTR complement */ + +#define UART_LSR 5 /* In: Line Status Register */ +#define UART_LSR_TEMT 0x40 /* Transmitter empty */ +#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ +#define UART_LSR_BI 0x10 /* Break interrupt indicator */ +#define UART_LSR_FE 0x08 /* Frame error indicator */ +#define UART_LSR_PE 0x04 /* Parity error indicator */ +#define UART_LSR_OE 0x02 /* Overrun error indicator */ +#define UART_LSR_DR 0x01 /* Receiver data ready */ +#define UART_LSR_BRK_ERROR_BITS 0x1E /* BI, FE, PE, OE bits */ + +#define UART_MSR 6 /* In: Modem Status Register */ +#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ +#define UART_MSR_RI 0x40 /* Ring Indicator */ +#define UART_MSR_DSR 0x20 /* Data Set Ready */ +#define UART_MSR_CTS 0x10 /* Clear to Send */ +#define UART_MSR_DDCD 0x08 /* Delta DCD */ +#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ +#define UART_MSR_DDSR 0x02 /* Delta DSR */ +#define UART_MSR_DCTS 0x01 /* Delta CTS */ +#define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */ + +#define UART_SCR 7 /* I/O: Scratch Register */ + +/* + * DLAB=1 + */ +#define UART_DLL 0 /* Out: Divisor Latch Low */ +#define UART_DLM 1 /* Out: Divisor Latch High */ + +/* + * LCR=0xBF (or DLAB=1 for 16C660) + */ +#define UART_EFR 2 /* I/O: Extended Features Register */ +#define UART_EFR_CTS 0x80 /* CTS flow control */ +#define UART_EFR_RTS 0x40 /* RTS flow control */ +#define UART_EFR_SCD 0x20 /* Special character detect */ +#define UART_EFR_ECB 0x10 /* Enhanced control bit */ +/* + * the low four bits control software flow control + */ + +/* + * LCR=0xBF, TI16C752, ST16650, ST16650A, ST16654 + */ +#define UART_XON1 4 /* I/O: Xon character 1 */ +#define UART_XON2 5 /* I/O: Xon character 2 */ +#define UART_XOFF1 6 /* I/O: Xoff character 1 */ +#define UART_XOFF2 7 /* I/O: Xoff character 2 */ + +/* + * EFR[4]=1 MCR[6]=1, TI16C752 + */ +#define UART_TI752_TCR 6 /* I/O: transmission control register */ +#define UART_TI752_TLR 7 /* I/O: trigger level register */ + +/* + * LCR=0xBF, XR16C85x + */ +#define UART_TRG 0 /* FCTR bit 7 selects Rx or Tx + * In: Fifo count + * Out: Fifo custom trigger levels */ +/* + * These are the definitions for the Programmable Trigger Register + */ +#define UART_TRG_1 0x01 +#define UART_TRG_4 0x04 +#define UART_TRG_8 0x08 +#define UART_TRG_16 0x10 +#define UART_TRG_32 0x20 +#define UART_TRG_64 0x40 +#define UART_TRG_96 0x60 +#define UART_TRG_120 0x78 +#define UART_TRG_128 0x80 + +#define UART_FCTR 1 /* Feature Control Register */ +#define UART_FCTR_RTS_NODELAY 0x00 /* RTS flow control delay */ +#define UART_FCTR_RTS_4DELAY 0x01 +#define UART_FCTR_RTS_6DELAY 0x02 +#define UART_FCTR_RTS_8DELAY 0x03 +#define UART_FCTR_IRDA 0x04 /* IrDa data encode select */ +#define UART_FCTR_TX_INT 0x08 /* Tx interrupt type select */ +#define UART_FCTR_TRGA 0x00 /* Tx/Rx 550 trigger table select */ +#define UART_FCTR_TRGB 0x10 /* Tx/Rx 650 trigger table select */ +#define UART_FCTR_TRGC 0x20 /* Tx/Rx 654 trigger table select */ +#define UART_FCTR_TRGD 0x30 /* Tx/Rx 850 programmable trigger select */ +#define UART_FCTR_SCR_SWAP 0x40 /* Scratch pad register swap */ +#define UART_FCTR_RX 0x00 /* Programmable trigger mode select */ +#define UART_FCTR_TX 0x80 /* Programmable trigger mode select */ + +/* + * LCR=0xBF, FCTR[6]=1 + */ +#define UART_EMSR 7 /* Extended Mode Select Register */ +#define UART_EMSR_FIFO_COUNT 0x01 /* Rx/Tx select */ +#define UART_EMSR_ALT_COUNT 0x02 /* Alternating count select */ + +/* + * The Intel XScale on-chip UARTs define these bits + */ +#define UART_IER_DMAE 0x80 /* DMA Requests Enable */ +#define UART_IER_UUE 0x40 /* UART Unit Enable */ +#define UART_IER_NRZE 0x20 /* NRZ coding Enable */ +#define UART_IER_RTOIE 0x10 /* Receiver Time Out Interrupt Enable */ + +#define UART_IIR_TOD 0x08 /* Character Timeout Indication Detected */ + +#define UART_FCR_PXAR1 0x00 /* receive FIFO threshold = 1 */ +#define UART_FCR_PXAR8 0x40 /* receive FIFO threshold = 8 */ +#define UART_FCR_PXAR16 0x80 /* receive FIFO threshold = 16 */ +#define UART_FCR_PXAR32 0xc0 /* receive FIFO threshold = 32 */ + + + + +/* + * These register definitions are for the 16C950 + */ +#define UART_ASR 0x01 /* Additional Status Register */ +#define UART_RFL 0x03 /* Receiver FIFO level */ +#define UART_TFL 0x04 /* Transmitter FIFO level */ +#define UART_ICR 0x05 /* Index Control Register */ + +/* The 16950 ICR registers */ +#define UART_ACR 0x00 /* Additional Control Register */ +#define UART_CPR 0x01 /* Clock Prescalar Register */ +#define UART_TCR 0x02 /* Times Clock Register */ +#define UART_CKS 0x03 /* Clock Select Register */ +#define UART_TTL 0x04 /* Transmitter Interrupt Trigger Level */ +#define UART_RTL 0x05 /* Receiver Interrupt Trigger Level */ +#define UART_FCL 0x06 /* Flow Control Level Lower */ +#define UART_FCH 0x07 /* Flow Control Level Higher */ +#define UART_ID1 0x08 /* ID #1 */ +#define UART_ID2 0x09 /* ID #2 */ +#define UART_ID3 0x0A /* ID #3 */ +#define UART_REV 0x0B /* Revision */ +#define UART_CSR 0x0C /* Channel Software Reset */ +#define UART_NMR 0x0D /* Nine-bit Mode Register */ +#define UART_CTR 0xFF + +/* + * The 16C950 Additional Control Register + */ +#define UART_ACR_RXDIS 0x01 /* Receiver disable */ +#define UART_ACR_TXDIS 0x02 /* Transmitter disable */ +#define UART_ACR_DSRFC 0x04 /* DSR Flow Control */ +#define UART_ACR_TLENB 0x20 /* 950 trigger levels enable */ +#define UART_ACR_ICRRD 0x40 /* ICR Read enable */ +#define UART_ACR_ASREN 0x80 /* Additional status enable */ + + + +/* + * These definitions are for the RSA-DV II/S card, from + * + * Kiyokazu SUTO + */ + +#define UART_RSA_BASE (-8) + +#define UART_RSA_MSR ((UART_RSA_BASE) + 0) /* I/O: Mode Select Register */ + +#define UART_RSA_MSR_SWAP (1 << 0) /* Swap low/high 8 bytes in I/O port addr */ +#define UART_RSA_MSR_FIFO (1 << 2) /* Enable the external FIFO */ +#define UART_RSA_MSR_FLOW (1 << 3) /* Enable the auto RTS/CTS flow control */ +#define UART_RSA_MSR_ITYP (1 << 4) /* Level (1) / Edge triger (0) */ + +#define UART_RSA_IER ((UART_RSA_BASE) + 1) /* I/O: Interrupt Enable Register */ + +#define UART_RSA_IER_Rx_FIFO_H (1 << 0) /* Enable Rx FIFO half full int. */ +#define UART_RSA_IER_Tx_FIFO_H (1 << 1) /* Enable Tx FIFO half full int. */ +#define UART_RSA_IER_Tx_FIFO_E (1 << 2) /* Enable Tx FIFO empty int. */ +#define UART_RSA_IER_Rx_TOUT (1 << 3) /* Enable char receive timeout int */ +#define UART_RSA_IER_TIMER (1 << 4) /* Enable timer interrupt */ + +#define UART_RSA_SRR ((UART_RSA_BASE) + 2) /* IN: Status Read Register */ + +#define UART_RSA_SRR_Tx_FIFO_NEMP (1 << 0) /* Tx FIFO is not empty (1) */ +#define UART_RSA_SRR_Tx_FIFO_NHFL (1 << 1) /* Tx FIFO is not half full (1) */ +#define UART_RSA_SRR_Tx_FIFO_NFUL (1 << 2) /* Tx FIFO is not full (1) */ +#define UART_RSA_SRR_Rx_FIFO_NEMP (1 << 3) /* Rx FIFO is not empty (1) */ +#define UART_RSA_SRR_Rx_FIFO_NHFL (1 << 4) /* Rx FIFO is not half full (1) */ +#define UART_RSA_SRR_Rx_FIFO_NFUL (1 << 5) /* Rx FIFO is not full (1) */ +#define UART_RSA_SRR_Rx_TOUT (1 << 6) /* Character reception timeout occurred (1) */ +#define UART_RSA_SRR_TIMER (1 << 7) /* Timer interrupt occurred */ + +#define UART_RSA_FRR ((UART_RSA_BASE) + 2) /* OUT: FIFO Reset Register */ + +#define UART_RSA_TIVSR ((UART_RSA_BASE) + 3) /* I/O: Timer Interval Value Set Register */ + +#define UART_RSA_TCR ((UART_RSA_BASE) + 4) /* OUT: Timer Control Register */ + +#define UART_RSA_TCR_SWITCH (1 << 0) /* Timer on */ + +/* + * The RSA DSV/II board has two fixed clock frequencies. One is the + * standard rate, and the other is 8 times faster. + */ +#define SERIAL_RSA_BAUD_BASE (921600) +#define SERIAL_RSA_BAUD_BASE_LO (SERIAL_RSA_BAUD_BASE / 8) + +/* + * Extra serial register definitions for the internal UARTs + * in TI OMAP processors. + */ +#define UART_OMAP_MDR1 0x08 /* Mode definition register */ +#define UART_OMAP_MDR2 0x09 /* Mode definition register 2 */ +#define UART_OMAP_SCR 0x10 /* Supplementary control register */ +#define UART_OMAP_SSR 0x11 /* Supplementary status register */ +#define UART_OMAP_EBLR 0x12 /* BOF length register */ +#define UART_OMAP_OSC_12M_SEL 0x13 /* OMAP1510 12MHz osc select */ +#define UART_OMAP_MVER 0x14 /* Module version register */ +#define UART_OMAP_SYSC 0x15 /* System configuration register */ +#define UART_OMAP_SYSS 0x16 /* System status register */ +#define UART_OMAP_WER 0x17 /* Wake-up enable register */ + +#endif /* _8250_SERIAL_H */ + diff --git a/ports/mips/Makefile b/ports/mips/Makefile index 016c290..dc90cdf 100644 --- a/ports/mips/Makefile +++ b/ports/mips/Makefile @@ -14,6 +14,24 @@ TESTS_DIR=../../tests CC=mips-linux-gnu-gcc OBJCOPY=mips-linux-gnu-objcopy +# Check if verbosity is ON for build process +VERBOSE_DEFAULT := 0 +CMD_PREFIX_DEFAULT := @ +ifdef VERBOSE + ifeq ("$(origin VERBOSE)", "command line") + VB := $(VERBOSE) + else + VB := $(VERBOSE_DEFAULT) + endif +else + VB := $(VERBOSE_DEFAULT) +endif +ifeq ($(VB), 1) + V := +else + V := $(CMD_PREFIX_DEFAULT) +endif + # Enable stack-checking. WARNING: the full automated test suite currently # requires a little over 1KB RAM with stack-checking enabled. If you are # using a device with 1KB internal SRAM and no external SRAM then you @@ -24,14 +42,15 @@ OBJCOPY=mips-linux-gnu-objcopy BUILD_DIR=build # Port/application object files -APP_OBJECTS = atomport.o test-main.o -APP_ASM_OBJECTS = atomport-asm.o atomport-entry.o +APP_OBJECTS = atomport.o tests-main.o 8250-serial.o printk.o string.o vsprintf.o io.o + +APP_ASM_OBJECTS = atomport-entry.o atomport-asm.o # Kernel object files KERNEL_OBJECTS = atomkernel.o atomsem.o atommutex.o atomtimer.o atomqueue.o # Collection of built objects (excluding test applications) -ALL_OBJECTS = $(APP_OBJECTS) $(APP_ASM_OBJECTS) $(KERNEL_OBJECTS) +ALL_OBJECTS = $(APP_ASM_OBJECTS) $(APP_OBJECTS) $(KERNEL_OBJECTS) BUILT_OBJECTS = $(patsubst %,$(BUILD_DIR)/%,$(ALL_OBJECTS)) # Test object files (dealt with separately as only one per application build) @@ -47,14 +66,23 @@ vpath %.elf ./$(BUILD_DIR) vpath %.hex ./$(BUILD_DIR) # GCC flags -CFLAGS=-g -Wall -Werror +CFLAGS= -g \ + -Wall \ + -Werror \ + -O \ + -fstrength-reduce \ + -fomit-frame-pointer \ + -finline-functions \ + -nostdinc \ + -fno-builtin \ + -fno-stack-protector \ + -DSTAND_ALONE # Enable stack-checking (disable if not required) ifeq ($(STACK_CHECK),true) CFLAGS += -DATOM_STACK_CHECKING endif - ################# # Build targets # ################# @@ -68,36 +96,42 @@ $(BUILD_DIR): # Test HEX files (one application build for each test) $(TEST_HEXS): %.hex: %.elf - @echo Building $@ - $(OBJCOPY) -j .text -j .data -O ihex $(BUILD_DIR)/$< $(BUILD_DIR)/$@ + $(if $(V), @echo " (HEX) $(subst $(build_dir)/,,$@)") + $(V)$(OBJCOPY) -j .text -j .data -O ihex $(BUILD_DIR)/$< $(BUILD_DIR)/$@ # Test ELF files (one application build for each test) -$(TEST_ELFS): %.elf: %.o $(KERNEL_OBJECTS) $(APP_OBJECTS) $(APP_ASM_OBJECTS) - $(CC) $(CFLAGS) $(BUILD_DIR)/$(notdir $<) $(BUILT_OBJECTS) --output $(BUILD_DIR)/$@ -Wl,-Map,$(BUILD_DIR)/$(basename $@).map +$(TEST_ELFS): %.elf: %.o $(APP_ASM_OBJECTS) $(KERNEL_OBJECTS) $(APP_OBJECTS) + $(if $(V), @echo " (ELF) $(subst $(build_dir)/,,$@)") + $(V)$(CC) $(CFLAGS) -nostdlib -nodefaultlibs $(BUILD_DIR)/$(notdir $<) $(BUILT_OBJECTS) --output $(BUILD_DIR)/$@ -Wl -T linker.ld # Kernel objects builder $(KERNEL_OBJECTS): %.o: $(KERNEL_DIR)/%.c - $(CC) -c $(CFLAGS) -I. $< -o $(BUILD_DIR)/$(notdir $@) + $(if $(V), @echo " (CC) $(subst $(build_dir)/,,$@)") + $(V)$(CC) -c $(CFLAGS) -I. -I$(KERNEL_DIR) $< -o $(BUILD_DIR)/$(notdir $@) # Test objects builder $(TEST_OBJECTS): %.o: $(TESTS_DIR)/%.c - $(CC) -c $(CFLAGS) -I. -I$(KERNEL_DIR) $< -o $(BUILD_DIR)/$(notdir $@) + $(if $(V), @echo " (CC) $(subst $(build_dir)/,,$@)") + $(V)$(CC) -c $(CFLAGS) -I. -I$(KERNEL_DIR) $< -o $(BUILD_DIR)/$(notdir $@) # Application C objects builder $(APP_OBJECTS): %.o: ./%.c - $(CC) -c $(CFLAGS) -I. -I$(KERNEL_DIR) -I$(TESTS_DIR) $< -o $(BUILD_DIR)/$(notdir $@) + $(if $(V), @echo " (CC) $(subst $(build_dir)/,,$@)") + $(V)$(CC) -c $(CFLAGS) -I. -I$(KERNEL_DIR) -I$(TESTS_DIR) $< -o $(BUILD_DIR)/$(notdir $@) # Application asm objects builder $(APP_ASM_OBJECTS): %.o: ./%.s - $(CC) -c $(CFLAGS) -x assembler-with-cpp -I. -I$(KERNEL_DIR) $< -o $(BUILD_DIR)/$(notdir $@) + $(if $(V), @echo " (AS) $(subst $(build_dir)/,,$@)") + $(V)$(CC) -c $(CFLAGS) -D__ASSEMBLY__ -x assembler-with-cpp -I. -I$(KERNEL_DIR) $< -o $(BUILD_DIR)/$(notdir $@) # .lst file builder %.lst: %.c - $(CC) $(CFLAGS) -I. -I$(KERNEL_DIR) -I$(TESTS_DIR) -Wa,-al $< > $@ + $(if $(V), @echo " (LST) $(subst $(build_dir)/,,$@)") + $(V)$(CC) $(CFLAGS) -I. -I$(KERNEL_DIR) -I$(TESTS_DIR) -Wa,-al $< > $@ # Clean clean: - rm -f *.o *.elf *.map *.hex *.bin *.lst + $(V)rm -f *.o *.elf *.map *.hex *.bin *.lst rm -rf doxygen-kernel rm -rf doxygen-avr rm -rf build diff --git a/ports/mips/atomport-asm-macros.h b/ports/mips/atomport-asm-macros.h new file mode 100644 index 0000000..c71f1e1 --- /dev/null +++ b/ports/mips/atomport-asm-macros.h @@ -0,0 +1,285 @@ +#ifndef __ATOMPORT_ASM_MACROS_H_ +#define __ATOMPORT_ASM_MACROS_H_ + +#include + +#ifdef __ASSEMBLY__ /* to be called only from assembly */ + +#define LEAF(fn) \ + .globl fn; \ + .ent fn; \ +fn: + +#define END(fn) \ + .size fn,.-fn; \ + .end fn + +#define tlbp_write_hazard \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; + +#define tlbp_read_hazard \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; + +#define tlbw_write_hazard \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; \ + nop; + +#define enable_global_interrupts ei $0 +#define disable_global_interrupts di $0 + +#define EXCEPTION_VECTOR(_name, _offset, _where)\ + . = _offset; \ + .set noreorder; \ +_name: \ + b _where; \ + nop; + +#define SAVE_REG(reg, treg) \ + sw reg, ((reg ## _IDX) * 4)(treg) + +#define LOAD_REG(reg, treg) \ + lw reg, ((reg ## _IDX) * 4)(treg) + +#define SAVE_INT_CONTEXT(_int_sp) \ + move k0, sp; \ + la sp, _int_sp; \ + addiu sp, sp, -((CPU_USER_REG_COUNT + 1)* 4); \ + mfc0 k1, CP0_EPC; \ + SAVE_REG(v0,sp); \ + SAVE_REG(v1,sp); \ + SAVE_REG(a0,sp); \ + SAVE_REG(a1,sp); \ + SAVE_REG(a2,sp); \ + SAVE_REG(a3,sp); \ + SAVE_REG(t0,sp); \ + SAVE_REG(t1,sp); \ + SAVE_REG(t2,sp); \ + SAVE_REG(t3,sp); \ + SAVE_REG(t4,sp); \ + SAVE_REG(t5,sp); \ + SAVE_REG(t6,sp); \ + SAVE_REG(t7,sp); \ + SAVE_REG(s0,sp); \ + SAVE_REG(s1,sp); \ + SAVE_REG(s2,sp); \ + SAVE_REG(s3,sp); \ + SAVE_REG(s4,sp); \ + SAVE_REG(s5,sp); \ + SAVE_REG(s6,sp); \ + SAVE_REG(s7,sp); \ + SAVE_REG(t8,sp); \ + SAVE_REG(t9,sp); \ + SAVE_REG(gp,sp); \ + SAVE_REG(s8,sp); \ + SAVE_REG(ra,sp); \ + sw k0, (sp_IDX * 4)(sp); \ + sw k1, (CPU_USER_REG_COUNT * 4)(sp); + +#define RESTORE_INT_CONTEXT(treg) \ + lw k1, (CPU_USER_REG_COUNT * 4)(treg); \ + mtc0 k1, CP0_EPC; \ + LOAD_REG(v0,treg); \ + LOAD_REG(v1,treg); \ + LOAD_REG(a0,treg); \ + LOAD_REG(a1,treg); \ + LOAD_REG(a2,treg); \ + LOAD_REG(a3,treg); \ + LOAD_REG(t0,treg); \ + LOAD_REG(t1,treg); \ + LOAD_REG(t2,treg); \ + LOAD_REG(t3,treg); \ + LOAD_REG(t4,treg); \ + LOAD_REG(t5,treg); \ + LOAD_REG(t6,treg); \ + LOAD_REG(t7,treg); \ + LOAD_REG(s0,treg); \ + LOAD_REG(s1,treg); \ + LOAD_REG(s2,treg); \ + LOAD_REG(s3,treg); \ + LOAD_REG(s4,treg); \ + LOAD_REG(s5,treg); \ + LOAD_REG(s6,treg); \ + LOAD_REG(s7,treg); \ + LOAD_REG(t8,treg); \ + LOAD_REG(t9,treg); \ + LOAD_REG(gp,treg); \ + LOAD_REG(ra,treg); \ + LOAD_REG(s8,treg); \ + lw sp, (sp_IDX * 4)(treg); + +#endif /* __ASSEMBLY__ */ + +#define num_to_string(s) to_string(s) +#define to_string(s) #s + +#define IASM_SAVE_REG(reg, here) \ + "sw " to_string(reg) " , " num_to_string(reg ## _IDX) \ + " * 4(" num_to_string(here)" )\n\t" + +#define IASM_LOAD_REG(reg, here) \ + "lw " to_string(reg) " , " num_to_string(reg ## _IDX) \ + " * 4(" num_to_string(here)" )\n\t" + + +/* + * Macros to be used with C code. + */ +#define __read_32bit_c0_register(source, sel) \ +({ int __res; \ + if (sel == 0) \ + __asm__ __volatile__( \ + "mfc0\t%0, " #source "\n\t" \ + : "=r" (__res)); \ + else \ + __asm__ __volatile__( \ + ".set\tmips32\n\t" \ + "mfc0\t%0, " #source ", " #sel "\n\t" \ + ".set\tmips0\n\t" \ + : "=r" (__res)); \ + __res; \ +}) + +#define __write_32bit_c0_register(register, sel, value) \ +do { \ + if (sel == 0) \ + __asm__ __volatile__( \ + "mtc0\t%z0, " #register "\n\t" \ + : : "Jr" ((unsigned int)(value))); \ + else \ + __asm__ __volatile__( \ + ".set\tmips32\n\t" \ + "mtc0\t%z0, " #register ", " #sel "\n\t" \ + ".set\tmips0" \ + : : "Jr" ((unsigned int)(value))); \ +} while (0) + +#define __read_ulong_c0_register(reg, sel) \ + (unsigned long) __read_32bit_c0_register(reg, sel) + +#define __write_ulong_c0_register(reg, sel, val) \ +do { \ + __write_32bit_c0_register(reg, sel, val); \ +} while (0) + +#define read_c0_index() __read_32bit_c0_register($0, 0) +#define write_c0_index(val) __write_32bit_c0_register($0, 0, val) + +#define read_c0_entrylo0() __read_ulong_c0_register($2, 0) +#define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val) + +#define read_c0_entrylo1() __read_ulong_c0_register($3, 0) +#define write_c0_entrylo1(val) __write_ulong_c0_register($3, 0, val) + +#define read_c0_conf() __read_32bit_c0_register($3, 0) +#define write_c0_conf(val) __write_32bit_c0_register($3, 0, val) + +#define read_c0_context() __read_ulong_c0_register($4, 0) +#define write_c0_context(val) __write_ulong_c0_register($4, 0, val) + +#define read_c0_userlocal() __read_ulong_c0_register($4, 2) +#define write_c0_userlocal(val) __write_ulong_c0_register($4, 2, val) + +#define read_c0_pagemask() __read_32bit_c0_register($5, 0) +#define write_c0_pagemask(val) __write_32bit_c0_register($5, 0, val) + +#define read_c0_wired() __read_32bit_c0_register($6, 0) +#define write_c0_wired(val) __write_32bit_c0_register($6, 0, val) + +#define read_c0_info() __read_32bit_c0_register($7, 0) + +#define read_c0_badvaddr() __read_ulong_c0_register($8, 0) +#define write_c0_badvaddr(val) __write_ulong_c0_register($8, 0, val) + +#define read_c0_count() __read_32bit_c0_register($9, 0) +#define write_c0_count(val) __write_32bit_c0_register($9, 0, val) + +#define read_c0_entryhi() __read_ulong_c0_register($10, 0) +#define write_c0_entryhi(val) __write_ulong_c0_register($10, 0, val) + +#define read_c0_compare() __read_32bit_c0_register($11, 0) +#define write_c0_compare(val) __write_32bit_c0_register($11, 0, val) + +#define read_c0_status() __read_32bit_c0_register($12, 0) +#define write_c0_status(val) __write_32bit_c0_register($12, 0, val) + +#define read_c0_cause() __read_32bit_c0_register($13, 0) +#define write_c0_cause(val) __write_32bit_c0_register($13, 0, val) + +#define read_c0_epc() __read_ulong_c0_register($14, 0) +#define write_c0_epc(val) __write_ulong_c0_register($14, 0, val) + +#define read_c0_prid() __read_32bit_c0_register($15, 0) + +#define read_c0_config() __read_32bit_c0_register($16, 0) +#define read_c0_config1() __read_32bit_c0_register($16, 1) +#define read_c0_config2() __read_32bit_c0_register($16, 2) +#define write_c0_config(val) __write_32bit_c0_register($16, 0, val) +#define write_c0_config1(val) __write_32bit_c0_register($16, 1, val) +#define write_c0_config2(val) __write_32bit_c0_register($16, 2, val) + +#define read_c0_xcontext() __read_ulong_c0_register($20, 0) +#define write_c0_xcontext(val) __write_ulong_c0_register($20, 0, val) + +#define read_c0_intcontrol() __read_32bit_c0_ctrl_register($20) +#define write_c0_intcontrol(val) __write_32bit_c0_ctrl_register($20, val) + +#define read_c0_framemask() __read_32bit_c0_register($21, 0) +#define write_c0_framemask(val) __write_32bit_c0_register($21, 0, val) + +/* + * MIPS32 / MIPS64 performance counters + */ +#define read_c0_cacheerr() __read_32bit_c0_register($27, 0) + +#define read_c0_taglo() __read_32bit_c0_register($28, 0) +#define write_c0_taglo(val) __write_32bit_c0_register($28, 0, val) + +#define read_c0_dtaglo() __read_32bit_c0_register($28, 2) +#define write_c0_dtaglo(val) __write_32bit_c0_register($28, 2, val) + +#define read_c0_taghi() __read_32bit_c0_register($29, 0) +#define write_c0_taghi(val) __write_32bit_c0_register($29, 0, val) + +#define read_c0_errorepc() __read_ulong_c0_register($30, 0) +#define write_c0_errorepc(val) __write_ulong_c0_register($30, 0, val) + +/* MIPSR2 */ +#define read_c0_hwrena() __read_32bit_c0_register($7, 0) +#define write_c0_hwrena(val) __write_32bit_c0_register($7, 0, val) + +#define read_c0_intctl() __read_32bit_c0_register($12, 1) +#define write_c0_intctl(val) __write_32bit_c0_register($12, 1, val) + +#define read_c0_srsctl() __read_32bit_c0_register($12, 2) +#define write_c0_srsctl(val) __write_32bit_c0_register($12, 2, val) + +#define read_c0_srsmap() __read_32bit_c0_register($12, 3) +#define write_c0_srsmap(val) __write_32bit_c0_register($12, 3, val) + +#define read_c0_ebase() __read_32bit_c0_register($15, 1) +#define write_c0_ebase(val) __write_32bit_c0_register($15, 1, val) + +#endif /* __ATOMPORT_ASM_MACROS_H_ */ diff --git a/ports/mips/atomport-entry.s b/ports/mips/atomport-entry.s index c746923..508ea5d 100644 --- a/ports/mips/atomport-entry.s +++ b/ports/mips/atomport-entry.s @@ -1,28 +1,33 @@ -/** - * Copyright (c) 2010 Himanshu Chauhan. - * All rights reserved. +/* + * Copyright (c) 2011, Himanshu Chauhan. All rights reserved. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: * - * @file start.S - * @version 0.1 - * @author Himanshu Chauhan (hschauhan@nulltrace.org) - * @brief 24Kc startup file. + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. No personal names or organizations' names associated with the + * Atomthreads project may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE ATOMTHREADS PROJECT AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ -#include "atomport-private.h" +#include "atomport-asm-macros.h" .extern _stack_start .section .start.text,"ax",@progbits @@ -34,7 +39,7 @@ EXCEPTION_VECTOR(_general_exception, 0x180, _handle_general_exception) EXCEPTION_VECTOR(_interrupts, 0x200, _handle_interrupt) LEAF(_start) - mtc0 ZERO, CP0_CONTEXT + mtc0 zero, CP0_CONTEXT nop nop nop @@ -43,143 +48,42 @@ LEAF(_start) disable_global_interrupts /* clear CPU timer counters. We don't want surprises. */ - mtc0 ZERO, CP0_COMPARE - mtc0 ZERO, CP0_COUNT + mtc0 zero, CP0_COMPARE + mtc0 zero, CP0_COUNT - /* Read number of tlb entries from config register */ - bal num_tlb_entries - nop - - /* initialize tlb */ - bal tlb_init - move A0, V0 - - la SP, _stack_start /* setup the stack (bss segment) */ - la T0, cpu_init - j T0 /* Call the C- code now */ + la sp, _stack_start /* setup the stack (bss segment) */ + la t0, main + j t0 /* Call the C- code now */ nop 1: b 1b /* we should not come here whatsoever */ END(_start) -/* - * Read config 1 register and return the number - * of TLB entries in this CPU. - */ -LEAF(num_tlb_entries) - mfc0 A1, CP0_CONFIG1 - nop - nop - nop - srl V0, A1, 25 - and V0, V0, 0x3F - jr RA - nop -END(num_tlb_entries) - -/** - * tlb_init - * Initialize the TLB to a power-up state, guaranteeing that all entries - * are unique and invalid. - * Arguments: - * a0 = Maximum TLB index (from MMUSize field of C0_Config1) - * Returns: - * No value - * Restrictions: - * This routine must be called in unmapped space - * Algorithm: - * va = kseg0_base; - * for (entry = max_TLB_index ; entry >= 0, entry--) { - * while (TLB_Probe_Hit(va)) { - * va += Page_Size; - * } - * TLB_Write(entry, va, 0, 0, 0); - * } - */ -LEAF(tlb_init) - /* Clear PageMask, EntryLo0 and EntryLo1 so that valid bits are off, PFN values - * are zero, and the default page size is used. - */ - mtc0 ZERO, CP0_ENTRYLO0 - /* Clear out PFN and valid bits */ - mtc0 ZERO, CP0_ENTRYLO1 - mtc0 ZERO, CP0_PAGEMASK - /* Clear out mask register */ - /* Start with the base address of kseg0 for the VA part of the TLB */ - li T0, 0x80000000 - /* - * Write the VA candidate to EntryHi and probe the TLB to see if if is - * already there. If it is, a write to the TLB may cause a machine - * check, so just increment the VA candidate by one page and try again. - */ -10: - mtc0 T0, CP0_ENTRYHI - /* Write VA candidate */ - tlbp_write_hazard - /* Clear EntryHi hazard (ssnop/ehb in R1/2) */ - tlbp - /* Probe the TLB to check for a match */ - tlbp_read_hazard - /* Clear Index hazard (ssnop/ehb in R1/2) */ - mfc0 T1, CP0_INDEX - addiu T0, (1 << S_EntryHiVPN2) - /* Read back flag to check for match */ - bgez T1, 10b - nop - /* Add 1 to VPN index in va */ - /* - * A write of the VPN candidate will be unique, so write this entry - * into the next index, decrement the index, and continue until the - * index goes negative (thereby writing all TLB entries) - */ - mtc0 A0, CP0_INDEX - /* Use this as next TLB index */ - tlbw_write_hazard - /* Clear Index hazard (ssnop/ehb in R1/2) */ - tlbwi - /* Write the TLB entry */ - /* Branch if more TLB entries to do */ - addiu A0, A0, -1 - bne A0, ZERO, 10b - nop - - /* Decrement the TLB index */ - /* - * Clear Index and EntryHi simply to leave the state constant for all - * returns - */ - mtc0 ZERO, CP0_INDEX - mtc0 ZERO, CP0_ENTRYHI - jr RA - /* Return to caller */ - nop -END(tlb_init) - .extern vmm_cpu_handle_pagefault LEAF(_handle_tlbmiss) - disable_global_interrupts - move K0, SP - SAVE_INT_CONTEXT(_int_stack) - move A0, SP - bal vmm_cpu_handle_pagefault - nop - enable_global_interrupts - eret + //disable_global_interrupts + //move k0, sp + //SAVE_INT_CONTEXT(_int_stack) + //move a0, sp + //bal vmm_cpu_handle_pagefault + //nop + //enable_global_interrupts + //eret END(_handle_tlbmiss) .extern generic_int_handler .extern _int_stack .extern vmm_regs_dump LEAF(_handle_interrupt) - disable_global_interrupts - SAVE_INT_CONTEXT(_int_stack) - move A0, SP - bal generic_int_handler - nop - RESTORE_INT_CONTEXT(SP) - enable_global_interrupts - eret + //disable_global_interrupts + //SAVE_INT_CONTEXT(_int_stack) + //move a0, sp + //bal generic_int_handler + //nop + //RESTORE_INT_CONTEXT(sp) + //enable_global_interrupts + //eret END(_handle_interrupt) LEAF(_handle_cache_error) @@ -188,43 +92,38 @@ LEAF(_handle_cache_error) END(_handle_cache_error) LEAF(_handle_general_exception) - //move K0, SP - //SAVE_INT_CONTEXT(_int_stack) - //bal vmm_regs_dump - //move A0, SP - b _handle_general_exception nop END(_handle_general_exception) /** - * A0 -> Contains virtual address. - * A1 -> Contains physical address. - * A2 -> TLB index: If -1 select automatically. + * a0 -> Contains virtual address. + * a1 -> Contains physical address. + * a2 -> TLB index: If -1 select automatically. */ .globl create_tlb_entry LEAF(create_tlb_entry) - mtc0 A2, CP0_INDEX /* load the tlb index to be programmed. */ - srl A0, A0, 12 /* get the VPN */ - sll A0, A0, 12 + mtc0 a2, CP0_INDEX /* load the tlb index to be programmed. */ + srl a0, a0, 12 /* get the VPN */ + sll a0, a0, 12 nop - mtc0 A0, CP0_ENTRYHI /* load VPN in entry hi */ - addi T0, A1, 0x1000 /* next PFN for entry lo1 in T0 */ - srl A1, A1, 12 /* get the PFN */ - sll A1, A1, 6 /* get the PFN */ - srl T0, T0, 12 - sll T0, T0, 6 - ori A1, A1, 0x7 /* mark the page writable, global and valid */ - mtc0 A1, CP0_ENTRYLO0 - ori T0, T0, 0x7 /* mark the next physical page writable, global and valid */ + mtc0 a0, CP0_ENTRYHI /* load VPN in entry hi */ + addi t0, a1, 0x1000 /* next PFN for entry lo1 in T0 */ + srl a1, a1, 12 /* get the PFN */ + sll a1, a1, 6 /* get the PFN */ + srl t0, t0, 12 + sll t0, t0, 6 + ori a1, a1, 0x7 /* mark the page writable, global and valid */ + mtc0 a1, CP0_ENTRYLO0 + ori t0, t0, 0x7 /* mark the next physical page writable, global and valid */ nop nop - mtc0 T0, CP0_ENTRYLO1 + mtc0 t0, CP0_ENTRYLO1 nop nop nop tlbwi ehb - j RA + j ra nop END(create_tlb_entry) diff --git a/ports/mips/atomport-private.h b/ports/mips/atomport-private.h index 6c5cb84..e2af7e0 100644 --- a/ports/mips/atomport-private.h +++ b/ports/mips/atomport-private.h @@ -139,10 +139,4 @@ #define CP0_DATAHI $29,1 #define CP0_ERRORPC $30 -#define SAVE_REG(addr, reg, val) \ - sw reg, (reg ## _IDX * WORD_SIZE)(addr) - -#define LOAD_REG(addr, reg, val) \ - lw reg, (reg ## _IDX * WORD_SIZE)(addr) - #endif /* __ATOMPORT_PRIVATE_H_ */ diff --git a/ports/mips/atomport-tests.h b/ports/mips/atomport-tests.h index 5b5a6de..66b58eb 100644 --- a/ports/mips/atomport-tests.h +++ b/ports/mips/atomport-tests.h @@ -35,8 +35,8 @@ /* Logger macro for viewing test results */ /* FIXME: Add uart out routine once uart is supported */ -#define ATOMLOG(x) -#define _STR(x) +#define ATOMLOG printk +#define _STR /* Default thread stack size (in bytes) */ #define TEST_THREAD_STACK_SIZE 128 diff --git a/ports/mips/atomport-types.h b/ports/mips/atomport-types.h index 97ba780..b5c10f9 100644 --- a/ports/mips/atomport-types.h +++ b/ports/mips/atomport-types.h @@ -36,6 +36,8 @@ typedef signed char int8_t; typedef unsigned int uint32_t; typedef unsigned short uint16_t; typedef unsigned char uint8_t; +typedef long long int64_t; +typedef unsigned long size_t; #define UINT32 uint32_t diff --git a/ports/mips/io.c b/ports/mips/io.c new file mode 100644 index 0000000..0ce15c4 --- /dev/null +++ b/ports/mips/io.c @@ -0,0 +1,44 @@ +/* + * Copyright (c) Himanshu Chauhan 2009-11. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of Himanshu Chauhan nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +uint8_t ioreadb (void *addr) +{ + uint8_t rv; + rv = *((volatile uint8_t *)addr); + return rv; +} + +void iowriteb (void *addr, uint8_t data) +{ + *(volatile uint8_t *)addr = data; +} + diff --git a/ports/mips/linker.ld b/ports/mips/linker.ld new file mode 100755 index 0000000..98d6df6 --- /dev/null +++ b/ports/mips/linker.ld @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2011, Himanshu Chauhan. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. No personal names or organizations' names associated with the + * Atomthreads project may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE ATOMTHREADS PROJECT AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +OUTPUT_FORMAT("elf32-tradbigmips") +OUTPUT_ARCH("mips") +ENTRY(_start) + +SECTIONS +{ + . = 0x80000000; + .text : + { + *(.start.text) + *(.text) + . = ALIGN(4); + _etext = .; + } + + .data : + { + *(.data) + . = ALIGN(4); + _edata = .; + } + + .bss : + { + *(.bss) + . = ALIGN(4); + _ebss = .; + } + + .rodata : + { + *(.rodata .rodata.*) + . = ALIGN(4); + _erodata = .; + } + + PROVIDE(_stack_end = .); + . = . + 8192; + . = ALIGN(4); + PROVIDE(_stack_start = .); + PROVIDE(_int_stack_end = .); + . = . + 8192; + . = ALIGN(4); + PROVIDE(_int_stack = .); +} diff --git a/ports/mips/printk.c b/ports/mips/printk.c new file mode 100644 index 0000000..1ef0f64 --- /dev/null +++ b/ports/mips/printk.c @@ -0,0 +1,61 @@ +/* + * Copyright (c) Himanshu Chauhan 2009-11. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of Himanshu Chauhan nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include + +#include + +static int8_t buf[2048]; + +extern void putch(uint8_t ch); + +/* Uses the above routine to output a string... */ +void puts(const uint8_t *text) +{ + int32_t i; + + for (i = 0; i < strlen((const int8_t *)text); i++) { + putch(text[i]); + } +} + +void printk(const char *format, ...) +{ + va_list args; + int i; + + va_start(args, format); + i = vsprintf(buf, (const int8_t *)format, args); + va_end(args); + + puts((const uint8_t *)buf); +} + diff --git a/ports/mips/printk.h b/ports/mips/printk.h new file mode 100644 index 0000000..eeee752 --- /dev/null +++ b/ports/mips/printk.h @@ -0,0 +1,43 @@ +/* + * This file is part of Freax kernel. + * + * Copyright (c) Himanshu Chauhan 2009-10. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of Himanshu Chauhan nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _PRINTK_H +#define _PRINTK_H + +#include +#include + +extern void putch (uint8_t *ch); +extern void puts (const uint8_t *text); +extern void printk (const char*format, ...); + +#endif diff --git a/ports/mips/stdarg.h b/ports/mips/stdarg.h new file mode 100755 index 0000000..fd79ec0 --- /dev/null +++ b/ports/mips/stdarg.h @@ -0,0 +1,28 @@ +#ifndef _STDARG_H +#define _STDARG_H + +typedef char *va_list; + +/* Amount of space required in an argument list for an arg of type TYPE. + TYPE may alternatively be an expression whose type is used. */ + +#define __va_rounded_size(TYPE) \ + (((sizeof (TYPE) + sizeof (int) - 1) / sizeof (int)) * sizeof (int)) + +#ifndef __sparc__ +#define va_start(AP, LASTARG) \ + (AP = ((char *) &(LASTARG) + __va_rounded_size (LASTARG))) +#else +#define va_start(AP, LASTARG) \ + (__builtin_saveregs (), \ + AP = ((char *) &(LASTARG) + __va_rounded_size (LASTARG))) +#endif + +void va_end (va_list); /* Defined in gnulib */ +#define va_end(AP) + +#define va_arg(AP, TYPE) \ + (AP += __va_rounded_size (TYPE), \ + *((TYPE *) (AP - __va_rounded_size (TYPE)))) + +#endif /* _STDARG_H */ diff --git a/ports/mips/string.c b/ports/mips/string.c new file mode 100644 index 0000000..bd65a10 --- /dev/null +++ b/ports/mips/string.c @@ -0,0 +1,61 @@ +/* + * Copyright (c) Himanshu Chauhan 2009-11. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of Himanshu Chauhan nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include + +void *memcpy(void *dest, const void *src, size_t count) +{ + const int8_t *sp = (const int8_t *)src; + int8_t *dp = (int8_t *)dest; + for(; count != 0; count--) *dp++ = *sp++; + return dest; +} + +void *memset(void *dest, int8_t val, size_t count) +{ + int8_t *temp = (int8_t *)dest; + for( ; count != 0; count--) *temp++ = val; + return dest; +} + +uint16_t *memsetw(uint16_t *dest, uint16_t val, size_t count) +{ + uint16_t *temp = (uint16_t *)dest; + for( ; count != 0; count--) *temp++ = val; + return dest; +} + +size_t strlen(const int8_t *str) +{ + size_t retval; + for(retval = 0; *str != '\0'; str++) retval++; + return retval; +} diff --git a/ports/mips/string.h b/ports/mips/string.h new file mode 100644 index 0000000..ed5f98a --- /dev/null +++ b/ports/mips/string.h @@ -0,0 +1,42 @@ +/* + * Copyright (c) Himanshu Chauhan 2009-11. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of Himanshu Chauhan nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __STRING_H +#define __STRING_H + +#include + +void *memcpy(void *dest, const void *src, size_t count); +void *memset(void *dest, int8_t val, size_t count); +uint16_t *memsetw(uint16_t *dest, uint16_t val, size_t count); +size_t strlen(const int8_t *str); + +#endif /* __STRING_H */ + diff --git a/ports/mips/system.h b/ports/mips/system.h new file mode 100644 index 0000000..c655830 --- /dev/null +++ b/ports/mips/system.h @@ -0,0 +1,52 @@ +/* + * Copyright (c) Himanshu Chauhan 2009-11. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of Himanshu Chauhan nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _SYSTEM_H +#define _SYSTEM_H + +#include +#include + +extern const uint8_t *kernel_name; +extern const uint8_t *kernel_version; +extern const uint8_t *kernel_bdate; +extern const uint8_t *kernel_btime; + +extern void *memcpy (void *dest, const void *src, size_t count); +extern void *memset (void *dest, int8_t val, size_t count); +extern uint16_t *memsetw (uint16_t *dest, uint16_t val, size_t count); +extern size_t strlen (const int8_t *str); +extern int vsprintf (int8_t *buf, const int8_t *fmt, va_list args); +extern void init_console (void); +extern int32_t arch_init (void); +extern uint8_t ioreadb (void *addr); +extern void iowriteb (void *addr, uint8_t data); + +#endif /* _SYSTEM_H */ diff --git a/ports/mips/tests-main.c b/ports/mips/tests-main.c index 0ab9a94..af05049 100644 --- a/ports/mips/tests-main.c +++ b/ports/mips/tests-main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010, Kelvin Lawson. All rights reserved. + * Copyright (c) 2011, Himanshu Chauhan. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -31,6 +31,8 @@ #include "atomport-private.h" #include "atomtests.h" #include "atomtimer.h" +#include "system.h" +#include "printk.h" /* Constants */ @@ -124,14 +126,9 @@ static uint8_t main_thread_stack[MAIN_STACK_SIZE_BYTES]; /* Idle thread's stack area */ static uint8_t idle_thread_stack[IDLE_STACK_SIZE_BYTES]; -/* STDIO stream */ -static FILE uart_stdout = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE); - - /* Forward declarations */ static void main_thread_func (uint32_t data); - /** * \b main * @@ -145,12 +142,6 @@ int main ( void ) { int8_t status; - /** - * Reuse part of the idle thread's stack for the stack required - * during this startup function. - */ - SP = (int)&idle_thread_stack[(IDLE_STACK_SIZE_BYTES/2) - 1]; - /** * Note: to protect OS structures and data during initialisation, * interrupts must remain disabled until the first thread @@ -172,11 +163,11 @@ int main ( void ) * If you are not reusing the idle thread's stack during startup then * you should pass in the correct size here. */ - status = atomOSInit(&idle_thread_stack[IDLE_STACK_SIZE_BYTES - 1], (IDLE_STACK_SIZE_BYTES/2)); + status = atomOSInit(&idle_thread_stack[IDLE_STACK_SIZE_BYTES - 1], + (IDLE_STACK_SIZE_BYTES/2)); if (status == ATOM_OK) { - /* Enable the system tick timer */ - avrInitSystemTickTimer(); + /* FIXME: Enable the system tick timer */ /* Create an application thread */ status = atomThreadCreate(&main_tcb, @@ -221,77 +212,14 @@ int main ( void ) static void main_thread_func (uint32_t data) { uint32_t test_status; - int sleep_ticks; - /* Enable all LEDs (STK500-specific) */ - DDRB = 0xFF; - PORTB = 0xFF; - - /* Initialise UART (9600bps) */ - if (uart_init(9600) != 0) - { - /* Error initialising UART */ - } - - /** - * Redirect stdout via the UART. Note that the UART write routine - * is protected via a semaphore, so the OS must be started before - * use of the UART. - */ - stdout = &uart_stdout; + init_console(); /* Put a message out on the UART */ - printf_P(PSTR("Go\n")); + printk("Main Thread\n"); /* Start test. All tests use the same start API. */ test_status = test_start(); - /* Check main thread stack usage (if enabled) */ -#ifdef ATOM_STACK_CHECKING - if (test_status == 0) - { - uint32_t used_bytes, free_bytes; - - /* Check idle thread stack usage */ - if (atomThreadStackCheck (&main_tcb, &used_bytes, &free_bytes) == ATOM_OK) - { - /* Check the thread did not use up to the end of stack */ - if (free_bytes == 0) - { - printf_P (PSTR("Main stack overflow\n")); - test_status++; - } - - /* Log the stack usage */ -#ifdef TESTS_LOG_STACK_USAGE - printf_P (PSTR("MainUse:%d\n"), used_bytes); -#endif - } - - } -#endif - - /* Log final status */ - if (test_status == 0) - { - printf_P (PSTR("Pass\n")); - } - else - { - printf_P (PSTR("Fail(%d)\n"), test_status); - } - - /* Flash LED once per second if passed, very quickly if failed */ - sleep_ticks = (test_status == 0) ? SYSTEM_TICKS_PER_SEC : (SYSTEM_TICKS_PER_SEC/8); - - /* Test finished, flash slowly for pass, fast for fail */ - while (1) - { - /* Toggle a LED (STK500-specific) */ - PORTB ^= (1 << 7); - - /* Sleep then toggle LED again */ - atomTimerDelay(sleep_ticks); - } - + while(1); } diff --git a/ports/mips/vsprintf.c b/ports/mips/vsprintf.c new file mode 100644 index 0000000..a957676 --- /dev/null +++ b/ports/mips/vsprintf.c @@ -0,0 +1,244 @@ +/* vsprintf.c -- Lars Wirzenius & Linus Torvalds. */ +/* + * Wirzenius wrote this portably, Torvalds fucked it up :-) + * and Himanshu Fucked it up further for Freax :)) + */ + +#include +#include +#include + +/* we use this so that we can do without the ctype library */ +#define is_digit(c) ((c) >= '0' && (c) <= '9') + +static int skip_atoi(const int8_t **s) +{ + int i=0; + + while (is_digit(**s)) + i = i*10 + *((*s)++) - '0'; + return i; +} + +#define ZEROPAD 1 /* pad with zero */ +#define SIGN 2 /* unsigned/signed long */ +#define PLUS 4 /* show plus */ +#define SPACE 8 /* space if plus */ +#define LEFT 16 /* left justified */ +#define SPECIAL 32 /* 0x */ +#define SMALL 64 /* use 'abcdef' instead of 'ABCDEF' */ + +/*#define do_div(n,base) ({ \ +int __res; \ +__asm__("divl %4":"=a" (n),"=d" (__res):"0" (n),"1" (0),"r" (base)); \ +__res; })*/ + +static uint32_t do_div (int32_t *n, int32_t base) +{ + uint32_t remainder = *n % base; + *n /= base; + return remainder; +} + +static int8_t * number(int8_t * str, int num, int32_t base, + int32_t size, int32_t precision, int32_t type) +{ + int8_t c,sign,tmp[36]; + const int8_t *digits=(const int8_t *)"0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"; + int32_t i; + + if (type & SMALL) digits = (const int8_t *)"0123456789abcdefghijklmnopqrstuvwxyz"; + if (type & LEFT) type &= ~ZEROPAD; + if (base < 2 || base > 36) + return 0; + c = (type & ZEROPAD) ? '0' : ' ' ; + if (type & SIGN && num < 0) { + sign = '-'; + num = -num; + } else + sign = (type & PLUS) ? '+' : ((type & SPACE) ? ' ' : 0); + if (sign) size--; + + if (type & SPECIAL) { + if (base == 16) { + size -= 2; + } else if (base == 8) { + size--; + } + } + + i = 0; + if (num == 0) + tmp[i++] = '0'; + else while (num != 0) + tmp[i++] = digits[do_div(&num,base)]; + if (i > precision) precision = i; + size -= precision; + if (!(type & (ZEROPAD + LEFT))) + while(size-- > 0) + *str++ = ' '; + if (sign) + *str++ = sign; + if (type & SPECIAL) { + if (base == 8) { + *str++ = '0'; + } else if (base == 16) { + *str++ = '0'; + *str++ = digits[33]; + } + } + + if (!(type & LEFT)) + while(size-- > 0) + *str++ = c; + while(i < precision--) + *str++ = '0'; + while(i-- > 0) + *str++ = tmp[i]; + while(size-- > 0) + *str++ = ' '; + return str; +} + +int32_t vsprintf (int8_t *buf, const int8_t *fmt, va_list args) +{ + int32_t len; + int32_t i; + int8_t * str; + int8_t *s; + int32_t *ip; + + int32_t flags; /* flags to number() */ + + int32_t field_width; /* width of output field */ + int32_t precision; /* min. # of digits for integers; max + number of chars for from string */ + int32_t qualifier; /* 'h', 'l', or 'L' for integer fields */ + + for (str=buf ; *fmt ; ++fmt) { + if (*fmt != '%') { + *str++ = *fmt; + continue; + } + + /* process flags */ + flags = 0; + repeat: + ++fmt; /* this also skips first '%' */ + switch (*fmt) { + case '-': flags |= LEFT; goto repeat; + case '+': flags |= PLUS; goto repeat; + case ' ': flags |= SPACE; goto repeat; + case '#': flags |= SPECIAL; goto repeat; + case '0': flags |= ZEROPAD; goto repeat; + } + + /* get field width */ + field_width = -1; + if (is_digit(*fmt)) + field_width = skip_atoi(&fmt); + else if (*fmt == '*') { + /* it's the next argument */ + field_width = va_arg(args, int); + if (field_width < 0) { + field_width = -field_width; + flags |= LEFT; + } + } + + /* get the precision */ + precision = -1; + if (*fmt == '.') { + ++fmt; + if (is_digit(*fmt)) + precision = skip_atoi(&fmt); + else if (*fmt == '*') { + /* it's the next argument */ + precision = va_arg(args, int); + } + if (precision < 0) + precision = 0; + } + + /* get the conversion qualifier */ + qualifier = -1; + if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L') { + qualifier = *fmt; + ++fmt; + } + + switch (*fmt) { + case 'c': + if (!(flags & LEFT)) + while (--field_width > 0) + *str++ = ' '; + *str++ = (unsigned char) va_arg(args, int); + while (--field_width > 0) + *str++ = ' '; + break; + + case 's': + s = va_arg(args, int8_t *); + len = strlen(s); + if (precision < 0) + precision = len; + else if (len > precision) + len = precision; + + if (!(flags & LEFT)) + while (len < field_width--) + *str++ = ' '; + for (i = 0; i < len; ++i) + *str++ = *s++; + while (len < field_width--) + *str++ = ' '; + break; + + case 'o': + str = number(str, va_arg(args, unsigned long), 8, + field_width, precision, flags); + break; + + case 'p': + if (field_width == -1) { + field_width = 8; + flags |= ZEROPAD; + } + str = number(str, + (unsigned long) va_arg(args, void *), 16, + field_width, precision, flags); + break; + + case 'x': + flags |= SMALL; + case 'X': + str = number(str, va_arg(args, unsigned long), 16, + field_width, precision, flags); + break; + + case 'd': + case 'i': + flags |= SIGN; + case 'u': + str = number(str, va_arg(args, unsigned long), 10, + field_width, precision, flags); + break; + + case 'n': + ip = va_arg(args, int32_t *); + *ip = (str - buf); + break; + + default: + if (*fmt != '%') + *str++ = '%'; + if (*fmt) + *str++ = *fmt; + else + --fmt; + break; + } + } + *str = '\0'; + return str-buf; +} diff --git a/tests/kern1.c b/tests/kern1.c index 1695039..c467298 100644 --- a/tests/kern1.c +++ b/tests/kern1.c @@ -27,8 +27,13 @@ * POSSIBILITY OF SUCH DAMAGE. */ - +#ifndef STAND_ALONE #include +#else +#include +#include +#endif + #include "atom.h" #include "atomtests.h" diff --git a/tests/kern2.c b/tests/kern2.c index 7387c89..d1d1254 100644 --- a/tests/kern2.c +++ b/tests/kern2.c @@ -31,6 +31,9 @@ #include "atom.h" #include "atomtests.h" +#ifdef STAND_ALONE +#include +#endif /** * \b test_start diff --git a/tests/kern3.c b/tests/kern3.c index 20304f8..555ac8e 100644 --- a/tests/kern3.c +++ b/tests/kern3.c @@ -31,6 +31,9 @@ #include "atom.h" #include "atomtests.h" +#ifdef STAND_ALONE +#include +#endif /* Number of test threads */ #define NUM_TEST_THREADS 2 diff --git a/tests/kern4.c b/tests/kern4.c index 909232e..eb39364 100644 --- a/tests/kern4.c +++ b/tests/kern4.c @@ -31,6 +31,9 @@ #include "atom.h" #include "atomtests.h" +#ifdef STAND_ALONE +#include +#endif /* Number of test threads */ #define NUM_TEST_THREADS 4 diff --git a/tests/mutex1.c b/tests/mutex1.c index e3bc16a..a2b03e7 100644 --- a/tests/mutex1.c +++ b/tests/mutex1.c @@ -27,12 +27,17 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE #include +#else +#include +#include +#endif + #include "atom.h" #include "atommutex.h" #include "atomtests.h" - /* Number of test threads */ #define NUM_TEST_THREADS 2 diff --git a/tests/mutex2.c b/tests/mutex2.c index 9725f44..7e90d22 100644 --- a/tests/mutex2.c +++ b/tests/mutex2.c @@ -27,8 +27,13 @@ * POSSIBILITY OF SUCH DAMAGE. */ - +#ifndef STAND_ALONE #include +#else +#include +#include +#endif + #include "atom.h" #include "atommutex.h" #include "atomtests.h" diff --git a/tests/mutex3.c b/tests/mutex3.c index f604430..7a9b2da 100644 --- a/tests/mutex3.c +++ b/tests/mutex3.c @@ -32,6 +32,9 @@ #include "atomtests.h" #include "atommutex.h" +#ifdef STAND_ALONE +#include +#endif /* Number of test threads */ #define NUM_TEST_THREADS 4 @@ -288,4 +291,4 @@ static void test_thread_func (uint32_t param) { atomTimerDelay (SYSTEM_TICKS_PER_SEC); } -} \ No newline at end of file +} diff --git a/tests/mutex4.c b/tests/mutex4.c index b478517..28553fd 100644 --- a/tests/mutex4.c +++ b/tests/mutex4.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtests.h" @@ -293,4 +299,4 @@ static void test_thread_func (uint32_t param) { atomTimerDelay (SYSTEM_TICKS_PER_SEC); } -} \ No newline at end of file +} diff --git a/tests/mutex5.c b/tests/mutex5.c index 9aa18f2..c8dff89 100644 --- a/tests/mutex5.c +++ b/tests/mutex5.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtests.h" @@ -299,4 +305,4 @@ static void test_thread_func (uint32_t param) { atomTimerDelay (SYSTEM_TICKS_PER_SEC); } -} \ No newline at end of file +} diff --git a/tests/mutex6.c b/tests/mutex6.c index ca2c2d6..79bcd50 100644 --- a/tests/mutex6.c +++ b/tests/mutex6.c @@ -27,6 +27,13 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif + #include "atom.h" #include "atomtests.h" @@ -290,4 +297,4 @@ static void test_thread_func (uint32_t param) { atomTimerDelay (SYSTEM_TICKS_PER_SEC); } -} \ No newline at end of file +} diff --git a/tests/mutex7.c b/tests/mutex7.c index 9189dee..e9edcb6 100644 --- a/tests/mutex7.c +++ b/tests/mutex7.c @@ -27,8 +27,13 @@ * POSSIBILITY OF SUCH DAMAGE. */ - +#ifndef STAND_ALONE #include +#else +#include +#include +#endif + #include "atom.h" #include "atomtests.h" #include "atommutex.h" diff --git a/tests/mutex8.c b/tests/mutex8.c index 14febb9..fc3e62a 100644 --- a/tests/mutex8.c +++ b/tests/mutex8.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atommutex.h" diff --git a/tests/mutex9.c b/tests/mutex9.c index e509762..394e1a7 100644 --- a/tests/mutex9.c +++ b/tests/mutex9.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtests.h" diff --git a/tests/queue1.c b/tests/queue1.c index f3a8938..50089c6 100644 --- a/tests/queue1.c +++ b/tests/queue1.c @@ -27,8 +27,13 @@ * POSSIBILITY OF SUCH DAMAGE. */ - +#ifndef STAND_ALONE #include +#else +#include +#include +#endif + #include "atom.h" #include "atomqueue.h" #include "atomtests.h" diff --git a/tests/queue10.c b/tests/queue10.c index ca6b6be..7a8187c 100644 --- a/tests/queue10.c +++ b/tests/queue10.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomqueue.h" diff --git a/tests/queue2.c b/tests/queue2.c index 8528ade..0365882 100644 --- a/tests/queue2.c +++ b/tests/queue2.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomqueue.h" diff --git a/tests/queue3.c b/tests/queue3.c index 277a4e3..d2ea0e1 100644 --- a/tests/queue3.c +++ b/tests/queue3.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomqueue.h" diff --git a/tests/queue4.c b/tests/queue4.c index 3420882..46703d4 100644 --- a/tests/queue4.c +++ b/tests/queue4.c @@ -27,8 +27,13 @@ * POSSIBILITY OF SUCH DAMAGE. */ - +#ifndef STAND_ALONE #include +#else +#include +#include +#endif + #include "atom.h" #include "atomqueue.h" #include "atomtests.h" diff --git a/tests/queue5.c b/tests/queue5.c index bf07960..e7832cb 100644 --- a/tests/queue5.c +++ b/tests/queue5.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtests.h" diff --git a/tests/queue6.c b/tests/queue6.c index 4de62f0..c2d3473 100644 --- a/tests/queue6.c +++ b/tests/queue6.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomqueue.h" diff --git a/tests/queue7.c b/tests/queue7.c index 5b249d8..ab77781 100644 --- a/tests/queue7.c +++ b/tests/queue7.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomqueue.h" diff --git a/tests/queue8.c b/tests/queue8.c index 9064e47..78921f8 100644 --- a/tests/queue8.c +++ b/tests/queue8.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtests.h" diff --git a/tests/queue9.c b/tests/queue9.c index 1bc1034..78f1132 100644 --- a/tests/queue9.c +++ b/tests/queue9.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtests.h" diff --git a/tests/sem1.c b/tests/sem1.c index b7b6335..69623eb 100644 --- a/tests/sem1.c +++ b/tests/sem1.c @@ -27,8 +27,13 @@ * POSSIBILITY OF SUCH DAMAGE. */ - +#ifndef STAND_ALONE #include +#else +#include +#include +#endif + #include "atom.h" #include "atomsem.h" #include "atomtests.h" diff --git a/tests/sem2.c b/tests/sem2.c index b83f8cf..d7f0e40 100644 --- a/tests/sem2.c +++ b/tests/sem2.c @@ -27,8 +27,13 @@ * POSSIBILITY OF SUCH DAMAGE. */ - +#ifndef STAND_ALONE #include +#else +#include +#include +#endif + #include "atom.h" #include "atomsem.h" #include "atomtests.h" @@ -321,4 +326,4 @@ static void testCallback (POINTER cb_data) */ } -} \ No newline at end of file +} diff --git a/tests/sem3.c b/tests/sem3.c index 6648b39..113166f 100644 --- a/tests/sem3.c +++ b/tests/sem3.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtests.h" diff --git a/tests/sem4.c b/tests/sem4.c index 419195c..5fb0eb9 100644 --- a/tests/sem4.c +++ b/tests/sem4.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtests.h" diff --git a/tests/sem5.c b/tests/sem5.c index dc87f9f..a7e4f6d 100644 --- a/tests/sem5.c +++ b/tests/sem5.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtests.h" diff --git a/tests/sem6.c b/tests/sem6.c index 851f9b8..106bbfa 100644 --- a/tests/sem6.c +++ b/tests/sem6.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtests.h" diff --git a/tests/sem7.c b/tests/sem7.c index 62fa16f..b4595cb 100644 --- a/tests/sem7.c +++ b/tests/sem7.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtests.h" diff --git a/tests/sem8.c b/tests/sem8.c index 432cf32..75d4896 100644 --- a/tests/sem8.c +++ b/tests/sem8.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtests.h" diff --git a/tests/sem9.c b/tests/sem9.c index d7a86d6..48f5249 100644 --- a/tests/sem9.c +++ b/tests/sem9.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomsem.h" diff --git a/tests/timer1.c b/tests/timer1.c index 2e2d940..d1bbf39 100644 --- a/tests/timer1.c +++ b/tests/timer1.c @@ -27,8 +27,13 @@ * POSSIBILITY OF SUCH DAMAGE. */ - +#ifndef STAND_ALONE #include +#else +#include +#include +#endif + #include "atom.h" #include "atomsem.h" #include "atomtimer.h" @@ -246,4 +251,4 @@ static void testCallback (POINTER cb_data) */ } -} \ No newline at end of file +} diff --git a/tests/timer2.c b/tests/timer2.c index a606830..b645f0e 100644 --- a/tests/timer2.c +++ b/tests/timer2.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtimer.h" diff --git a/tests/timer3.c b/tests/timer3.c index 0ea7a50..e6f9104 100644 --- a/tests/timer3.c +++ b/tests/timer3.c @@ -27,8 +27,13 @@ * POSSIBILITY OF SUCH DAMAGE. */ - +#ifndef STAND_ALONE #include +#else +#include +#include +#endif + #include "atom.h" #include "atomsem.h" #include "atomtimer.h" @@ -240,4 +245,4 @@ static void testCallback (POINTER cb_data) */ } -} \ No newline at end of file +} diff --git a/tests/timer4.c b/tests/timer4.c index 1e74e88..f2864c6 100644 --- a/tests/timer4.c +++ b/tests/timer4.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtimer.h" @@ -190,4 +196,4 @@ static void testCallback (POINTER cb_data) /* Not called at expected time, don't clear the location */ } -} \ No newline at end of file +} diff --git a/tests/timer5.c b/tests/timer5.c index 02ca33c..acf56b1 100644 --- a/tests/timer5.c +++ b/tests/timer5.c @@ -27,8 +27,13 @@ * POSSIBILITY OF SUCH DAMAGE. */ - +#ifndef STAND_ALONE #include +#else +#include +#include +#endif + #include "atom.h" #include "atomsem.h" #include "atomtimer.h" @@ -138,4 +143,4 @@ static void testCallback (POINTER cb_data) { /* Callback was called */ callback_ran_flag = TRUE; -} \ No newline at end of file +} diff --git a/tests/timer6.c b/tests/timer6.c index da7f0da..bb50abf 100644 --- a/tests/timer6.c +++ b/tests/timer6.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtimer.h" @@ -152,4 +158,4 @@ static void testCallback (POINTER cb_data) { /* Callback was called */ *(int *)cb_data = TRUE; -} \ No newline at end of file +} diff --git a/tests/timer7.c b/tests/timer7.c index d2a7e54..2e10731 100644 --- a/tests/timer7.c +++ b/tests/timer7.c @@ -27,6 +27,12 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef STAND_ALONE +#include +#else +#include +#include +#endif #include "atom.h" #include "atomtests.h"