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05bd1987ea
* STAND_ALONE conditional compilation is removed. * Previous interim commits are squashed. * printk.h is included from atomport.h * atom-types.h and atommport-types.h have been removed. Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
59 lines
2.1 KiB
C
59 lines
2.1 KiB
C
/*
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* Copyright (c) 2011, Himanshu Chauhan. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. No personal names or organizations' names associated with the
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* Atomthreads project may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE ATOMTHREADS PROJECT AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <atomport-asm-macros.h>
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#include <atomport.h>
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#include <atom.h>
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void mips_setup_interrupts()
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{
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uint32_t ebase = read_c0_ebase();
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ebase &= ~0x3FFF000UL;
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write_c0_ebase(ebase);
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uint32_t sr = read_c0_status();
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sr &= ~(0x01UL << 22);
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sr &= ~(0x3UL << 1);
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write_c0_status(sr);
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uint32_t cause = read_c0_status();
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cause |= 0x01UL << 23;
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write_c0_cause(cause);
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}
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void mips_enable_global_interrupts(void)
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{
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__asm__ __volatile__ ("ei $0\t\n");
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}
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void mips_disable_global_interrupts(void)
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{
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__asm__ __volatile__("di $0\t\n");
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}
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