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113 lines
4.5 KiB
C
113 lines
4.5 KiB
C
/*
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* Copyright (c) 2011, Anup Patel for Atomthreads Project.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. No personal names or organizations' names associated with the
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* Atomthreads project may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE ATOMTHREADS PROJECT AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "atom.h"
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#include "atomport.h"
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#include "atomport-private.h"
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#include "string.h"
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#include "arm_defines.h"
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/**
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* This function initialises each thread's stack during creation, before the
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* thread is first run. New threads are scheduled in using the same
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* context-switch function used for threads which were previously scheduled
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* out, therefore this function should set up a stack context which looks
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* much like a thread which has been scheduled out and had its context saved.
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* We fill part of the stack with those registers which are involved in the
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* context switch, including appropriate stack or register contents to cause
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* the thread to branch to its entry point function when it is scheduled in.
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*
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* Interrupts should also be enabled whenever a thread is restored, hence
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* ports may wish to explicitly include the interrupt-enable register here
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* which will be restored when the thread is scheduled in. Other methods
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* can be used to enable interrupts, however, without explicitly storing
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* it in the thread's context.
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*/
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void archThreadContextInit (ATOM_TCB *tcb_ptr, void *stack_top,
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void (*entry_point)(UINT32),
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UINT32 entry_param)
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{
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int i;
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pt_regs_t *regs = (pt_regs_t *)((uint32_t)stack_top - sizeof(pt_regs_t));
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tcb_ptr->sp_save_ptr = stack_top;
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regs->cpsr = CPSR_COND_ZERO_MASK |
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CPSR_ASYNC_ABORT_DISABLED | CPSR_MODE_SUPERVISOR;
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regs->gpr[0] = entry_param;
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for (i = 1; i < 13; i++) {
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regs->gpr[i] = 0x0;
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}
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regs->sp = (uint32_t)stack_top - sizeof(pt_regs_t) - 1024;
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regs->lr = (uint32_t)entry_point;
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regs->pc = (uint32_t)entry_point;
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}
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/**
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* archFirstThreadRestore(ATOM_TCB *new_tcb)
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*
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* This function is responsible for restoring and starting the first
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* thread the OS runs. It expects to find the thread context exactly
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* as it would be if a context save had previously taken place on it.
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* The only real difference between this and the archContextSwitch()
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* routine is that there is no previous thread for which context must
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* be saved.
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*
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* The final action this function must do is to restore interrupts.
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*/
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void archFirstThreadRestore(ATOM_TCB *new_tcb)
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{
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pt_regs_t *regs = (pt_regs_t *)((uint32_t)new_tcb->sp_save_ptr
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- sizeof(pt_regs_t));
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archLongJump(regs);
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}
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/**
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* Function that performs the contextSwitch. Whether its a voluntary release
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* of CPU by thread or a pre-emption, under both conditions this function is
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* called. The signature is as follows:
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*
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* archContextSwitch(ATOM_TCB *old_tcb, ATOM_TCB *new_tcb)
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*/
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void archContextSwitch(ATOM_TCB *old_tcb, ATOM_TCB *new_tcb)
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{
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uint32_t tmp = 0x0, lr = 0x0;
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pt_regs_t *old_regs = (pt_regs_t *)((uint32_t)old_tcb->sp_save_ptr
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- sizeof(pt_regs_t));
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pt_regs_t *new_regs = (pt_regs_t *)((uint32_t)new_tcb->sp_save_ptr
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- sizeof(pt_regs_t));
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asm volatile (" mov %0, lr\n\t" :"=r"(lr):);
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if (archSetJump(old_regs, &tmp)) {
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old_regs->lr = lr;
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archLongJump(new_regs);
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}
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}
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