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48 lines
1.2 KiB
ArmAsm
48 lines
1.2 KiB
ArmAsm
.section .vectors, "x"
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.global __interrupt_vector_table
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.extern __irq_stack_top__
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.extern __fiq_stack_top__
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.extern __svc_stack_top__
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.equ USR_MODE, 0x10
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.equ FIQ_MODE, 0x11
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.equ IRQ_MODE, 0x12
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.equ SVC_MODE, 0x13
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.equ ABT_MODE, 0x17
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.equ UND_MODE, 0x1B
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.equ SYS_MODE, 0x1F
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.equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
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.equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */
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__interrupt_vector_table:
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B Reset_Handler /* Reset */
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ldr PC,=null_handler /* Undefined */
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ldr PC,=null_handler /* SWI */
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ldr PC,=null_handler /* Prefetch Abort */
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ldr PC,=null_handler /* Data Abort */
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ldr PC,=null_handler /* reserved */
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ldr PC,=archIRQHandler/* IRQ */
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ldr PC,=null_handler /* FIQ */
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Reset_Handler:
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MSR CPSR_c,#(IRQ_MODE | I_BIT | F_BIT)
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LDR sp,=__irq_stack_top__ /* set the IRQ stack pointer */
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MSR CPSR_c,#(FIQ_MODE | I_BIT | F_BIT)
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LDR sp,=__fiq_stack_top__ /* set the FIQ stack pointer */
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MSR CPSR_c,#(SVC_MODE | I_BIT | F_BIT)
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LDR sp,=__svc_stack_top__ /* set the SVC stack pointer */
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BL low_level_init
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BL _mainCRTStartup
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B .
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