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111 lines
4.6 KiB
C
111 lines
4.6 KiB
C
/*
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* Copyright (c) 2011, Anup Patel. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. No personal names or organizations' names associated with the
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* Atomthreads project may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE ATOMTHREADS PROJECT AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARM_UART_H_
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#define __ARM_UART_H_
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#include <atomport.h>
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/*
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* ARM PrimeCell UART's (PL010 & PL011)
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* ------------------------------------
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*
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* Definitions common to both PL010 & PL011
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*
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*/
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#define UART_PL01x_DR 0x00 /* Data read or written from the interface. */
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#define UART_PL01x_RSR 0x04 /* Receive status register (Read). */
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#define UART_PL01x_ECR 0x04 /* Error clear register (Write). */
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#define UART_PL01x_FR 0x18 /* Flag register (Read only). */
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#define UART_PL01x_RSR_OE 0x08
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#define UART_PL01x_RSR_BE 0x04
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#define UART_PL01x_RSR_PE 0x02
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#define UART_PL01x_RSR_FE 0x01
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#define UART_PL01x_FR_TXFE 0x80
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#define UART_PL01x_FR_RXFF 0x40
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#define UART_PL01x_FR_TXFF 0x20
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#define UART_PL01x_FR_RXFE 0x10
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#define UART_PL01x_FR_BUSY 0x08
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#define UART_PL01x_FR_TMSK (UART_PL01x_FR_TXFF + UART_PL01x_FR_BUSY)
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/*
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* PL011 definitions
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*
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*/
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#define UART_PL011_IBRD 0x24
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#define UART_PL011_FBRD 0x28
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#define UART_PL011_LCRH 0x2C
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#define UART_PL011_CR 0x30
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#define UART_PL011_IMSC 0x38
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#define UART_PL011_PERIPH_ID0 0xFE0
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#define UART_PL011_LCRH_SPS (1 << 7)
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#define UART_PL011_LCRH_WLEN_8 (3 << 5)
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#define UART_PL011_LCRH_WLEN_7 (2 << 5)
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#define UART_PL011_LCRH_WLEN_6 (1 << 5)
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#define UART_PL011_LCRH_WLEN_5 (0 << 5)
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#define UART_PL011_LCRH_FEN (1 << 4)
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#define UART_PL011_LCRH_STP2 (1 << 3)
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#define UART_PL011_LCRH_EPS (1 << 2)
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#define UART_PL011_LCRH_PEN (1 << 1)
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#define UART_PL011_LCRH_BRK (1 << 0)
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#define UART_PL011_CR_CTSEN (1 << 15)
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#define UART_PL011_CR_RTSEN (1 << 14)
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#define UART_PL011_CR_OUT2 (1 << 13)
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#define UART_PL011_CR_OUT1 (1 << 12)
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#define UART_PL011_CR_RTS (1 << 11)
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#define UART_PL011_CR_DTR (1 << 10)
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#define UART_PL011_CR_RXE (1 << 9)
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#define UART_PL011_CR_TXE (1 << 8)
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#define UART_PL011_CR_LPE (1 << 7)
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#define UART_PL011_CR_IIRLP (1 << 2)
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#define UART_PL011_CR_SIREN (1 << 1)
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#define UART_PL011_CR_UARTEN (1 << 0)
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#define UART_PL011_IMSC_OEIM (1 << 10)
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#define UART_PL011_IMSC_BEIM (1 << 9)
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#define UART_PL011_IMSC_PEIM (1 << 8)
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#define UART_PL011_IMSC_FEIM (1 << 7)
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#define UART_PL011_IMSC_RTIM (1 << 6)
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#define UART_PL011_IMSC_TXIM (1 << 5)
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#define UART_PL011_IMSC_RXIM (1 << 4)
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#define UART_PL011_IMSC_DSRMIM (1 << 3)
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#define UART_PL011_IMSC_DCDMIM (1 << 2)
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#define UART_PL011_IMSC_CTSMIM (1 << 1)
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#define UART_PL011_IMSC_RIMIM (1 << 0)
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uint8_t arm_uart_getc(void);
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void arm_uart_putc(uint8_t ch);
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void arm_uart_init(void);
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#endif /* __ARM_UART_H_ */
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