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1. Old pending files cleaned from public repo. 2. Thread_create routines removed from timer_service and kmi_service. 3. Sconstruct of libdev updated.

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This commit is contained in:
Amit Mahajan
2010-03-30 14:44:05 +05:30
parent 92645be6ff
commit 2b340c9f2f
86 changed files with 27 additions and 7113 deletions
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388
src/arch/arm/exception.c
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@@ -1,388 +0,0 @@
/*
* Memory exception handling in process context.
*
* Copyright (C) 2007, 2008 Bahadir Balban
*/
#include <l4/generic/scheduler.h>
#include <l4/generic/thread.h>
#include <l4/api/thread.h>
#include <l4/generic/space.h>
#include <l4/generic/tcb.h>
#include <l4/lib/printk.h>
#include <l4/api/ipc.h>
#include <l4/api/kip.h>
#include <l4/api/errno.h>
#include INC_PLAT(printascii.h)
#include INC_ARCH(exception.h)
#include INC_GLUE(memlayout.h)
#include INC_GLUE(memory.h)
#include INC_GLUE(message.h)
#include INC_GLUE(ipc.h)
#include INC_SUBARCH(mm.h)
/* Abort debugging conditions */
// #define DEBUG_ABORTS
#if defined (DEBUG_ABORTS)
#define dbg_abort(...) dprintk(__VA_ARGS__)
#else
#define dbg_abort(...)
#endif
struct ipc_state {
u32 mr[MR_TOTAL];
unsigned int flags;
};
void ipc_save_state(struct ipc_state *state)
{
unsigned int *mr0_current = KTCB_REF_MR0(current);
BUG_ON(!mr0_current);
/* Save primary message registers */
for (int i = 0; i < MR_TOTAL; i++)
state->mr[i] = mr0_current[i];
/* Save ipc flags */
state->flags = tcb_get_ipc_flags(current);
}
void ipc_restore_state(struct ipc_state *state)
{
unsigned int *mr0_current = KTCB_REF_MR0(current);
BUG_ON(!mr0_current);
/* Restore primary message registers */
for (int i = 0; i < MR_TOTAL; i++)
mr0_current[i] = state->mr[i];
/* Restore ipc flags */
tcb_set_ipc_flags(current, state->flags);
}
/* Send data fault ipc to the faulty task's pager */
int fault_ipc_to_pager(u32 faulty_pc, u32 fsr, u32 far, u32 ipc_tag)
{
int err;
/* mr[0] has the fault tag. The rest is the fault structure */
u32 mr[MR_TOTAL] = {
[MR_TAG] = ipc_tag,
[MR_SENDER] = current->tid
};
fault_kdata_t *fault = (fault_kdata_t *)&mr[MR_UNUSED_START];
/* Fill in fault information to pass over during ipc */
fault->faulty_pc = faulty_pc;
fault->fsr = fsr;
fault->far = far;
/*
* Write pte of the abort address,
* which is different on pabt/dabt
*/
if (is_prefetch_abort(fsr))
fault->pte = virt_to_pte(faulty_pc);
else
fault->pte = virt_to_pte(far);
/*
* System calls save arguments (and message registers)
* on the kernel stack. They are then referenced from
* the caller's ktcb. Here, we forge a fault structure
* as if an ipc syscall has occured. Then the reference
* to the fault structure is set in the ktcb such that
* it lies on the mr0 offset when referred as the syscall
* context.
*/
/*
* Assign fault such that it overlaps
* as the MR0 reference in ktcb.
*/
current->syscall_regs = (syscall_context_t *)
((unsigned long)&mr[0] -
offsetof(syscall_context_t, r3));
/* Set current flags to short ipc */
tcb_set_ipc_flags(current, IPC_FLAGS_SHORT);
/* Detect if a pager is self-faulting */
if (current->tid == current->pagerid) {
printk("Pager (%d) faulted on itself. FSR: 0x%x, FAR: 0x%x, PC: 0x%x Exiting.\n",
current->tid, fault->fsr, fault->far, fault->faulty_pc);
thread_destroy(current);
}
/* Send ipc to the task's pager */
if ((err = ipc_sendrecv(current->pagerid,
current->pagerid, 0)) < 0) {
BUG_ON(current->nlocks);
/* Return on interrupt */
if (err == -EINTR) {
printk("Thread (%d) page-faulted "
"and got interrupted by its pager.\n",
current->tid);
return err;
} else { /* Suspend on any other error */
printk("Thread (%d) faulted in kernel "
"and an error occured during "
"page-fault ipc. err=%d. Suspending task.\n",
current->tid, err);
current->flags |= TASK_SUSPENDING;
sched_suspend_sync();
}
}
return 0;
}
/*
* When a task calls the kernel and the supplied user buffer is
* not mapped, the kernel generates a page fault to the task's
* pager so that the pager can make the decision on mapping the
* buffer. Remember that if a task maps its own user buffer to
* itself this way, the kernel can access it, since it shares
* that task's page table.
*/
int pager_pagein_request(unsigned long addr, unsigned long size,
unsigned int flags)
{
int err;
u32 abort = 0;
unsigned long npages = __pfn(align_up(size, PAGE_SIZE));
struct ipc_state ipc_state;
set_abort_type(abort, ARM_DABT);
// printk("%s: Kernel initiating paging-in requests\n", __FUNCTION__);
/* Save current ipc state */
ipc_save_state(&ipc_state);
/* For every page to be used by the kernel send a page-in request */
for (int i = 0; i < npages; i++)
if ((err = fault_ipc_to_pager(0, abort,
addr + (i * PAGE_SIZE),
L4_IPC_TAG_PFAULT)) < 0)
return err;
/* Restore ipc state */
ipc_restore_state(&ipc_state);
return 0;
}
int check_aborts(u32 faulted_pc, u32 fsr, u32 far)
{
int ret = 0;
if (is_prefetch_abort(fsr)) {
dbg_abort("Prefetch abort @ ", faulted_pc);
return 0;
}
switch (fsr & ARM_FSR_MASK) {
/* Aborts that are expected on page faults: */
case DABT_PERM_PAGE:
dbg_abort("Page permission fault @ ", far);
ret = 0;
break;
case DABT_XLATE_PAGE:
dbg_abort("Page translation fault @ ", far);
ret = 0;
break;
case DABT_XLATE_SECT:
dbg_abort("Section translation fault @ ", far);
ret = 0;
break;
/* Aborts that can't be handled by a pager yet: */
case DABT_TERMINAL:
dprintk("Terminal fault dabt @ ", far);
ret = -EINVAL;
break;
case DABT_VECTOR:
dprintk("Vector abort (obsolete!) @ ", far);
ret = -EINVAL;
break;
case DABT_ALIGN:
dprintk("Alignment fault dabt @ ", far);
ret = -EINVAL;
break;
case DABT_EXT_XLATE_LEVEL1:
dprintk("External LVL1 translation fault @ ", far);
ret = -EINVAL;
break;
case DABT_EXT_XLATE_LEVEL2:
dprintk("External LVL2 translation fault @ ", far);
ret = -EINVAL;
break;
case DABT_DOMAIN_SECT:
dprintk("Section domain fault dabt @ ", far);
ret = -EINVAL;
break;
case DABT_DOMAIN_PAGE:
dprintk("Page domain fault dabt @ ", far);
ret = -EINVAL;
break;
case DABT_PERM_SECT:
dprintk("Section permission fault dabt @ ", far);
ret = -EINVAL;
break;
case DABT_EXT_LFETCH_SECT:
dprintk("External section linefetch fault dabt @ ", far);
ret = -EINVAL;
break;
case DABT_EXT_LFETCH_PAGE:
dprintk("Page perm fault dabt @ ", far);
ret = -EINVAL;
break;
case DABT_EXT_NON_LFETCH_SECT:
dprintk("External section non-linefetch fault dabt @ ", far);
ret = -EINVAL;
break;
case DABT_EXT_NON_LFETCH_PAGE:
dprintk("External page non-linefetch fault dabt @ ", far);
ret = -EINVAL;
break;
default:
dprintk("FATAL: Unrecognised/Unknown data abort @ ", far);
dprintk("FATAL: FSR code: ", fsr);
ret = -EINVAL;
}
return ret;
}
/*
* @r0: The address where the program counter was during the fault.
* @r1: Contains the fault status register
* @r2: Contains the fault address register
*/
void data_abort_handler(u32 faulted_pc, u32 fsr, u32 far)
{
set_abort_type(fsr, ARM_DABT);
dbg_abort("Data abort @ PC: ", faulted_pc);
//printk("Data abort: %d, PC: 0x%x\n", current->tid, faulted_pc);
/* Check for more details */
if (check_aborts(faulted_pc, fsr, far) < 0) {
printascii("This abort can't be handled by any pager.\n");
goto error;
}
if (KERN_ADDR(faulted_pc))
goto error;
/* This notifies the pager */
fault_ipc_to_pager(faulted_pc, fsr, far, L4_IPC_TAG_PFAULT);
if (current->flags & TASK_SUSPENDING) {
BUG_ON(current->nlocks);
sched_suspend_sync();
} else if (current->flags & TASK_EXITING) {
BUG_ON(current->nlocks);
sched_exit_sync();
}
return;
error:
disable_irqs();
dprintk("Unhandled data abort @ PC address: ", faulted_pc);
dprintk("FAR:", far);
dprintk("FSR:", fsr);
printascii("Kernel panic.\n");
printascii("Halting system...\n");
while (1)
;
}
void prefetch_abort_handler(u32 faulted_pc, u32 fsr, u32 far, u32 lr)
{
set_abort_type(fsr, ARM_PABT);
if (check_aborts(faulted_pc, fsr, far) < 0) {
printascii("This abort can't be handled by any pager.\n");
goto error;
}
if (KERN_ADDR(lr))
goto error;
fault_ipc_to_pager(faulted_pc, fsr, far, L4_IPC_TAG_PFAULT);
if (current->flags & TASK_SUSPENDING) {
BUG_ON(current->nlocks);
sched_suspend_sync();
} else if (current->flags & TASK_EXITING) {
BUG_ON(current->nlocks);
sched_exit_sync();
}
return;
error:
disable_irqs();
dprintk("Unhandled prefetch abort @ address: ", faulted_pc);
dprintk("FAR:", far);
dprintk("FSR:", fsr);
dprintk("LR:", lr);
printascii("Kernel panic.\n");
printascii("Halting system...\n");
while (1)
;
}
void undef_handler(u32 undef_addr, u32 spsr, u32 lr)
{
dbg_abort("Undefined instruction @ PC: ", undef_addr);
//printk("Undefined instruction: tid: %d, PC: 0x%x, Mode: %s\n",
// current->tid, undef_addr,
// (spsr & ARM_MODE_MASK) == ARM_MODE_SVC ? "SVC" : "User");
if (KERN_ADDR(lr)) {
printk("Panic: Undef in Kernel\n");
goto error;
}
fault_ipc_to_pager(undef_addr, 0, undef_addr, L4_IPC_TAG_UNDEF_FAULT);
if (current->flags & TASK_SUSPENDING) {
BUG_ON(current->nlocks);
sched_suspend_sync();
} else if (current->flags & TASK_EXITING) {
BUG_ON(current->nlocks);
sched_exit_sync();
}
return;
error:
disable_irqs();
dprintk("SPSR:", spsr);
dprintk("LR:", lr);
printascii("Kernel panic.\n");
printascii("Halting system...\n");
BUG();
}
extern int current_irq_nest_count;
/*
* This is called right where the nest count is increased
* in case the nesting is beyond the predefined max limit.
* It is another matter whether this limit is enough to
* guarantee the kernel stack is not overflown.
*/
void irq_overnest_error(void)
{
dprintk("Irqs nested beyond limit. Current count: ",
current_irq_nest_count);
printascii("Halting system...\n");
while(1)
;
}

43
src/arch/arm/v5/irq.S
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@@ -1,43 +0,0 @@
#include INC_ARCH(asm.h)
/*
* r0 = unsigned long *state, stores current irq state.
*/
BEGIN_PROC(irq_local_disable_save)
mov r1, r0 @ Move address of state to r1
mrs r2, cpsr_fc @ Read cpsr
orr r3, r2, #0x80 @ Disable irq bit in cpsr
msr cpsr_fc, r3 @ Write to cpsr
str r2, [r1] @ Store original cpsr in r2 to state
mov pc, lr
END_PROC(irq_local_disable_save)
/*
* r0 = last cpsr state
*/
BEGIN_PROC(irq_local_restore)
msr cpsr_fc, r0 @ Write r0 to cpsr
mov pc, lr
END_PROC(irq_local_restore)
/*
* r0 = byte address to read from.
*/
BEGIN_PROC(l4_atomic_dest_readb)
mov r1, r0 @ Move byte address to r1
mov r2, #0 @ Move 0 to r2
swpb r0, r2, [r1] @ Write 0 to byte location, while reading its value to r0
mov pc, lr @ Return byte location value
END_PROC(l4_atomic_dest_readb)
BEGIN_PROC(irqs_enabled)
mrs r1, cpsr_fc
tst r1, #0x80
moveq r0, #1
movne r0, #0
mov pc, lr
END_PROC(irqs_enabled)

726
src/arch/arm/v5/mm.c
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@@ -1,726 +0,0 @@
/*
* Copyright (C) 2007 Bahadir Balban
*/
#include <l4/lib/printk.h>
#include <l4/lib/mutex.h>
#include <l4/lib/string.h>
#include <l4/generic/scheduler.h>
#include <l4/generic/space.h>
#include <l4/generic/bootmem.h>
#include <l4/generic/resource.h>
#include <l4/api/errno.h>
#include INC_SUBARCH(mm.h)
#include INC_SUBARCH(mmu_ops.h)
#include INC_GLUE(memory.h)
#include INC_PLAT(printascii.h)
#include INC_GLUE(memlayout.h)
#include INC_ARCH(linker.h)
#include INC_ARCH(asm.h)
#include INC_API(kip.h)
/*
* These are indices into arrays with pgd_t or pmd_t sized elements,
* therefore the index must be divided by appropriate element size
*/
#define PGD_INDEX(x) (((((unsigned long)(x)) >> 18) & 0x3FFC) / sizeof(pgd_t))
/* Strip out the page offset in this megabyte from a total of 256 pages. */
#define PMD_INDEX(x) (((((unsigned long)(x)) >> 10) & 0x3FC) / sizeof (pmd_t))
/*
* Removes initial mappings needed for transition to virtual memory.
* Used one-time only.
*/
void remove_section_mapping(unsigned long vaddr)
{
pgd_table_t *pgd = &init_pgd;;
pgd_t pgd_i = PGD_INDEX(vaddr);
if (!((pgd->entry[pgd_i] & PGD_TYPE_MASK)
& PGD_TYPE_SECTION))
while(1);
pgd->entry[pgd_i] = 0;
pgd->entry[pgd_i] |= PGD_TYPE_FAULT;
arm_invalidate_tlb();
}
/*
* Maps given section-aligned @paddr to @vaddr using enough number
* of section-units to fulfill @size in sections. Note this overwrites
* a mapping if same virtual address was already mapped.
*/
void __add_section_mapping_init(unsigned int paddr,
unsigned int vaddr,
unsigned int size,
unsigned int flags)
{
pte_t *ppte;
unsigned int l1_ptab;
unsigned int l1_offset;
/* 1st level page table address */
l1_ptab = virt_to_phys(&init_pgd);
/* Get the section offset for this vaddr */
l1_offset = (vaddr >> 18) & 0x3FFC;
/* The beginning entry for mapping */
ppte = (unsigned int *)(l1_ptab + l1_offset);
for(int i = 0; i < size; i++) {
*ppte = 0; /* Clear out old value */
*ppte |= paddr; /* Assign physical address */
*ppte |= PGD_TYPE_SECTION; /* Assign translation type */
/* Domain is 0, therefore no writes. */
/* Only kernel access allowed */
*ppte |= (SVC_RW_USR_NONE << SECTION_AP0);
/* Cacheability/Bufferability flags */
*ppte |= flags;
ppte++; /* Next section entry */
paddr += ARM_SECTION_SIZE; /* Next physical section */
}
return;
}
void add_section_mapping_init(unsigned int paddr, unsigned int vaddr,
unsigned int size, unsigned int flags)
{
unsigned int psection;
unsigned int vsection;
/* Align each address to the pages they reside in */
psection = paddr & ~ARM_SECTION_MASK;
vsection = vaddr & ~ARM_SECTION_MASK;
if(size == 0)
return;
__add_section_mapping_init(psection, vsection, size, flags);
return;
}
/* TODO: Make sure to flush tlb entry and caches */
void __add_mapping(unsigned int paddr, unsigned int vaddr,
unsigned int flags, pmd_table_t *pmd)
{
unsigned int pmd_i = PMD_INDEX(vaddr);
pmd->entry[pmd_i] = paddr;
pmd->entry[pmd_i] |= PMD_TYPE_SMALL; /* Small page type */
pmd->entry[pmd_i] |= flags;
/* TODO: Is both required? Investigate */
/* TEST:
* I think cleaning or invalidating the cache is not required,
* because the entries in the cache aren't for the new mapping anyway.
* It's required if a mapping is removed, but not when newly added.
*/
arm_clean_invalidate_cache();
/* TEST: tlb must be flushed because a new mapping is present in page
* tables, and tlb is inconsistent with the page tables */
arm_invalidate_tlb();
}
/* Return whether a pmd associated with @vaddr is mapped on a pgd or not. */
pmd_table_t *pmd_exists(pgd_table_t *pgd, unsigned long vaddr)
{
unsigned int pgd_i = PGD_INDEX(vaddr);
/* Return true if non-zero pgd entry */
switch (pgd->entry[pgd_i] & PGD_TYPE_MASK) {
case PGD_TYPE_COARSE:
return (pmd_table_t *)
phys_to_virt((pgd->entry[pgd_i] &
PGD_COARSE_ALIGN_MASK));
break;
case PGD_TYPE_FAULT:
return 0;
break;
case PGD_TYPE_SECTION:
dprintk("Warning, a section is already mapped "
"where a coarse page mapping is attempted:",
(u32)(pgd->entry[pgd_i]
& PGD_SECTION_ALIGN_MASK));
BUG();
break;
case PGD_TYPE_FINE:
dprintk("Warning, a fine page table is already mapped "
"where a coarse page mapping is attempted:",
(u32)(pgd->entry[pgd_i]
& PGD_FINE_ALIGN_MASK));
printk("Fine tables are unsupported. ");
printk("What is this doing here?");
BUG();
break;
default:
dprintk("Unrecognised pmd type @ pgd index:", pgd_i);
BUG();
break;
}
return 0;
}
/* Convert a virtual address to a pte if it exists in the page tables. */
pte_t virt_to_pte_from_pgd(unsigned long virtual, pgd_table_t *pgd)
{
pmd_table_t *pmd = pmd_exists(pgd, virtual);
if (pmd)
return (pte_t)pmd->entry[PMD_INDEX(virtual)];
else
return (pte_t)0;
}
/* Convert a virtual address to a pte if it exists in the page tables. */
pte_t virt_to_pte(unsigned long virtual)
{
return virt_to_pte_from_pgd(virtual, TASK_PGD(current));
}
unsigned long virt_to_phys_by_pgd(unsigned long vaddr, pgd_table_t *pgd)
{
pte_t pte = virt_to_pte_from_pgd(vaddr, pgd);
return pte & ~PAGE_MASK;
}
unsigned long virt_to_phys_by_task(unsigned long vaddr, struct ktcb *task)
{
return virt_to_phys_by_pgd(vaddr, TASK_PGD(task));
}
void attach_pmd(pgd_table_t *pgd, pmd_table_t *pmd, unsigned int vaddr)
{
u32 pgd_i = PGD_INDEX(vaddr);
u32 pmd_phys = virt_to_phys(pmd);
/* Domain is 0, therefore no writes. */
pgd->entry[pgd_i] = (pgd_t)pmd_phys;
pgd->entry[pgd_i] |= PGD_TYPE_COARSE;
}
/*
* Same as normal mapping but with some boot tweaks.
*/
void add_boot_mapping(unsigned int paddr, unsigned int vaddr,
unsigned int size, unsigned int flags)
{
pmd_table_t *pmd;
pgd_table_t *pgd = &init_pgd;
unsigned int numpages = (size >> PAGE_BITS);
if (size < PAGE_SIZE) {
printascii("Error: Mapping size must be in bytes not pages.\n");
while(1);
}
if (size & PAGE_MASK)
numpages++;
/* Convert generic map flags to pagetable-specific */
BUG_ON(!(flags = space_flags_to_ptflags(flags)));
/* Map all consecutive pages that cover given size */
for (int i = 0; i < numpages; i++) {
/* Check if another mapping already has a pmd attached. */
pmd = pmd_exists(pgd, vaddr);
if (!pmd) {
/*
* If this is the first vaddr in
* this pmd, allocate new pmd
*/
pmd = alloc_boot_pmd();
/* Attach pmd to its entry in pgd */
attach_pmd(pgd, pmd, vaddr);
}
/* Attach paddr to this pmd */
__add_mapping(page_align(paddr),
page_align(vaddr), flags, pmd);
/* Go to the next page to be mapped */
paddr += PAGE_SIZE;
vaddr += PAGE_SIZE;
}
}
/*
* Maps @paddr to @vaddr, covering @size bytes also allocates new pmd if
* necessary. This flavor explicitly supplies the pgd to modify. This is useful
* when modifying userspace of processes that are not currently running. (Only
* makes sense for userspace mappings since kernel mappings are common.)
*/
void add_mapping_pgd(unsigned int paddr, unsigned int vaddr,
unsigned int size, unsigned int flags,
pgd_table_t *pgd)
{
pmd_table_t *pmd;
unsigned int numpages = (size >> PAGE_BITS);
if (size < PAGE_SIZE) {
printascii("Error: Mapping size must be in bytes not pages.\n");
while(1);
}
if (size & PAGE_MASK)
numpages++;
/* Convert generic map flags to pagetable-specific */
BUG_ON(!(flags = space_flags_to_ptflags(flags)));
/* Map all consecutive pages that cover given size */
for (int i = 0; i < numpages; i++) {
/* Check if another mapping already has a pmd attached. */
pmd = pmd_exists(pgd, vaddr);
if (!pmd) {
/*
* If this is the first vaddr in
* this pmd, allocate new pmd
*/
pmd = alloc_pmd();
/* Attach pmd to its entry in pgd */
attach_pmd(pgd, pmd, vaddr);
}
/* Attach paddr to this pmd */
__add_mapping(page_align(paddr),
page_align(vaddr), flags, pmd);
/* Go to the next page to be mapped */
paddr += PAGE_SIZE;
vaddr += PAGE_SIZE;
}
}
void add_mapping(unsigned int paddr, unsigned int vaddr,
unsigned int size, unsigned int flags)
{
add_mapping_pgd(paddr, vaddr, size, flags, TASK_PGD(current));
}
/*
* Checks if a virtual address range has same or more permissive
* flags than the given ones, returns 0 if not, and 1 if OK.
*/
int check_mapping_pgd(unsigned long vaddr, unsigned long size,
unsigned int flags, pgd_table_t *pgd)
{
unsigned int npages = __pfn(align_up(size, PAGE_SIZE));
pte_t pte;
/* Convert generic map flags to pagetable-specific */
BUG_ON(!(flags = space_flags_to_ptflags(flags)));
for (int i = 0; i < npages; i++) {
pte = virt_to_pte_from_pgd(vaddr + i * PAGE_SIZE, pgd);
/* Check if pte perms are equal or gt given flags */
if ((pte & PTE_PROT_MASK) >= (flags & PTE_PROT_MASK))
continue;
else
return 0;
}
return 1;
}
int check_mapping(unsigned long vaddr, unsigned long size,
unsigned int flags)
{
return check_mapping_pgd(vaddr, size, flags, TASK_PGD(current));
}
/* FIXME: Empty PMDs should be returned here !!! */
int __remove_mapping(pmd_table_t *pmd, unsigned long vaddr)
{
pmd_t pmd_i = PMD_INDEX(vaddr);
int ret;
switch (pmd->entry[pmd_i] & PMD_TYPE_MASK) {
case PMD_TYPE_FAULT:
ret = -ENOENT;
break;
case PMD_TYPE_LARGE:
pmd->entry[pmd_i] = 0;
pmd->entry[pmd_i] |= PMD_TYPE_FAULT;
ret = 0;
break;
case PMD_TYPE_SMALL:
pmd->entry[pmd_i] = 0;
pmd->entry[pmd_i] |= PMD_TYPE_FAULT;
ret = 0;
break;
default:
printk("Unknown page mapping in pmd. Assuming bug.\n");
BUG();
}
return ret;
}
/*
* Tell if a pgd index is a common kernel index. This is used to distinguish
* common kernel entries in a pgd, when copying page tables.
*/
int is_kern_pgdi(int i)
{
if ((i >= PGD_INDEX(KERNEL_AREA_START) && i < PGD_INDEX(KERNEL_AREA_END)) ||
(i >= PGD_INDEX(IO_AREA_START) && i < PGD_INDEX(IO_AREA_END)) ||
(i == PGD_INDEX(USER_KIP_PAGE)) ||
(i == PGD_INDEX(ARM_HIGH_VECTOR)) ||
(i == PGD_INDEX(ARM_SYSCALL_VECTOR)) ||
(i == PGD_INDEX(USERSPACE_CONSOLE_VIRTUAL)))
return 1;
else
return 0;
}
/*
* Removes all userspace mappings from a pgd. Frees any pmds that it
* detects to be user pmds
*/
int remove_mapping_pgd_all_user(pgd_table_t *pgd)
{
pmd_table_t *pmd;
/* Traverse through all pgd entries */
for (int i = 0; i < PGD_ENTRY_TOTAL; i++) {
/* Detect a pgd entry that is not a kernel entry */
if (!is_kern_pgdi(i)) {
/* Detect a pmd entry */
if (((pgd->entry[i] & PGD_TYPE_MASK)
== PGD_TYPE_COARSE)) {
/* Obtain the user pmd handle */
pmd = (pmd_table_t *)
phys_to_virt((pgd->entry[i] &
PGD_COARSE_ALIGN_MASK));
/* Free it */
free_pmd(pmd);
}
/* Clear the pgd entry */
pgd->entry[i] = PGD_TYPE_FAULT;
}
}
return 0;
}
int remove_mapping_pgd(unsigned long vaddr, pgd_table_t *pgd)
{
pgd_t pgd_i = PGD_INDEX(vaddr);
pmd_table_t *pmd;
pmd_t pmd_i;
int ret;
/*
* Clean the cache to main memory before removing the mapping. Otherwise
* entries in the cache for this mapping will cause tranlation faults
* if they're cleaned to main memory after the mapping is removed.
*/
arm_clean_invalidate_cache();
/* TEST:
* Can't think of a valid reason to flush tlbs here, but keeping it just
* to be safe. REMOVE: Remove it if it's unnecessary.
*/
arm_invalidate_tlb();
/* Return true if non-zero pgd entry */
switch (pgd->entry[pgd_i] & PGD_TYPE_MASK) {
case PGD_TYPE_COARSE:
// printk("Removing coarse mapping @ 0x%x\n", vaddr);
pmd = (pmd_table_t *)
phys_to_virt((pgd->entry[pgd_i]
& PGD_COARSE_ALIGN_MASK));
pmd_i = PMD_INDEX(vaddr);
ret = __remove_mapping(pmd, vaddr);
break;
case PGD_TYPE_FAULT:
ret = -ENOMAP;
break;
case PGD_TYPE_SECTION:
printk("Removing section mapping for 0x%lx",
vaddr);
pgd->entry[pgd_i] = 0;
pgd->entry[pgd_i] |= PGD_TYPE_FAULT;
ret = 0;
break;
case PGD_TYPE_FINE:
printk("Table mapped is a fine page table.\n"
"Fine tables are unsupported. Assuming bug.\n");
BUG();
break;
default:
dprintk("Unrecognised pmd type @ pgd index:", pgd_i);
printk("Assuming bug.\n");
BUG();
break;
}
/* The tlb must be invalidated here because it might have cached the
* old translation for this mapping. */
arm_invalidate_tlb();
return ret;
}
int remove_mapping(unsigned long vaddr)
{
return remove_mapping_pgd(vaddr, TASK_PGD(current));
}
int delete_page_tables(struct address_space *space)
{
remove_mapping_pgd_all_user(space->pgd);
free_pgd(space->pgd);
return 0;
}
/*
* Copies userspace entries of one task to another. In order to do that,
* it allocates new pmds and copies the original values into new ones.
*/
int copy_user_tables(struct address_space *new, struct address_space *orig_space)
{
pgd_table_t *to = new->pgd, *from = orig_space->pgd;
pmd_table_t *pmd, *orig;
/* Allocate and copy all pmds that will be exclusive to new task. */
for (int i = 0; i < PGD_ENTRY_TOTAL; i++) {
/* Detect a pmd entry that is not a kernel pmd? */
if (!is_kern_pgdi(i) &&
((from->entry[i] & PGD_TYPE_MASK) == PGD_TYPE_COARSE)) {
/* Allocate new pmd */
if (!(pmd = alloc_pmd()))
goto out_error;
/* Find original pmd */
orig = (pmd_table_t *)
phys_to_virt((from->entry[i] &
PGD_COARSE_ALIGN_MASK));
/* Copy original to new */
memcpy(pmd, orig, sizeof(pmd_table_t));
/* Replace original pmd entry in pgd with new */
to->entry[i] = (pgd_t)virt_to_phys(pmd);
to->entry[i] |= PGD_TYPE_COARSE;
}
}
return 0;
out_error:
/* Find all non-kernel pmds we have just allocated and free them */
for (int i = 0; i < PGD_ENTRY_TOTAL; i++) {
/* Non-kernel pmd that has just been allocated. */
if (!is_kern_pgdi(i) &&
(to->entry[i] & PGD_TYPE_MASK) == PGD_TYPE_COARSE) {
/* Obtain the pmd handle */
pmd = (pmd_table_t *)
phys_to_virt((to->entry[i] &
PGD_COARSE_ALIGN_MASK));
/* Free pmd */
free_pmd(pmd);
}
}
return -ENOMEM;
}
int pgd_count_pmds(pgd_table_t *pgd)
{
int npmd = 0;
for (int i = 0; i < PGD_ENTRY_TOTAL; i++)
if ((pgd->entry[i] & PGD_TYPE_MASK) == PGD_TYPE_COARSE)
npmd++;
return npmd;
}
/*
* Allocates and copies all levels of page tables from one task to another.
* Useful when forking.
*
* The copied page tables end up having shared pmds for kernel entries
* and private copies of same pmds for user entries.
*/
pgd_table_t *copy_page_tables(pgd_table_t *from)
{
pmd_table_t *pmd, *orig;
pgd_table_t *pgd;
/* Allocate and copy pgd. This includes all kernel entries */
if (!(pgd = alloc_pgd()))
return PTR_ERR(-ENOMEM);
/* First copy whole pgd entries */
memcpy(pgd, from, sizeof(pgd_table_t));
/* Allocate and copy all pmds that will be exclusive to new task. */
for (int i = 0; i < PGD_ENTRY_TOTAL; i++) {
/* Detect a pmd entry that is not a kernel pmd? */
if (!is_kern_pgdi(i) &&
((pgd->entry[i] & PGD_TYPE_MASK) == PGD_TYPE_COARSE)) {
/* Allocate new pmd */
if (!(pmd = alloc_pmd()))
goto out_error;
/* Find original pmd */
orig = (pmd_table_t *)
phys_to_virt((pgd->entry[i] &
PGD_COARSE_ALIGN_MASK));
/* Copy original to new */
memcpy(pmd, orig, sizeof(pmd_table_t));
/* Replace original pmd entry in pgd with new */
pgd->entry[i] = (pgd_t)virt_to_phys(pmd);
pgd->entry[i] |= PGD_TYPE_COARSE;
}
}
return pgd;
out_error:
/* Find all allocated non-kernel pmds and free them */
for (int i = 0; i < PGD_ENTRY_TOTAL; i++) {
/* Non-kernel pmd that has just been allocated. */
if (!is_kern_pgdi(i) &&
(pgd->entry[i] & PGD_TYPE_MASK) == PGD_TYPE_COARSE) {
/* Obtain the pmd handle */
pmd = (pmd_table_t *)
phys_to_virt((pgd->entry[i] &
PGD_COARSE_ALIGN_MASK));
/* Free pmd */
free_pmd(pmd);
}
}
/* Free the pgd */
free_pgd(pgd);
return PTR_ERR(-ENOMEM);
}
extern pmd_table_t *pmd_array;
/*
* Jumps from boot pmd/pgd page tables to tables allocated from the cache.
*/
pgd_table_t *realloc_page_tables(void)
{
pgd_table_t *pgd_new = alloc_pgd();
pgd_table_t *pgd_old = &init_pgd;
pmd_table_t *orig, *pmd;
/* Copy whole pgd entries */
memcpy(pgd_new, pgd_old, sizeof(pgd_table_t));
/* Allocate and copy all pmds */
for (int i = 0; i < PGD_ENTRY_TOTAL; i++) {
/* Detect a pmd entry */
if ((pgd_old->entry[i] & PGD_TYPE_MASK) == PGD_TYPE_COARSE) {
/* Allocate new pmd */
if (!(pmd = alloc_pmd())) {
printk("FATAL: PMD allocation "
"failed during system initialization\n");
BUG();
}
/* Find original pmd */
orig = (pmd_table_t *)
phys_to_virt((pgd_old->entry[i] &
PGD_COARSE_ALIGN_MASK));
/* Copy original to new */
memcpy(pmd, orig, sizeof(pmd_table_t));
/* Replace original pmd entry in pgd with new */
pgd_new->entry[i] = (pgd_t)virt_to_phys(pmd);
pgd_new->entry[i] |= PGD_TYPE_COARSE;
}
}
/* Switch the virtual memory system into new area */
arm_clean_invalidate_cache();
arm_drain_writebuffer();
arm_invalidate_tlb();
arm_set_ttb(virt_to_phys(pgd_new));
arm_invalidate_tlb();
printk("%s: Initial page tables moved from 0x%x to 0x%x physical\n",
__KERNELNAME__, virt_to_phys(pgd_old),
virt_to_phys(pgd_new));
return pgd_new;
}
/*
* Useful for upgrading to page-grained control over a section mapping:
* Remaps a section mapping in pages. It allocates a pmd, (at all times because
* there can't really be an already existing pmd for a section mapping) fills
* in the page information, and origaces the direct section physical translation
* with the address of the pmd. Flushes the caches/tlbs.
*/
void remap_as_pages(void *vstart, void *vend)
{
unsigned long pstart = virt_to_phys(vstart);
unsigned long pend = virt_to_phys(vend);
unsigned long paddr = pstart;
pgd_t pgd_i = PGD_INDEX(vstart);
pmd_t pmd_i = PMD_INDEX(vstart);
pgd_table_t *pgd = &init_pgd;
pmd_table_t *pmd = alloc_boot_pmd();
u32 pmd_phys = virt_to_phys(pmd);
int numpages = __pfn(pend - pstart);
/* Fill in the pmd first */
for (int n = 0; n < numpages; n++) {
pmd->entry[pmd_i + n] = paddr;
pmd->entry[pmd_i + n] |= PMD_TYPE_SMALL; /* Small page type */
pmd->entry[pmd_i + n] |= space_flags_to_ptflags(MAP_SVC_DEFAULT_FLAGS);
paddr += PAGE_SIZE;
}
/* Fill in the type to produce a complete pmd translator information */
pmd_phys |= PGD_TYPE_COARSE;
/* Make sure memory is coherent first. */
arm_clean_invalidate_cache();
arm_invalidate_tlb();
/* Replace the direct section physical address with pmd's address */
pgd->entry[pgd_i] = (pgd_t)pmd_phys;
printk("%s: Kernel area 0x%lx - 0x%lx remapped as %d pages\n", __KERNELNAME__,
(unsigned long)vstart, (unsigned long)vend, numpages);
}
void copy_pgds_by_vrange(pgd_table_t *to, pgd_table_t *from,
unsigned long start, unsigned long end)
{
unsigned long start_i = PGD_INDEX(start);
unsigned long end_i = PGD_INDEX(end);
unsigned long irange = (end_i != 0) ? (end_i - start_i)
: (PGD_ENTRY_TOTAL - start_i);
memcpy(&to->entry[start_i], &from->entry[start_i],
irange * sizeof(pgd_t));
}
/* Scheduler uses this to switch context */
void arch_hardware_flush(pgd_table_t *pgd)
{
arm_clean_invalidate_cache();
arm_invalidate_tlb();
arm_set_ttb(virt_to_phys(pgd));
arm_invalidate_tlb();
}

90
src/arch/arm/v5/mutex.S
View File

@@ -1,90 +0,0 @@
/*
* ARM v5 Binary semaphore (mutex) implementation.
*
* Copyright (C) 2007 Bahadir Balban
*
*/
#include INC_ARCH(asm.h)
/* Recap on swp:
* swp rx, ry, [rz]
* In one instruction:
* 1) Stores the value in ry into location pointed by rz.
* 2) Loads the value in the location of rz into rx.
* By doing so, in one instruction one can attempt to lock
* a word, and discover whether it was already locked.
*/
#define MUTEX_UNLOCKED 0
#define MUTEX_LOCKED 1
BEGIN_PROC(__spin_lock)
mov r1, #1
__spin:
swp r2, r1, [r0]
cmp r2, #0
bne __spin
mov pc, lr
END_PROC(__spin_lock)
BEGIN_PROC(__spin_unlock)
mov r1, #0
swp r2, r1, [r0]
cmp r2, #1 @ Debug check.
1:
bne 1b
mov pc, lr
END_PROC(__spin_unlock)
/*
* @r0: Address of mutex location.
*/
BEGIN_PROC(__mutex_lock)
mov r1, #1
swp r2, r1, [r0]
cmp r2, #0
movne r0, #0
moveq r0, #1
mov pc, lr
END_PROC(__mutex_lock)
/*
* @r0: Address of mutex location.
*/
BEGIN_PROC(__mutex_unlock)
mov r1, #0
swp r2, r1, [r0]
cmp r2, #1
1: @ Debug check.
bne 1b
mov pc, lr
END_PROC(__mutex_unlock)
/*
* @r0: Address of mutex location.
*/
BEGIN_PROC(__mutex_inc)
swp r2, r1, [r0]
mov r1, #1
swp r2, r1, [r0]
cmp r2, #0
movne r0, #0
moveq r0, #1
mov pc, lr
END_PROC(__mutex_inc)
/*
* @r0: Address of mutex location.
*/
BEGIN_PROC(__mutex_dec)
mov r1, #0
swp r2, r1, [r0]
cmp r2, #1
1: @ Debug check.
bne 1b
mov pc, lr
END_PROC(__mutex_dec)

115
src/drivers/timer/sp804/sp804_timer.c
View File

@@ -1,115 +0,0 @@
/*
* SP804 Primecell Timer driver
*
* Copyright (C) 2007 Bahadir Balban
*/
#include <l4/drivers/timer/sp804/sp804_timer.h>
#include INC_PLAT(irq.h)
/* FIXME: Fix the shameful uart driver and change to single definition of this! */
#if defined(read)
#undef read
#endif
#if defined(write)
#undef write
#endif
#define read(a) *((volatile unsigned int *)(a))
#define write(v, a) (*((volatile unsigned int *)(a)) = v)
#define setbit(bit, a) write(read(a) | bit, a)
#define clrbit(bit, a) write(read(a) & ~bit, a)
#define devio(base, reg, bit, setclr) ((setclr) ? setbit(bit, base + reg) \
: clrbit(bit, base + reg))
void sp804_irq_handler(unsigned int timer_base)
{
/*
* Timer enabled as Periodic/Wrapper only needs irq clearing
* as it automatically reloads and wraps
*/
write(1, (timer_base + SP804_TIMERINTCLR));
}
static inline void sp804_control(unsigned int timer_base, int bit, int setclr)
{
unsigned long addr = (timer_base + SP804_TIMERCONTROL);
setclr ? setbit(bit, addr) : clrbit(bit, addr);
}
/*
* Sets timer's run mode:
* @periodic: periodic mode = 1, free-running = 0.
*/
#define SP804_PEREN (1 << 6)
static inline void sp804_set_runmode(unsigned int timer_base, int periodic)
{
sp804_control(timer_base, SP804_PEREN, periodic);
}
/*
* Sets timer's wrapping mode:
* @oneshot: oneshot = 1, wrapping = 0.
*/
#define SP804_ONESHOT (1 << 0)
static inline void sp804_set_wrapmode(unsigned int timer_base, int oneshot)
{
sp804_control(timer_base, SP804_ONESHOT, oneshot);
}
/*
* Sets the operational width of timers.
* In 16bit mode, top halfword is ignored.
* @width: 32bit mode = 1; 16bit mode = 0
*/
#define SP804_32BIT (1 << 1)
static inline void sp804_set_widthmode(unsigned int timer_base, int width)
{
sp804_control(timer_base, SP804_32BIT, width);
}
/*
* Enable/disable timer:
* @enable: enable = 1, disable = 0;
*/
#define SP804_ENABLE (1 << 7)
void sp804_enable(unsigned int timer_base, int enable)
{
sp804_control(timer_base, SP804_ENABLE, enable);
}
/*
* Enable/disable local irq register:
* @enable: enable = 1, disable = 0
*/
#define SP804_IRQEN (1 << 5)
void sp804_set_irq(unsigned int timer_base, int enable)
{
sp804_control(timer_base, SP804_IRQEN, enable);
}
/* Loads timer with value in val */
static inline void sp804_load_value(unsigned int timer_base, u32 val)
{
write(val, (timer_base + SP804_TIMERLOAD));
}
/* Returns current timer value */
static inline u32 sp804_read_value(unsigned int timer_base)
{
return read(timer_base + SP804_TIMERVALUE);
}
/* TODO: Define macro values for duration */
void sp804_init(unsigned int timer_base, int run_mode, int wrap_mode, \
int width, int irq_enable)
{
/* 1 tick per usec */
const int duration = 250;
sp804_set_runmode(timer_base, run_mode); /* Periodic */
sp804_set_wrapmode(timer_base, wrap_mode); /* Wrapping */
sp804_set_widthmode(timer_base, width); /* 32 bit */
sp804_set_irq(timer_base, irq_enable); /* Enable */
sp804_load_value(timer_base, duration);
}

264
src/drivers/uart/pl011/pl011_uart.c
View File

@@ -1,264 +0,0 @@
/*
* PL011 Primecell UART driver
*
* Copyright (C) 2007 Bahadir Balban
*/
#include <l4/drivers/uart/pl011/pl011_uart.h>
#include <l4/lib/bit.h>
#include INC_PLAT(platform.h)
struct pl011_uart uart;
/* UART-specific internal error codes.
* TODO: Replace them when generic error codes are in place */
#define PL011_ERROR 1
#define PL011_EAGAIN 2
/* Error status bits in receive status register */
#define PL011_FE (1 << 0)
#define PL011_PE (1 << 1)
#define PL011_BE (1 << 2)
#define PL011_OE (1 << 3)
/* Status bits in flag register */
#define PL011_TXFE (1 << 7)
#define PL011_RXFF (1 << 6)
#define PL011_TXFF (1 << 5)
#define PL011_RXFE (1 << 4)
#define PL011_BUSY (1 << 3)
#define PL011_DCD (1 << 2)
#define PL011_DSR (1 << 1)
#define PL011_CTS (1 << 0)
int pl011_tx_char(unsigned int uart_base, char c)
{
unsigned int val = 0;
read(val, (uart_base + PL011_UARTFR));
if(val & PL011_TXFF) {
/* TX FIFO Full */
return -PL011_EAGAIN;
}
write(c, (uart_base + PL011_UARTDR));
return 0;
}
int pl011_rx_char(unsigned int uart_base, char * c)
{
unsigned int data;
unsigned int val = 0;
read(val, (uart_base + PL011_UARTFR));
if(val & PL011_RXFE) {
/* RX FIFO Empty */
return -PL011_EAGAIN;
}
read(data, (uart_base + PL011_UARTDR));
*c = (char) data;
if((data >> 8) & 0xF) {
/* There were errors, signal error */
return -1;
}
return 0;
}
/*
* Sets the baud rate in kbps. It is recommended to use
* standard rates such as: 1200, 2400, 3600, 4800, 7200,
* 9600, 14400, 19200, 28800, 38400, 57600 76800, 115200.
*/
void pl011_set_baudrate(unsigned int uart_base, unsigned int baud, \
unsigned int clkrate)
{
const unsigned int uartclk = 24000000; /* 24Mhz clock fixed on pb926 */
unsigned int val = 0;
unsigned int ipart = 0, fpart = 0;
/* Use default pb926 rate if no rate is supplied */
if(clkrate == 0)
clkrate = uartclk;
if(baud > 115200 || baud < 1200)
baud = 38400; /* Default rate. */
/* 24000000 / (16 * 38400) */
ipart = 39;
write(ipart, (uart_base + PL011_UARTIBRD));
write(fpart, (uart_base + PL011_UARTFBRD));
/*
* For the IBAUD and FBAUD to update, we need to
* write to UARTLCR_H because the 3 registers are
* actually part of a single register in hardware
* which only updates by a write to UARTLCR_H
*/
read(val, (uart_base + PL011_UARTLCR_H));
write(val, (uart_base + PL011_UARTLCR_H));
return;
}
/* Masks the irqs given in the flags bitvector. */
void pl011_set_irq_mask(unsigned int uart_base, unsigned int flags)
{
unsigned int val = 0;
if(flags > 0x3FF) {
/* Invalid irqmask bitvector */
return;
}
read(val, (uart_base + PL011_UARTIMSC));
val |= flags;
write(val, (uart_base + PL011_UARTIMSC));
return;
}
/* Clears the irqs given in flags from masking */
void pl011_clr_irq_mask(unsigned int uart_base, unsigned int flags)
{
unsigned int val = 0;
if(flags > 0x3FF) {
/* Invalid irqmask bitvector */
return;
}
read(val, (uart_base + PL011_UARTIMSC));
val &= ~flags;
write(val, (uart_base + PL011_UARTIMSC));
return;
}
/*
* Produces 1 character from data register and appends it into
* rx buffer keeps record of timeout errors if one occurs.
*/
void pl011_rx_irq_handler(struct pl011_uart * uart, unsigned int flags)
{
/*
* Currently we do nothing for uart irqs, because there's no external
* client to send/receive data (e.g. userspace processes kernel threads).
*/
return;
}
/* Consumes 1 character from tx buffer and attempts to transmit it */
void pl011_tx_irq_handler(struct pl011_uart * uart, unsigned int flags)
{
/*
* Currently we do nothing for uart irqs, because there's no external
* client to send/receive data (e.g. userspace processes kernel threads).
*/
return;
}
/* Updates error counts and exits. Does nothing to recover errors */
void pl011_error_irq_handler(struct pl011_uart * uart, unsigned int flags)
{
if(flags & PL011_FEIRQ) {
uart->frame_errors++;
}
if(flags & PL011_PEIRQ) {
uart->parity_errors++;
}
if(flags & PL011_BEIRQ) {
uart->break_errors++;
}
if(flags & PL011_OEIRQ) {
uart->overrun_errors++;
}
return;
}
void (* pl011_handlers[]) (struct pl011_uart *, unsigned int) = {
0, /* Modem RI */
0, /* Modem CTS */
0, /* Modem DCD */
0, /* Modem DSR */
&pl011_rx_irq_handler, /* Rx */
&pl011_tx_irq_handler, /* Tx */
&pl011_rx_irq_handler, /* Rx timeout */
&pl011_error_irq_handler, /* Framing error */
&pl011_error_irq_handler, /* Parity error */
&pl011_error_irq_handler, /* Break error */
&pl011_error_irq_handler /* Overrun error */
};
/* UART main entry for irq handling. It redirects actual
* handling to handlers relevant to the irq that has occured.
*/
void pl011_irq_handler(struct pl011_uart * uart)
{
unsigned int val;
int handler_index;
void (* handler)(struct pl011_uart *, unsigned int);
val = pl011_read_irqstat(uart->base);
handler_index = 32 - __clz(val);
if(!handler_index) { /* No irq */
return;
}
/* Jump to right handler */
handler = (void (*) (struct pl011_uart *, unsigned int))
pl011_handlers[handler_index];
/* If a handler is available, call it */
if(handler)
(*handler)(uart, val);
return;
}
void pl011_initialise_driver(void)
{
pl011_initialise_device(&uart);
}
/* Initialises the uart class data structures, and the device.
* Terminal-like operation is assumed for default settings.
*/
int pl011_initialise_device(struct pl011_uart * uart)
{
uart->frame_errors = 0;
uart->parity_errors = 0;
uart->break_errors = 0;
uart->overrun_errors = 0;
/* Initialise data register for 8 bit data read/writes */
pl011_set_word_width(uart->base, 8);
/*
* Fifos are disabled because by default it is assumed the port
* will be used as a user terminal, and in that case the typed
* characters will only show up when fifos are flushed, rather than
* when each character is typed. We avoid this by not using fifos.
*/
pl011_disable_fifos(uart->base);
/* Set default baud rate of 38400 */
pl011_set_baudrate(uart->base, 38400, 24000000);
/* Set default settings of 1 stop bit, no parity, no hw flow ctrl */
pl011_set_stopbits(uart->base, 1);
pl011_parity_disable(uart->base);
/* Install the irq handler */
/* TODO: INSTALL IT HERE */
/* Enable all irqs */
pl011_clr_irq_mask(uart->base, 0x3FF);
/* Enable rx, tx, and uart chip */
pl011_tx_enable(uart->base);
pl011_rx_enable(uart->base);
pl011_uart_enable(uart->base);
return 0;
}

121
src/platform/pb926/printascii.S
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@@ -1,121 +0,0 @@
/*
* Basic UART printing.
*/
#include INC_ARCH(asm.h)
#include INC_GLUE(memlayout.h)
#include INC_PLAT(offsets.h)
#include INC_SUBARCH(mm.h)
#define UART_DATA_OFFSET 0x0
#define UART0_PHYS_BASE PB926_UART0_BASE
#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000)
#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000)
#define UART0_PHYS_BYTE3_4 (UART0_PHYS_BASE & 0x0000FFFF)
#define UART0_VIRT_BASE PLATFORM_CONSOLE_VIRTUAL
#define UART0_VIRT_BYTE1 (UART0_VIRT_BASE & 0xFF000000)
#define UART0_VIRT_BYTE2 (UART0_VIRT_BASE & 0x00FF0000)
#define UART0_VIRT_BYTE3_4 (UART0_VIRT_BASE & 0x0000FFFF)
.macro uart_address rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #UART0_PHYS_BYTE1
orreq \rx, #UART0_PHYS_BYTE2
orreq \rx, #UART0_PHYS_BYTE3_4
movne \rx, #UART0_VIRT_BYTE1
orrne \rx, #UART0_VIRT_BYTE2
orrne \rx, #UART0_VIRT_BYTE3_4
.endm
.macro uart_send, ry, rx
strb \ry, [\rx, #UART_DATA_OFFSET]
.endm
.macro uart_wait, ry, rx
501:
ldr \ry, [\rx, #0x18]
tst \ry, #1 << 5
bne 501b
.endm
.macro uart_busy, ry, rx
501:
ldr \ry, [\rx, #0x18]
tst \ry, #1 << 3
bne 501b
.endm
.text
/*
* Useful debugging routines
*/
BEGIN_PROC(printhex8)
mov r1, #8
b printhex
BEGIN_PROC(printhex4)
mov r1, #4
b printhex
BEGIN_PROC(printhex2)
mov r1, #2
printhex: adr r2, hexbuf
@printhex: ldr r2, =hexbuf
add r3, r2, r1
mov r1, #0
strb r1, [r3]
1: and r1, r0, #15
mov r0, r0, lsr #4
cmp r1, #10
addlt r1, r1, #'0'
addge r1, r1, #'a' - 10
strb r1, [r3, #-1]!
teq r3, r2
bne 1b
mov r0, r2
b printascii
.ltorg
.align
@ vmem-linked image has strings in vmem addresses. This replaces
@ the reference with corresponding physical address. Note this
@ won't work if memory offsets aren't clear cut values for
@ orr'ing and bic'ing. rm = mmu bits rs = string address.
.macro get_straddr rs, rm
mrc p15, 0, \rm, c1, c0 @ Get MMU bits.
tst \rm, #1 @ MMU enabled?
@subeq \rs, \rs, #KERNEL_AREA_START
biceq \rs, \rs, #KERNEL_AREA_START @ Clear Virtual mem offset.
@orreq \rs, \rs, #PHYS_ADDR_BASE @ Add Phy mem offset.
.endm
BEGIN_PROC(printascii)
get_straddr r0, r1
uart_address r3
b 2f
1: uart_wait r2, r3
uart_send r1, r3
uart_busy r2, r3
teq r1, #'\n'
moveq r1, #'\r'
beq 1b
2: teq r0, #0
ldrneb r1, [r0], #1
teqne r1, #0
bne 1b
mov pc, lr
END_PROC(printascii)
BEGIN_PROC(printch)
uart_address r3
mov r1, r0
mov r0, #0
b 1b
hexbuf: .space 16

34
src/platform/pb926/timer.c
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@@ -1,34 +0,0 @@
/*
* Ties up platform timer with generic timer api
*
* Copyright (C) 2007 Bahadir Balban
*
*/
#include <l4/generic/irq.h>
#include <l4/generic/platform.h>
#include INC_PLAT(platform.h)
#include <l4/drivers/timer/sp804/sp804_timer.h>
#include <l4/drivers/misc/sp810/sp810_sysctrl.h>
/* Microkernel is using TIMER0, so we will initialize only this one */
void timer_init(void)
{
/* Set frequency of timer to 1MHz */
sp810_set_timclk(PLATFORM_TIMER0, 1);
/* Initialise timer */
sp804_init(PLATFORM_TIMER0_VIRTUAL, SP804_TIMER_RUNMODE_PERIODIC, \
SP804_TIMER_WRAPMODE_WRAPPING, SP804_TIMER_WIDTH32BIT, \
SP804_TIMER_IRQENABLE);
}
/* Microkernel is using TIMER0, so we will initialize only this one */
void timer_start(void)
{
/* Enable irq line for TIMER0 */
irq_enable(IRQ_TIMER0);
/* Enable timer */
sp804_enable(PLATFORM_TIMER0_VIRTUAL, 1);
}

29
src/platform/pb926/uart.c
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@@ -1,29 +0,0 @@
/*
* Ties up platform's uart driver functions with generic API
*
* Copyright (C) 2007 Bahadir Balban
*/
#include <l4/generic/platform.h>
#include INC_PLAT(platform.h)
#include <l4/drivers/uart/pl011/pl011_uart.h>
extern struct pl011_uart uart;
void uart_init()
{
/* We are using UART0 for kernel */
uart.base = PLATFORM_CONSOLE_VIRTUAL;
pl011_initialise_device(&uart);
}
/* Generic uart function that lib/putchar.c expects to see implemented */
void uart_putc(char c)
{
int res;
/* Platform specific uart implementation */
do {
res = pl011_tx_char(uart.base, c);
} while (res < 0);
}