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Changes to platform device handling, irqs, userspace device configuration

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Revised irq handling and device address naming on internal devices.
This commit is contained in:
Bahadir Balban
2009-11-29 18:11:08 +02:00
parent fa660514df
commit 346d79c0cd
21 changed files with 267 additions and 157 deletions
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7
include/l4/drivers/irq/pl190/pl190_vic.h
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@@ -11,8 +11,10 @@
#include INC_PLAT(platform.h)
#include INC_ARCH(types.h)
#define PL190_BASE PLATFORM_IRQCTRL_BASE
#define PL190_SIC_BASE PLATFORM_SIRQCTRL_BASE
#define PL190_BASE PLATFORM_IRQCTRL0_VIRTUAL
#define PL190_SIC_BASE PLATFORM_IRQCTRL1_VIRTUAL
#define PL190_IRQS_MAX 32
/* VIC register offsets */
#define PL190_VIC_IRQSTATUS (PL190_BASE + 0x00)
@@ -31,6 +33,7 @@
#define PL190_VIC_VECTCNTL0 (PL190_BASE + 0x200)
/* 15 PIC_VECTCNTL registers up to 0x23C */
#define PL190_SIC_IRQS_MAX 32
#define PL190_SIC_STATUS (PL190_SIC_BASE + 0x0)
#define PL190_SIC_RAWSTAT (PL190_SIC_BASE + 0x04)
#define PL190_SIC_ENABLE (PL190_SIC_BASE + 0x08)

2
include/l4/drivers/misc/sp810/sp810_sysctrl.h
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@@ -27,7 +27,7 @@
: clrbit(bit, base + reg)
/* The SP810 system controller offsets */
#define SP810_BASE PLATFORM_SP810_BASE
#define SP810_BASE PLATFORM_SYSCTRL_VIRTUAL
#define SP810_SCCTRL (SP810_BASE + 0x0)
/* ... Fill in as needed. */

2
include/l4/drivers/uart/pl011/pl011_uart.h
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@@ -80,7 +80,7 @@ static inline void pl011_uart_enable(unsigned int uart_base)
read(val, (uart_base + PL011_UARTCR));
val |= PL011_UARTEN;
write(val, (uart_base + PL011_UARTCR));
return;
}

52
include/l4/platform/pb926/irq.h
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@@ -2,19 +2,24 @@
#define __PLATFORM_IRQ_H__
#define IRQ_CHIPS_MAX 2
#define IRQS_MAX 64
/* Global irq numbers */
#define IRQ_TIMER01 (VIC_IRQ_TIMER01 + VIC_CHIP_OFFSET)
#define IRQ_TIMER23 (VIC_IRQ_TIMER23 + VIC_CHIP_OFFSET)
#define IRQ_RTC (VIC_IRQ_RTC + VIC_CHIP_OFFSET)
#define IRQ_UART0 (VIC_IRQ_UART0 + VIC_CHIP_OFFSET)
#define IRQ_UART1 (VIC_IRQ_UART1 + VIC_CHIP_OFFSET)
#define IRQ_UART2 (VIC_IRQ_UART2 + VIC_CHIP_OFFSET)
#define IRQ_SIC (VIC_IRQ_SIC + VIC_CHIP_OFFSET)
/*
* Globally unique irq chip offsets:
*
* A global irq number is calculated as
* chip_offset + local_irq_offset.
*
* This way, the global irq number uniquely represents
* an irq on any irq chip.
*/
#define VIC_CHIP_OFFSET 0
#define SIC_CHIP_OFFSET 32
#define IRQ_SICSWI (SIC_IRQ_SWI + SIC_CHIP_OFFSET)
#define IRQ_UART3 (SIC_IRQ_UART3 + SIC_CHIP_OFFSET)
/* Maximum irqs on VIC and SIC */
#define VIC_IRQS_MAX PL190_IRQS_MAX
#define SIC_IRQS_MAX PL190_SIC_IRQS_MAX
#define IRQS_MAX VIC_IRQS_MAX + SIC_IRQS_MAX
/* Vectored Interrupt Controller local IRQ numbers */
#define VIC_IRQ_TIMER01 4
@@ -29,22 +34,17 @@
#define SIC_IRQ_SWI 0
#define SIC_IRQ_UART3 6
/* Maximum irqs on VIC and SIC */
#define VIC_IRQS_MAX 32
#define SIC_IRQS_MAX 32
/* Global irq numbers */
#define IRQ_TIMER01 (VIC_IRQ_TIMER01 + VIC_CHIP_OFFSET)
#define IRQ_TIMER23 (VIC_IRQ_TIMER23 + VIC_CHIP_OFFSET)
#define IRQ_RTC (VIC_IRQ_RTC + VIC_CHIP_OFFSET)
#define IRQ_UART0 (VIC_IRQ_UART0 + VIC_CHIP_OFFSET)
#define IRQ_UART1 (VIC_IRQ_UART1 + VIC_CHIP_OFFSET)
#define IRQ_UART2 (VIC_IRQ_UART2 + VIC_CHIP_OFFSET)
#define IRQ_SIC (VIC_IRQ_SIC + VIC_CHIP_OFFSET)
/*
* Globally unique irq chip offsets:
*
* A global irq number is calculated as
* chip_offset + local_irq_offset.
*
* This way, the global irq number uniquely represents
* an irq on any irq chip.
*/
#define VIC_CHIP_OFFSET 0
#define SIC_CHIP_OFFSET 32
#define IRQ_SICSWI (SIC_IRQ_SWI + SIC_CHIP_OFFSET)
#define IRQ_UART3 (SIC_IRQ_UART3 + SIC_CHIP_OFFSET)
#endif /* __PLATFORM_IRQ_H__ */

24
include/l4/platform/pb926/offsets.h
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@@ -11,17 +11,6 @@
#define PHYS_MEM_START 0x00000000 /* inclusive */
#define PHYS_MEM_END 0x08000000 /* 128 MB, exclusive */
/*
* These bases taken from where kernel is `physically' linked at,
* also used to calculate virtual-to-physical translation offset.
* See the linker script for their sources. PHYS_ADDR_BASE can't
* use a linker variable because it's referred from assembler.
*/
#define PHYS_ADDR_BASE 0x100000
/* Device memory base */
#define PB926_DEV_PHYS 0x10000000
/* Device offsets in physical memory */
#define PB926_SYSTEM_REGISTERS 0x10000000 /* System registers */
#define PB926_SYSCTRL_BASE 0x101E0000 /* System controller */
@@ -40,7 +29,7 @@
* Uart virtual address until a file-based console access
* is available for userspace
*/
#define USERSPACE_UART_BASE 0x500000
#define USERSPACE_CONSOLE_VIRTUAL 0x500000
/*
* Device offsets in virtual memory. They offset to some virtual
@@ -54,11 +43,12 @@
#define PB926_SYSREGS_VOFFSET 0x00005000
#define PB926_SYSCTRL_VOFFSET 0x00006000
#define PB926_UART0_VBASE (IO_AREA0_VADDR + PB926_UART0_VOFFSET)
#define PB926_TIMER01_VBASE (IO_AREA0_VADDR + PB926_TIMER01_VOFFSET)
#define PB926_SYSCTRL_VBASE (IO_AREA0_VADDR + PB926_SYSCTRL_VOFFSET)
#define PB926_VIC_VBASE (IO_AREA0_VADDR + PB926_VIC_VOFFSET)
#define PB926_SIC_VBASE (IO_AREA0_VADDR + PB926_SIC_VOFFSET)
#define PLATFORM_CONSOLE_VIRTUAL (IO_AREA0_VADDR + PB926_UART0_VOFFSET)
#define PLATFORM_TIMER0_VIRTUAL (IO_AREA0_VADDR + PB926_TIMER01_VOFFSET)
#define PLATFORM_SYSCTRL_VIRTUAL (IO_AREA0_VADDR + PB926_SYSCTRL_VOFFSET)
#define PLATFORM_IRQCTRL0_VIRTUAL (IO_AREA0_VADDR + PB926_VIC_VOFFSET)
#define PLATFORM_IRQCTRL1_VIRTUAL (IO_AREA0_VADDR + PB926_SIC_VOFFSET)
#endif /* __PLATFORM_PB926_OFFSETS_H__ */

28
include/l4/platform/pb926/platform.h
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@@ -13,15 +13,11 @@
#include <l4/generic/cap-types.h>
#include <l4/generic/resource.h>
#define PLATFORM_CONSOLE0_BASE PB926_UART0_VBASE
/* Default console used by kernel */
#define PLATFORM_CONSOLE_BASE PB926_UART0_BASE
/* SP804 timer has TIMER1 at TIMER0 + 0x20 address */
#define PLATFORM_TIMER0_BASE PB926_TIMER01_VBASE
#define PLATFORM_SP810_BASE PB926_SYSCTRL_VBASE
#define PLATFORM_IRQCTRL_BASE PB926_VIC_VBASE
#define PLATFORM_SIRQCTRL_BASE PB926_SIC_VBASE
#define PLATFORM_TIMER0_BASE PB926_TIMER01_BASE
/* Total number of timers present in this platform */
#define TOTAL_TIMERS 4
@@ -30,18 +26,22 @@
#define PLATFORM_TIMER2 2
#define PLATFORM_TIMER3 3
/* Wrapping Plaform specific Physical Device Addresses */
#define PLATFORM_CONSOLE0_PHY_BASE PB926_UART0_BASE
#define PLATFORM_CONSOLE1_PHY_BASE PB926_UART1_BASE
#define PLATFORM_CONSOLE2_PHY_BASE PB926_UART2_BASE
#define PLATFORM_CONSOLE3_PHY_BASE PB926_UART3_BASE
#define PB926_UART_SIZE 0x1000
#define PB926_TIMER_SIZE 0x1000
#define PLATFORM_TIMER0_PHY_BASE PB926_TIMER01_BASE
#define PLATFORM_TIMER1_PHY_BASE PB926_TIMER23_BASE
#define PLATFORM_UART1_BASE PB926_UART1_BASE
#define PLATFORM_UART2_BASE PB926_UART2_BASE
#define PLATFORM_UART3_BASE PB926_UART3_BASE
#define PLATFORM_UART1_SIZE PB926_UART_SIZE
#define PLATFORM_UART2_SIZE PB926_UART_SIZE
#define PLATFORM_UART3_SIZE PB926_UART_SIZE
#define PLATFORM_TIMER1_BASE PB926_TIMER23_BASE
#define PLATFORM_TIMER1_SIZE PB926_TIMER_SIZE
int platform_setup_device_caps(struct kernel_resources *kres);
void platform_irq_enable(int irq);
void platform_irq_disable(int irq);
void timer_start(void);
#endif /* __PB926_PLATFORM_H__ */

1
include/l4/platform/pb926/uart.h
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@@ -11,7 +11,6 @@
#include INC_PLAT(offsets.h)
#include INC_GLUE(memlayout.h)
#define PLATFORM_CONSOLE_BASE PB926_UART0_VBASE
#include <l4/drivers/uart/pl011/pl011_uart.h>
void uart_init(void);