Changes to platform device handling, irqs, userspace device configuration

Revised irq handling and device address naming on internal devices.
This commit is contained in:
Bahadir Balban
2009-11-29 18:11:08 +02:00
parent fa660514df
commit 346d79c0cd
21 changed files with 267 additions and 157 deletions

View File

@@ -11,8 +11,10 @@
#include INC_PLAT(platform.h)
#include INC_ARCH(types.h)
#define PL190_BASE PLATFORM_IRQCTRL_BASE
#define PL190_SIC_BASE PLATFORM_SIRQCTRL_BASE
#define PL190_BASE PLATFORM_IRQCTRL0_VIRTUAL
#define PL190_SIC_BASE PLATFORM_IRQCTRL1_VIRTUAL
#define PL190_IRQS_MAX 32
/* VIC register offsets */
#define PL190_VIC_IRQSTATUS (PL190_BASE + 0x00)
@@ -31,6 +33,7 @@
#define PL190_VIC_VECTCNTL0 (PL190_BASE + 0x200)
/* 15 PIC_VECTCNTL registers up to 0x23C */
#define PL190_SIC_IRQS_MAX 32
#define PL190_SIC_STATUS (PL190_SIC_BASE + 0x0)
#define PL190_SIC_RAWSTAT (PL190_SIC_BASE + 0x04)
#define PL190_SIC_ENABLE (PL190_SIC_BASE + 0x08)

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@@ -27,7 +27,7 @@
: clrbit(bit, base + reg)
/* The SP810 system controller offsets */
#define SP810_BASE PLATFORM_SP810_BASE
#define SP810_BASE PLATFORM_SYSCTRL_VIRTUAL
#define SP810_SCCTRL (SP810_BASE + 0x0)
/* ... Fill in as needed. */

View File

@@ -80,7 +80,7 @@ static inline void pl011_uart_enable(unsigned int uart_base)
read(val, (uart_base + PL011_UARTCR));
val |= PL011_UARTEN;
write(val, (uart_base + PL011_UARTCR));
return;
}