Changes to platform device handling, irqs, userspace device configuration

Revised irq handling and device address naming on internal devices.

config/caps.py

@@ -139,31 +139,18 @@ cap_strings = { 'ipc' : \
 \t\t\t\t.size = ${size},
 \t\t\t},
 '''
-, 'uart' : \
+, 'device' : \
 '''
 \t\t\t[${idx}] = {
 \t\t\t\t/* For device selection */
 \t\t\t\t.target = ${cid},
-\t\t\t\t.attr = CAP_DEVTYPE_UART | (${devnum} << 16),
+\t\t\t\t.attr = (CAP_DEVTYPE_${devtype} & CAP_DEVTYPE_MASK)
+\t\t\t\t\t| ((${devnum} << CAP_DEVNUM_SHIFT) & CAP_DEVNUM_MASK),
 \t\t\t\t.type = CAP_TYPE_MAP_PHYSMEM | CAP_RTYPE_CONTAINER,
 \t\t\t\t.access = CAP_MAP_READ | CAP_MAP_WRITE | CAP_MAP_EXEC |
-\t\t\t\t\tCAP_MAP_CACHED | CAP_MAP_UNCACHED | CAP_MAP_UNMAP | CAP_MAP_UTCB,
+\t\t\t\t\tCAP_MAP_CACHED | CAP_MAP_UNCACHED | CAP_MAP_UNMAP,
-\t\t\t\t.start = __pfn(PLATFORM_CONSOLE${devnum}_PHY_BASE),
+\t\t\t\t.start = __pfn(PLATFORM_${devname}_BASE),
-\t\t\t\t.end = __pfn(PLATFORM_CONSOLE${devnum}_PHY_BASE) + 1,
+\t\t\t\t.end = __pfn(PLATFORM_${devname}_BASE + PLATFORM_${devname}_SIZE),
-\t\t\t\t.size = 1,
-\t\t\t},
-'''
-, 'timer' : \
-'''
-\t\t\t[${idx}] = {
-\t\t\t\t/* For device selection */
-\t\t\t\t.target = ${cid},
-\t\t\t\t.attr = CAP_DEVTYPE_TIMER | (${devnum} << 16),
-\t\t\t\t.type = CAP_TYPE_MAP_PHYSMEM | CAP_RTYPE_CONTAINER,
-\t\t\t\t.access = CAP_MAP_READ | CAP_MAP_WRITE | CAP_MAP_EXEC |
-\t\t\t\t\tCAP_MAP_CACHED | CAP_MAP_UNCACHED | CAP_MAP_UNMAP | CAP_MAP_UTCB,
-\t\t\t\t.start = __pfn(PLATFORM_TIMER${devnum}_PHY_BASE),
-\t\t\t\t.end = __pfn(PLATFORM_TIMER${devnum}_PHY_BASE) + 1,
 \t\t\t\t.size = 1,
 \t\t\t},
 '''
@@ -193,38 +180,42 @@ def prepare_custom_capability(cont, param, val):
             # Else we leave container id to user-supplied value
             if ttype == 'CURRENT_CONTAINER':
                 cont.caps[capkey] = templ.safe_substitute(target_rtype = 'CAP_RTYPE_CONTAINER',
-                                                           cid = cont.id)
+                                                          cid = cont.id)
             elif ttype == 'CURRENT_PAGER_SPACE':
                 cont.caps[capkey] = templ.safe_substitute(target_rtype = 'CAP_RTYPE_SPACE',
-                                                           cid = cont.id)
+                                                          cid = cont.id)
             elif ttype == 'ANOTHER_CONTAINER':
                 cont.caps[capkey] = templ.safe_substitute(target_rtype = 'CAP_RTYPE_CONTAINER')
             elif ttype == 'ANOTHER_PAGER':
                 cont.caps[capkey] = templ.safe_substitute(target_rtype = 'CAP_RTYPE_THREAD')
+    elif 'DEVICE' in param:
+        # Extract all fields
+        unused, device_name, rest = param.split('_', 2)
+        capkey = device_name.lower()
+        cont.caps[capkey] = cap_strings['device']
+        templ = Template(cont.caps[capkey])
+        device_id = device_name[-1:]
+        device_type = device_name[:-1]
+
+        # Fill in all blanks
+        cont.caps[capkey] = \
+            templ.safe_substitute(cid = cont.id,
+                                  devname = device_name,
+                                  devnum = device_id,
+                                  devtype = device_type)
 
     else: # Ignore custom_use symbol
         return
-    #print capkey
+    # print capkey
-    #print cont.caps[capkey]
+    # print cont.caps[capkey]
 
 def prepare_typed_capability(cont, param, val):
     captype, params = param.split('_', 1)
     captype = captype.lower()
 
-
     # USE makes us assign the initial cap string with blank fields
     if 'USE' in params:
-
+        cont.caps[captype] = cap_strings[captype]
-        # Special case for device
-        if 'DEVICE' in params:
-            # Extract device name and number
-            devid = captype[-1:]
-            devname = captype[: -1]
-
-            cont.caps[captype] = cap_strings[devname]
-
-        else:
-            cont.caps[captype] = cap_strings[captype]
 
         # Prepare string template from capability type
         templ = Template(cont.caps[captype])
@@ -233,11 +224,6 @@ def prepare_typed_capability(cont, param, val):
         if captype[-len('pool'):] == 'pool':
             cont.caps[captype] = templ.safe_substitute(cid = cont.id)
 
-        # If device, amend current container id and devnum as default
-        if 'DEVICE' in params:
-            cont.caps[captype] = \
-                    templ.safe_substitute(cid = cont.id, devnum = devid)
-
     # Fill in the blank size field
     elif 'SIZE' in params:
         # Get reference to capability string template
@@ -278,7 +264,7 @@ def prepare_typed_capability(cont, param, val):
         #print cont.caps[captype]
 
 def prepare_capability(cont, param, val):
-    if 'CUSTOM' in param:
+    if 'CUSTOM' in param or 'DEVICE' in param:
         prepare_custom_capability(cont, param, val)
     else:
         prepare_typed_capability(cont, param, val)

config/cml/container_ruleset.template

@@ -219,38 +219,38 @@ menu cont%(cn)d_physmem_list
 # FIXME: All this is to be moved to a per-platform description file.
 #
 symbols
-cont%(cn)d_device_uart1			'Container %(cn)d UART1 Menu'
+cont%(cn)d_cap_device_uart1		'Container %(cn)d UART1 Menu'
-cont%(cn)d_device_uart2                 'Container %(cn)d UART2 Menu'
+cont%(cn)d_cap_device_uart2             'Container %(cn)d UART2 Menu'
-cont%(cn)d_device_uart3                 'Container %(cn)d UART3 Menu'
+cont%(cn)d_cap_device_uart3             'Container %(cn)d UART3 Menu'
-cont%(cn)d_device_timer1                'Container %(cn)d TIMER23 Menu'
+cont%(cn)d_cap_device_timer1            'Container %(cn)d TIMER23 Menu'
 
-CONT%(cn)d_CAP_UART1_DEVICE_USE		'Container %(cn)d UART1 Enable'
+CONT%(cn)d_CAP_DEVICE_UART1_USE		'Container %(cn)d UART1 Enable'
-CONT%(cn)d_CAP_UART2_DEVICE_USE         'Container %(cn)d UART2 Enable'
+CONT%(cn)d_CAP_DEVICE_UART2_USE         'Container %(cn)d UART2 Enable'
-CONT%(cn)d_CAP_UART3_DEVICE_USE         'Container %(cn)d UART3 Enable'
+CONT%(cn)d_CAP_DEVICE_UART3_USE         'Container %(cn)d UART3 Enable'
-CONT%(cn)d_CAP_TIMER1_DEVICE_USE        'Container %(cn)d TIMER23 Enable'
+CONT%(cn)d_CAP_DEVICE_TIMER1_USE        'Container %(cn)d TIMER23 Enable'
 
-default CONT%(cn)d_CAP_UART1_DEVICE_USE		from n
+default CONT%(cn)d_CAP_DEVICE_UART1_USE		from n
-default CONT%(cn)d_CAP_UART2_DEVICE_USE 	from n
+default CONT%(cn)d_CAP_DEVICE_UART2_USE 	from n
-default CONT%(cn)d_CAP_UART3_DEVICE_USE 	from n
+default CONT%(cn)d_CAP_DEVICE_UART3_USE 	from n
-default CONT%(cn)d_CAP_TIMER1_DEVICE_USE	from n
+default CONT%(cn)d_CAP_DEVICE_TIMER1_USE	from n
 
-menu cont%(cn)d_device_uart1
+menu cont%(cn)d_cap_device_uart1
-	CONT%(cn)d_CAP_UART1_DEVICE_USE
+	CONT%(cn)d_CAP_DEVICE_UART1_USE
 
-menu cont%(cn)d_device_uart2
+menu cont%(cn)d_cap_device_uart2
-	CONT%(cn)d_CAP_UART2_DEVICE_USE
+	CONT%(cn)d_CAP_DEVICE_UART2_USE
 
-menu cont%(cn)d_device_uart3
+menu cont%(cn)d_cap_device_uart3
-	CONT%(cn)d_CAP_UART3_DEVICE_USE
+	CONT%(cn)d_CAP_DEVICE_UART3_USE
 
-menu cont%(cn)d_device_timer1
+menu cont%(cn)d_cap_device_timer1
-	CONT%(cn)d_CAP_TIMER1_DEVICE_USE
+	CONT%(cn)d_CAP_DEVICE_TIMER1_USE
 
 menu cont%(cn)d_device_list
-	cont%(cn)d_device_uart1
+	cont%(cn)d_cap_device_uart1
-	cont%(cn)d_device_uart2
+	cont%(cn)d_cap_device_uart2
-	cont%(cn)d_device_uart3
+	cont%(cn)d_cap_device_uart3
-	cont%(cn)d_device_timer1
+	cont%(cn)d_cap_device_timer1
 
 #
 # Settings for Custom Capabilities

config/cml/examples/helloworld/config.cml

@@ -2,7 +2,7 @@
 # Automatically generated, don't edit
 #
 # Generated on: bahadir-laptop
-# At: Sun, 22 Nov 2009 12:50:07 +0000
+# At: Sun, 29 Nov 2009 15:31:45 +0000
 # Linux version 2.6.24-22-generic (buildd@vernadsky) (gcc version 4.2.3 (Ubuntu 4.2.3-2ubuntu7)) #1 SMP Mon Nov 24 18:32:42 UTC 2008
 
 #
@@ -46,7 +46,6 @@ CONFIG_CPU_ARM926=y
 # ARM Platform Type
 #
 CONFIG_PLATFORM_EB=n
-CONFIG_PLATFORM_AB926=n
 CONFIG_PLATFORM_PB926=y
 
 
@@ -74,7 +73,6 @@ CONFIG_CAPABILITIES=y
 #
 CONFIG_CONT0_TYPE_BAREMETAL=y
 CONFIG_CONT0_TYPE_POSIX=n
-CONFIG_CONT0_TYPE_CUSTOM=n
 CONFIG_CONT0_TYPE_LINUX=n
 
 
@@ -90,6 +88,8 @@ CONFIG_CONT0_BAREMETAL_PROJ0=n
 CONFIG_CONT0_BAREMETAL_PROJ1=y
 CONFIG_CONT0_BAREMETAL_PROJ2=n
 CONFIG_CONT0_BAREMETAL_PROJ3=n
+CONFIG_CONT0_BAREMETAL_PROJ4=n
+CONFIG_CONT0_BAREMETAL_PROJ5=n
 
 
 #
@@ -221,6 +221,35 @@ CONFIG_CONT0_CAP_CUSTOM3_USE=n
 
 
 
+#
+# Container 0 Devices (Capabilities)
+#
+
+#
+# Container 0 UART1 Menu
+#
+CONFIG_CONT0_CAP_DEVICE_UART1_USE=n
+
+
+#
+# Container 0 UART2 Menu
+#
+CONFIG_CONT0_CAP_DEVICE_UART2_USE=n
+
+
+#
+# Container 0 UART3 Menu
+#
+CONFIG_CONT0_CAP_DEVICE_UART3_USE=n
+
+
+#
+# Container 0 TIMER23 Menu
+#
+CONFIG_CONT0_CAP_DEVICE_TIMER1_USE=n
+
+
+
 
 
 #
@@ -232,7 +261,6 @@ CONFIG_CONT0_CAP_CUSTOM3_USE=n
 #
 CONFIG_CONT1_TYPE_BAREMETAL=y
 CONFIG_CONT1_TYPE_POSIX=n
-CONFIG_CONT1_TYPE_CUSTOM=n
 CONFIG_CONT1_TYPE_LINUX=n
 
 
@@ -248,6 +276,8 @@ CONFIG_CONT1_BAREMETAL_PROJ0=n
 CONFIG_CONT1_BAREMETAL_PROJ1=y
 CONFIG_CONT1_BAREMETAL_PROJ2=n
 CONFIG_CONT1_BAREMETAL_PROJ3=n
+CONFIG_CONT1_BAREMETAL_PROJ4=n
+CONFIG_CONT1_BAREMETAL_PROJ5=n
 
 
 #
@@ -379,6 +409,35 @@ CONFIG_CONT1_CAP_CUSTOM3_USE=n
 
 
 
+#
+# Container 1 Devices (Capabilities)
+#
+
+#
+# Container 1 UART1 Menu
+#
+CONFIG_CONT1_CAP_DEVICE_UART1_USE=n
+
+
+#
+# Container 1 UART2 Menu
+#
+CONFIG_CONT1_CAP_DEVICE_UART2_USE=n
+
+
+#
+# Container 1 UART3 Menu
+#
+CONFIG_CONT1_CAP_DEVICE_UART3_USE=n
+
+
+#
+# Container 1 TIMER23 Menu
+#
+CONFIG_CONT1_CAP_DEVICE_TIMER1_USE=n
+
+
+
 
 
 #
@@ -390,7 +449,6 @@ CONFIG_CONT1_CAP_CUSTOM3_USE=n
 #
 CONFIG_CONT2_TYPE_BAREMETAL=y
 CONFIG_CONT2_TYPE_POSIX=n
-CONFIG_CONT2_TYPE_CUSTOM=n
 CONFIG_CONT2_TYPE_LINUX=n
 
 
@@ -406,6 +464,8 @@ CONFIG_CONT2_BAREMETAL_PROJ0=n
 CONFIG_CONT2_BAREMETAL_PROJ1=y
 CONFIG_CONT2_BAREMETAL_PROJ2=n
 CONFIG_CONT2_BAREMETAL_PROJ3=n
+CONFIG_CONT2_BAREMETAL_PROJ4=n
+CONFIG_CONT2_BAREMETAL_PROJ5=n
 
 
 #
@@ -537,6 +597,35 @@ CONFIG_CONT2_CAP_CUSTOM3_USE=n
 
 
 
+#
+# Container 2 Devices (Capabilities)
+#
+
+#
+# Container 2 UART1 Menu
+#
+CONFIG_CONT2_CAP_DEVICE_UART1_USE=n
+
+
+#
+# Container 2 UART2 Menu
+#
+CONFIG_CONT2_CAP_DEVICE_UART2_USE=n
+
+
+#
+# Container 2 UART3 Menu
+#
+CONFIG_CONT2_CAP_DEVICE_UART3_USE=n
+
+
+#
+# Container 2 TIMER23 Menu
+#
+CONFIG_CONT2_CAP_DEVICE_TIMER1_USE=n
+
+
+
 
 
 #
@@ -548,7 +637,6 @@ CONFIG_CONT2_CAP_CUSTOM3_USE=n
 #
 CONFIG_CONT3_TYPE_BAREMETAL=y
 CONFIG_CONT3_TYPE_POSIX=n
-CONFIG_CONT3_TYPE_CUSTOM=n
 CONFIG_CONT3_TYPE_LINUX=n
 
 
@@ -564,6 +652,8 @@ CONFIG_CONT3_BAREMETAL_PROJ0=n
 CONFIG_CONT3_BAREMETAL_PROJ1=y
 CONFIG_CONT3_BAREMETAL_PROJ2=n
 CONFIG_CONT3_BAREMETAL_PROJ3=n
+CONFIG_CONT3_BAREMETAL_PROJ4=n
+CONFIG_CONT3_BAREMETAL_PROJ5=n
 
 
 #
@@ -695,15 +785,56 @@ CONFIG_CONT3_CAP_CUSTOM3_USE=n
 
 
 
+#
+# Container 3 Devices (Capabilities)
+#
+
+#
+# Container 3 UART1 Menu
+#
+CONFIG_CONT3_CAP_DEVICE_UART1_USE=n
+
+
+#
+# Container 3 UART2 Menu
+#
+CONFIG_CONT3_CAP_DEVICE_UART2_USE=n
+
+
+#
+# Container 3 UART3 Menu
+#
+CONFIG_CONT3_CAP_DEVICE_UART3_USE=n
+
+
+#
+# Container 3 TIMER23 Menu
+#
+CONFIG_CONT3_CAP_DEVICE_TIMER1_USE=n
+
+
+
 
 
 
 #
 # Derived symbols
 #
+CONFIG_CONT1_PAGER_LOAD_ADDR=0x100000
 CONFIG_DRIVER_IRQ_PL190=y
 CONFIG_DRIVER_TIMER_SP804=y
+CONFIG_CONT3_START_PC_ADDR=0x40000000
 CONFIG_DRIVER_IRQ_GIC=n
+CONFIG_CONT2_PAGER_VIRT_ADDR=0x30000000
+CONFIG_CONT2_PAGER_LOAD_ADDR=0x200000
+CONFIG_CONT1_PAGER_VIRT_ADDR=0x20000000
+CONFIG_CONT3_PAGER_LOAD_ADDR=0x300000
+CONFIG_CONT0_PAGER_LOAD_ADDR=0x40000
+CONFIG_CONT0_PAGER_VIRT_ADDR=0x10000000
+CONFIG_CONT2_START_PC_ADDR=0x30000000
 CONFIG_DRIVER_UART_PL011=y
+CONFIG_CONT3_PAGER_VIRT_ADDR=0x40000000
+CONFIG_CONT0_START_PC_ADDR=0x10000000
+CONFIG_CONT1_START_PC_ADDR=0x20000000
 #
 # That's all, folks!

include/l4/drivers/irq/pl190/pl190_vic.h

@@ -11,8 +11,10 @@
 #include INC_PLAT(platform.h)
 #include INC_ARCH(types.h)
 
-#define PL190_BASE				PLATFORM_IRQCTRL_BASE
+#define PL190_BASE				PLATFORM_IRQCTRL0_VIRTUAL
-#define PL190_SIC_BASE				PLATFORM_SIRQCTRL_BASE
+#define PL190_SIC_BASE				PLATFORM_IRQCTRL1_VIRTUAL
+
+#define PL190_IRQS_MAX				32
 
 /* VIC register offsets */
 #define PL190_VIC_IRQSTATUS			(PL190_BASE + 0x00)
@@ -31,6 +33,7 @@
 #define PL190_VIC_VECTCNTL0			(PL190_BASE + 0x200)
 /* 15 PIC_VECTCNTL registers up to	0x23C */
 
+#define PL190_SIC_IRQS_MAX			32
 #define PL190_SIC_STATUS			(PL190_SIC_BASE + 0x0)
 #define PL190_SIC_RAWSTAT			(PL190_SIC_BASE + 0x04)
 #define PL190_SIC_ENABLE			(PL190_SIC_BASE + 0x08)

include/l4/drivers/misc/sp810/sp810_sysctrl.h

@@ -27,7 +27,7 @@
 			: clrbit(bit, base + reg)
 
 /* The SP810 system controller offsets */
-#define SP810_BASE			PLATFORM_SP810_BASE
+#define SP810_BASE			PLATFORM_SYSCTRL_VIRTUAL
 #define SP810_SCCTRL			(SP810_BASE + 0x0)
 /* ... Fill in as needed. */
 

include/l4/platform/pb926/irq.h

@@ -2,19 +2,24 @@
 #define __PLATFORM_IRQ_H__
 
 #define IRQ_CHIPS_MAX				2
-#define IRQS_MAX				64
 
-/* Global irq numbers */
+/*
-#define IRQ_TIMER01		(VIC_IRQ_TIMER01 + VIC_CHIP_OFFSET)
+ * Globally unique irq chip offsets:
-#define IRQ_TIMER23		(VIC_IRQ_TIMER23 + VIC_CHIP_OFFSET)
+ *
-#define IRQ_RTC			(VIC_IRQ_RTC + VIC_CHIP_OFFSET)
+ * A global irq number is calculated as
-#define IRQ_UART0		(VIC_IRQ_UART0 + VIC_CHIP_OFFSET)
+ * chip_offset + local_irq_offset.
-#define IRQ_UART1		(VIC_IRQ_UART1 + VIC_CHIP_OFFSET)
+ *
-#define IRQ_UART2		(VIC_IRQ_UART2 + VIC_CHIP_OFFSET)
+ * This way, the global irq number uniquely represents
-#define IRQ_SIC			(VIC_IRQ_SIC + VIC_CHIP_OFFSET)
+ * an irq on any irq chip.
+ */
+#define VIC_CHIP_OFFSET			0
+#define SIC_CHIP_OFFSET			32
 
-#define IRQ_SICSWI		(SIC_IRQ_SWI + SIC_CHIP_OFFSET)
+/* Maximum irqs on VIC and SIC */
-#define IRQ_UART3		(SIC_IRQ_UART3 + SIC_CHIP_OFFSET)
+#define VIC_IRQS_MAX			PL190_IRQS_MAX
+#define SIC_IRQS_MAX			PL190_SIC_IRQS_MAX
+
+#define IRQS_MAX			VIC_IRQS_MAX + SIC_IRQS_MAX
 
 /* Vectored Interrupt Controller local IRQ numbers */
 #define VIC_IRQ_TIMER01			4
@@ -29,22 +34,17 @@
 #define SIC_IRQ_SWI			0
 #define SIC_IRQ_UART3			6
 
-/* Maximum irqs on VIC and SIC */
+/* Global irq numbers */
-#define VIC_IRQS_MAX			32
+#define IRQ_TIMER01		(VIC_IRQ_TIMER01 + VIC_CHIP_OFFSET)
-#define SIC_IRQS_MAX			32
+#define IRQ_TIMER23		(VIC_IRQ_TIMER23 + VIC_CHIP_OFFSET)
+#define IRQ_RTC			(VIC_IRQ_RTC + VIC_CHIP_OFFSET)
+#define IRQ_UART0		(VIC_IRQ_UART0 + VIC_CHIP_OFFSET)
+#define IRQ_UART1		(VIC_IRQ_UART1 + VIC_CHIP_OFFSET)
+#define IRQ_UART2		(VIC_IRQ_UART2 + VIC_CHIP_OFFSET)
+#define IRQ_SIC			(VIC_IRQ_SIC + VIC_CHIP_OFFSET)
 
-
+#define IRQ_SICSWI		(SIC_IRQ_SWI + SIC_CHIP_OFFSET)
-/*
+#define IRQ_UART3		(SIC_IRQ_UART3 + SIC_CHIP_OFFSET)
- * Globally unique irq chip offsets:
- *
- * A global irq number is calculated as
- * chip_offset + local_irq_offset.
- *
- * This way, the global irq number uniquely represents
- * an irq on any irq chip.
- */
-#define VIC_CHIP_OFFSET			0
-#define SIC_CHIP_OFFSET			32
 
 
 #endif /* __PLATFORM_IRQ_H__ */

include/l4/platform/pb926/offsets.h

@@ -11,17 +11,6 @@
 #define	PHYS_MEM_START			0x00000000 /* inclusive */
 #define	PHYS_MEM_END			0x08000000 /* 128 MB, exclusive */
 
-/*
- * These bases taken from where kernel is `physically' linked at,
- * also used to calculate virtual-to-physical translation offset.
- * See the linker script for their sources. PHYS_ADDR_BASE can't
- * use a linker variable because it's referred from assembler.
- */
-#define	PHYS_ADDR_BASE			0x100000
-
-/* Device memory base */
-#define	PB926_DEV_PHYS			0x10000000
-
 /* Device offsets in physical memory */
 #define	PB926_SYSTEM_REGISTERS		0x10000000 /* System registers */
 #define	PB926_SYSCTRL_BASE		0x101E0000 /* System controller */
@@ -40,7 +29,7 @@
  * Uart virtual address until a file-based console access
  * is available for userspace
  */
-#define	USERSPACE_UART_BASE		0x500000
+#define	USERSPACE_CONSOLE_VIRTUAL		0x500000
 
 /*
  * Device offsets in virtual memory. They offset to some virtual
@@ -54,11 +43,12 @@
 #define PB926_SYSREGS_VOFFSET			0x00005000
 #define PB926_SYSCTRL_VOFFSET			0x00006000
 
-#define PB926_UART0_VBASE			(IO_AREA0_VADDR + PB926_UART0_VOFFSET)
+#define PLATFORM_CONSOLE_VIRTUAL		(IO_AREA0_VADDR + PB926_UART0_VOFFSET)
-#define PB926_TIMER01_VBASE			(IO_AREA0_VADDR + PB926_TIMER01_VOFFSET)
+#define PLATFORM_TIMER0_VIRTUAL			(IO_AREA0_VADDR + PB926_TIMER01_VOFFSET)
-#define PB926_SYSCTRL_VBASE			(IO_AREA0_VADDR + PB926_SYSCTRL_VOFFSET)
+#define PLATFORM_SYSCTRL_VIRTUAL		(IO_AREA0_VADDR + PB926_SYSCTRL_VOFFSET)
-#define PB926_VIC_VBASE				(IO_AREA0_VADDR + PB926_VIC_VOFFSET)
+#define PLATFORM_IRQCTRL0_VIRTUAL		(IO_AREA0_VADDR + PB926_VIC_VOFFSET)
-#define PB926_SIC_VBASE				(IO_AREA0_VADDR + PB926_SIC_VOFFSET)
+#define PLATFORM_IRQCTRL1_VIRTUAL		(IO_AREA0_VADDR + PB926_SIC_VOFFSET)
+
 
 #endif /* __PLATFORM_PB926_OFFSETS_H__ */
 

include/l4/platform/pb926/platform.h

@@ -13,15 +13,11 @@
 #include <l4/generic/cap-types.h>
 #include <l4/generic/resource.h>
 
-#define PLATFORM_CONSOLE0_BASE		PB926_UART0_VBASE
+/* Default console used by kernel */
+#define	PLATFORM_CONSOLE_BASE		PB926_UART0_BASE
 
 /* SP804 timer has TIMER1 at TIMER0 + 0x20 address */
-#define PLATFORM_TIMER0_BASE			PB926_TIMER01_VBASE
+#define	PLATFORM_TIMER0_BASE		PB926_TIMER01_BASE
-
-#define PLATFORM_SP810_BASE			PB926_SYSCTRL_VBASE
-#define PLATFORM_IRQCTRL_BASE		PB926_VIC_VBASE
-#define PLATFORM_SIRQCTRL_BASE		PB926_SIC_VBASE
-
 /* Total number of timers present in this platform */
 #define	TOTAL_TIMERS			4
 
@@ -30,18 +26,22 @@
 #define PLATFORM_TIMER2	2
 #define PLATFORM_TIMER3	3
 
-/* Wrapping Plaform specific Physical Device Addresses */
+#define PB926_UART_SIZE			0x1000
-#define	PLATFORM_CONSOLE0_PHY_BASE	PB926_UART0_BASE
+#define PB926_TIMER_SIZE		0x1000
-#define	PLATFORM_CONSOLE1_PHY_BASE	PB926_UART1_BASE
-#define	PLATFORM_CONSOLE2_PHY_BASE	PB926_UART2_BASE
-#define	PLATFORM_CONSOLE3_PHY_BASE	PB926_UART3_BASE
 
-#define	PLATFORM_TIMER0_PHY_BASE		PB926_TIMER01_BASE
+#define	PLATFORM_UART1_BASE		PB926_UART1_BASE
-#define	PLATFORM_TIMER1_PHY_BASE		PB926_TIMER23_BASE
+#define	PLATFORM_UART2_BASE		PB926_UART2_BASE
+#define	PLATFORM_UART3_BASE		PB926_UART3_BASE
 
+#define	PLATFORM_UART1_SIZE		PB926_UART_SIZE
+#define	PLATFORM_UART2_SIZE		PB926_UART_SIZE
+#define	PLATFORM_UART3_SIZE		PB926_UART_SIZE
+#define	PLATFORM_TIMER1_BASE		PB926_TIMER23_BASE
+#define	PLATFORM_TIMER1_SIZE		PB926_TIMER_SIZE
 
 int platform_setup_device_caps(struct kernel_resources *kres);
 void platform_irq_enable(int irq);
 void platform_irq_disable(int irq);
 void timer_start(void);
+
 #endif /* __PB926_PLATFORM_H__ */

include/l4/platform/pb926/uart.h

@@ -11,7 +11,6 @@
 #include INC_PLAT(offsets.h)
 #include INC_GLUE(memlayout.h)
 
-#define PLATFORM_CONSOLE_BASE			PB926_UART0_VBASE
 #include <l4/drivers/uart/pl011/pl011_uart.h>
 
 void uart_init(void);

scripts/cml/generate_container_cml.py

@@ -37,11 +37,11 @@ def add_container_constraint(cid):
 
 device_suppress_rule = \
 '''
-when CONT${CONTID}_CAP_${DEVNAME}_DEVICE_USE == y suppress
+when CONT${CONTID}_CAP_DEVICE_${DEVNAME}_USE == y suppress
 '''
 
 device_suppress_sym = \
-'''\tcont${CONTID}_device_${DEVNAME_LOWER}
+'''\tcont${CONTID}_cap_device_${DEVNAME_LOWER}
 '''
 
 devices = ['UART1', 'UART2', 'UART3', 'TIMER1']

src/arch/arm/v5/mm.c

@@ -371,7 +371,7 @@ int is_kern_pgdi(int i)
 	    (i == PGD_INDEX(USER_KIP_PAGE)) ||
 	    (i == PGD_INDEX(ARM_HIGH_VECTOR)) ||
 	    (i == PGD_INDEX(ARM_SYSCALL_VECTOR)) ||
-	    (i == PGD_INDEX(USERSPACE_UART_BASE)))
+	    (i == PGD_INDEX(USERSPACE_CONSOLE_VIRTUAL)))
 		return 1;
 	else
 		return 0;

src/drivers/irq/pl190/pl190_vic.c

@@ -32,10 +32,11 @@
 l4id_t pl190_read_irq(void)
 {
 	l4id_t irq;
-	 if ((irq =__clz(read(PL190_VIC_IRQSTATUS))))
+
-		 return irq;
+	 if ((irq = (31 - __clz(read(PL190_VIC_IRQSTATUS)))) < 0)
-	 else
 		 return IRQ_NIL;
+	 else
+		 return irq;
 }
 
 void pl190_mask_irq(l4id_t irq)
@@ -60,10 +61,10 @@ l4id_t pl190_sic_read_irq(void)
 {
 	l4id_t irq;
 
-	if ((irq =__clz(read(PL190_SIC_STATUS))))
+	if ((irq =(31 - __clz(read(PL190_SIC_STATUS)))) < 0)
-		return irq;
-	else
 		return IRQ_NIL;
+	else
+		return irq;
 }
 
 void pl190_sic_mask_irq(l4id_t irq)

src/glue/arm/init.c

@@ -34,7 +34,7 @@ unsigned int kernel_mapping_end;
 /* Maps the early memory regions needed to bootstrap the system */
 void init_kernel_mappings(void)
 {
-	memset(&init_pgd, 0, sizeof(pgd_table_t));
+	memset((void *)virt_to_phys(&init_pgd), 0, sizeof(pgd_table_t));
 
 	/* Map kernel area to its virtual region */
 	add_section_mapping_init(align(virt_to_phys(_start_text),SZ_1MB),

src/glue/arm/memory.c

@@ -84,7 +84,7 @@ void copy_pgd_kern_all(pgd_table_t *to)
 				ARM_SYSCALL_VECTOR + PAGE_SIZE);
 
 	/* We temporarily map uart registers to every process */
-	copy_pgd_kern_by_vrange(to, from, USERSPACE_UART_BASE,
+	copy_pgd_kern_by_vrange(to, from, USERSPACE_CONSOLE_VIRTUAL,
-				USERSPACE_UART_BASE + PAGE_SIZE);
+				USERSPACE_CONSOLE_VIRTUAL + PAGE_SIZE);
 }
 

src/platform/pb926/irq.c

@@ -47,7 +47,7 @@ static int platform_timer_handler(struct irq_desc *desc)
 	 * Microkernel is using just TIMER0,
 	 * so we call handler with TIMER01 index
 	 */
-	sp804_irq_handler(PLATFORM_TIMER0_BASE);
+	sp804_irq_handler(PLATFORM_TIMER0_VIRTUAL);
 	return do_timer_irq();
 }
 

src/platform/pb926/platform.c

@@ -72,7 +72,7 @@ int platform_setup_device_caps(struct kernel_resources *kres)
 /* We will use UART0 for kernel as well as user tasks, so map it to kernel and user space */
 void init_platform_console(void)
 {
-	add_boot_mapping(PB926_UART0_BASE, PLATFORM_CONSOLE0_BASE, PAGE_SIZE,
+	add_boot_mapping(PB926_UART0_BASE, PLATFORM_CONSOLE_VIRTUAL, PAGE_SIZE,
 			 MAP_IO_DEFAULT_FLAGS);
 
 	/*
@@ -80,7 +80,7 @@ void init_platform_console(void)
 	 * userspace printf can work. Note, this raw mapping is to be
 	 * removed in the future, when file-based io is implemented.
 	 */
-	add_boot_mapping(PB926_UART0_BASE, USERSPACE_UART_BASE, PAGE_SIZE,
+	add_boot_mapping(PB926_UART0_BASE, USERSPACE_CONSOLE_VIRTUAL, PAGE_SIZE,
 			 MAP_USR_IO_FLAGS);
 
 	uart_init();
@@ -93,10 +93,10 @@ void init_platform_console(void)
  */
 void init_platform_timer(void)
 {
-	add_boot_mapping(PB926_TIMER01_BASE, PLATFORM_TIMER0_BASE, PAGE_SIZE,
+	add_boot_mapping(PB926_TIMER01_BASE, PLATFORM_TIMER0_VIRTUAL, PAGE_SIZE,
 			 MAP_IO_DEFAULT_FLAGS);
 
-	add_boot_mapping(PB926_SYSCTRL_BASE, PB926_SYSCTRL_VBASE, PAGE_SIZE,
+	add_boot_mapping(PB926_SYSCTRL_BASE, PLATFORM_SYSCTRL_VIRTUAL, PAGE_SIZE,
 			 MAP_IO_DEFAULT_FLAGS);
 
 	timer_init();
@@ -104,9 +104,9 @@ void init_platform_timer(void)
 
 void init_platform_irq_controller()
 {
-	add_boot_mapping(PB926_VIC_BASE, PLATFORM_IRQCTRL_BASE, PAGE_SIZE,
+	add_boot_mapping(PB926_VIC_BASE, PLATFORM_IRQCTRL0_VIRTUAL, PAGE_SIZE,
 			 MAP_IO_DEFAULT_FLAGS);
-	add_boot_mapping(PB926_SIC_BASE, PLATFORM_SIRQCTRL_BASE, PAGE_SIZE,
+	add_boot_mapping(PB926_SIC_BASE, PLATFORM_IRQCTRL1_VIRTUAL, PAGE_SIZE,
 			 MAP_IO_DEFAULT_FLAGS);
 	irq_controllers_init();
 }

src/platform/pb926/printascii.S

@@ -13,7 +13,7 @@
 #define UART0_PHYS_BYTE2		(UART0_PHYS_BASE & 0x00FF0000)
 #define UART0_PHYS_BYTE3_4		(UART0_PHYS_BASE & 0x0000FFFF)
 
-#define UART0_VIRT_BASE			PB926_UART0_VBASE
+#define UART0_VIRT_BASE			PLATFORM_CONSOLE_VIRTUAL
 #define	UART0_VIRT_BYTE1		(UART0_VIRT_BASE & 0xFF000000)
 #define UART0_VIRT_BYTE2                (UART0_VIRT_BASE & 0x00FF0000)
 #define UART0_VIRT_BYTE3_4		(UART0_VIRT_BASE & 0x0000FFFF)

src/platform/pb926/timer.c

@@ -17,7 +17,7 @@ void timer_init(void)
 	sp810_set_timclk(PLATFORM_TIMER0, 1);
 
 	/* Initialise timer */
-	sp804_init(PLATFORM_TIMER0_BASE, SP804_TIMER_RUNMODE_PERIODIC, \
+	sp804_init(PLATFORM_TIMER0_VIRTUAL, SP804_TIMER_RUNMODE_PERIODIC, \
 		   SP804_TIMER_WRAPMODE_WRAPPING, SP804_TIMER_WIDTH32BIT, \
 		   SP804_TIMER_IRQENABLE);
 }
@@ -29,6 +29,6 @@ void timer_start(void)
 	irq_enable(IRQ_TIMER01);
 
 	/* Enable timer */
-	sp804_enable(PLATFORM_TIMER0_BASE, 1);
+	sp804_enable(PLATFORM_TIMER0_VIRTUAL, 1);
 }
 

src/platform/pb926/uart.c

@@ -13,7 +13,7 @@ extern struct pl011_uart uart;
 void uart_init()
 {
 	/* We are using UART0 for kernel */
-	uart.base = PLATFORM_CONSOLE0_BASE;
+	uart.base = PLATFORM_CONSOLE_VIRTUAL;
 	pl011_initialise_device(&uart);
 }