sambuc/codezero
1
0
Fork 0
mirror of https://github.com/drasko/codezero.git synced 2026-01-19 22:33:15 +01:00
Code Issues Actions Packages Projects Releases Wiki Activity

Changes between 16 March 2010 - 6 April 2010

Browse Source 
Mutex system call fixed for multiple contenders
Userspace irq support extended to keyboard/mouse.
Scheduler modified for real-time irq tasks
This commit is contained in:
Bahadir Balban
2010-04-06 19:47:12 +03:00
parent 1a62b92a8d
commit 403a038845
75 changed files with 1137 additions and 579 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
include/l4/api/mutex.h
View File

@@ -7,11 +7,22 @@
#define MUTEX_CONTROL_LOCK L4_MUTEX_LOCK
#define MUTEX_CONTROL_UNLOCK L4_MUTEX_UNLOCK
#define MUTEX_CONTROL_OPMASK L4_MUTEX_OPMASK
#define mutex_operation(x) ((x) & MUTEX_CONTROL_OPMASK)
#define mutex_contenders(x) ((x) & ~MUTEX_CONTROL_OPMASK)
#include <l4/lib/wait.h>
#include <l4/lib/list.h>
#include <l4/lib/mutex.h>
/*
* Contender threashold is the total number of contenders
* who are expected to sleep on the mutex, and will be waited
* for a wakeup.
*/
struct mutex_queue {
int contenders;
unsigned long physical;
struct link list;
struct waitqueue_head wqh_contenders;
@@ -39,7 +50,8 @@ void init_mutex_queue_head(struct mutex_queue_head *mqhead);
#endif
#define L4_MUTEX_LOCK 0
#define L4_MUTEX_UNLOCK 1
#define L4_MUTEX_OPMASK 0xF0000000
#define L4_MUTEX_LOCK 0x10000000
#define L4_MUTEX_UNLOCK 0x20000000
#endif /* __MUTEX_CONTROL_H__*/

2
include/l4/arch/arm/exception.h
View File

@@ -12,7 +12,7 @@
#include INC_ARCH(asm.h)
/* Abort debugging conditions */
//#define DEBUG_ABORTS
// #define DEBUG_ABORTS
#if defined (DEBUG_ABORTS)
#define dbg_abort(...) printk(__VA_ARGS__)
#else

9
include/l4/arch/arm/linker.lds.in
View File

@@ -8,7 +8,11 @@
#endif
phys_ram_start = PLATFORM_PHYS_MEM_START;
#if !defined(kernel_offset)
kernel_offset = KERNEL_AREA_START - phys_ram_start;
#endif
kernel_physical = 0x8000 + phys_ram_start;
kernel_virtual = kernel_physical + kernel_offset;
@@ -47,8 +51,8 @@ SECTIONS
. = ALIGN(16K);
_start_vectors = .;
*(.data.vectors)
_end_vectors = .;
. = ALIGN(4K);
_end_vectors = .;
_start_kip = .;
*(.data.kip)
. = ALIGN(4K);
@@ -71,9 +75,6 @@ SECTIONS
*(.bss)
}
. = ALIGN(4K);
. += PAGE_SIZE * 2; /* This is required as the link counter does not seem
* to increment for the bss section
* TODO: Change this with PAGE_SIZE */
/* Below part is to be discarded after boot */
_start_init = .;

4
include/l4/drivers/irq/gic/gic.h
View File

@@ -88,4 +88,8 @@ u32 gic_get_priority(u32 irq);
void gic_dummy_init(void);
void gic_eoi_irq(l4id_t irq);
void gic_print_cpu(void);
#endif /* __GIC_H__ */

20
include/l4/generic/container.h
View File

@@ -32,6 +32,16 @@ struct pager {
unsigned long stack_address;
unsigned long memsize;
struct cap_list cap_list;
/*
* Section markings,
* We dont care for other types of sections,
* RO will be included inside RX.
*/
unsigned long rw_sections_start;
unsigned long rw_sections_end;
unsigned long rx_sections_start;
unsigned long rx_sections_end;
};
@@ -72,6 +82,16 @@ struct pager_info {
unsigned long start_address;
unsigned long stack_address;
/*
* Section markings,
* We dont care for other types of sections,
* RO will be included inside RX.
*/
unsigned long rw_sections_start;
unsigned long rw_sections_end;
unsigned long rx_sections_start;
unsigned long rx_sections_end;
/* Number of capabilities defined */
int ncaps;

19
include/l4/generic/irq.h
View File

@@ -1,18 +1,20 @@
/*
* Generic irq handling definitions.
*
* Copyright (C) 2007 Bahadir Balban
* Copyright (C) 2010 B Labs Ltd.
*/
#ifndef __GENERIC_IRQ_H__
#define __GENERIC_IRQ_H__
#include <l4/lib/string.h>
#include <l4/lib/wait.h>
#include <l4/lib/printk.h>
#include INC_PLAT(irq.h)
#include INC_ARCH(types.h)
/* Represents none or spurious irq */
#define IRQ_NIL 0xFFFFFFFF
#define IRQ_NIL 0xFFFFFFFF /* -1 */
#define IRQ_SPURIOUS 0xFFFFFFFE /* -2 */
/* Successful irq handling state */
#define IRQ_HANDLED 0
@@ -23,6 +25,7 @@ struct irq_chip_ops {
l4id_t (*read_irq)(void *data);
irq_op_t ack_and_mask;
irq_op_t unmask;
void (*set_cpu)(l4id_t irq, unsigned int cpumask);
};
struct irq_chip {
@@ -47,9 +50,6 @@ struct irq_desc {
/* Notification slot for this irq */
int task_notify_slot;
/* If user will ack this irq */
int user_ack;
/* Waitqueue head for this irq */
struct waitqueue_head wqh_irq;
@@ -72,10 +72,17 @@ static inline void irq_disable(int irq_index)
{
struct irq_desc *this_irq = irq_desc_array + irq_index;
struct irq_chip *this_chip = this_irq->chip;
this_chip->ops.ack_and_mask(irq_index - this_chip->start);
}
static inline void irq_set_cpu(int irq_index, unsigned int cpumask)
{
struct irq_desc *this_irq = irq_desc_array + irq_index;
struct irq_chip *this_chip = this_irq->chip;
this_chip->ops.set_cpu(irq_index - this_chip->start, cpumask);
}
int irq_register(struct ktcb *task, int notify_slot, l4id_t irq_index);
int irq_thread_notify(struct irq_desc *desc);

19
include/l4/generic/scheduler.h
View File

@@ -42,7 +42,7 @@ static inline struct ktcb *current_task(void)
#define current current_task()
#define need_resched (current->ts_need_resched)
#define SCHED_RQ_TOTAL 2
#define SCHED_RQ_TOTAL 4
/* A basic runqueue */
struct runqueue {
@@ -52,11 +52,28 @@ struct runqueue {
unsigned int total; /* Total tasks */
};
/*
* Hints and flags to scheduler
*/
enum sched_flags {
/* Schedule idle at a convenient time */
SCHED_RUN_IDLE = (1 << 0),
};
/* Contains per-container scheduling structures */
struct scheduler {
unsigned int flags;
unsigned int task_select_ctr;
struct runqueue sched_rq[SCHED_RQ_TOTAL];
/* Regular runqueues */
struct runqueue *rq_runnable;
struct runqueue *rq_expired;
/* Real-time runqueues */
struct runqueue *rq_rt_runnable;
struct runqueue *rq_rt_expired;
struct ktcb *idle_task;
/* Total priority of all tasks in container */

27
include/l4/generic/smp.h
View File

@@ -20,4 +20,31 @@
#define smp_get_cpuid() 0
#endif
/* All cpus in the SMP system */
static inline unsigned int cpu_mask_all(void)
{
unsigned int mask = 0;
for (int i = 0; i < CONFIG_NCPU; i++)
mask |= (1 << i);
return mask;
}
/* All but not self */
static inline unsigned int cpu_mask_others(void)
{
unsigned int mask = 0;
for (int i = 0; i < CONFIG_NCPU; i++)
if (i != smp_get_cpuid())
mask |= (1 << i);
return mask;
}
/* Only self */
static inline unsigned int cpu_mask_self(void)
{
return 1 << smp_get_cpuid();
}
#endif /* __GENERIC_SMP_H__ */

2
include/l4/generic/tcb.h
View File

@@ -29,6 +29,7 @@
#define TASK_SUSPENDING (1 << 1)
#define TASK_RESUMING (1 << 2)
#define TASK_PENDING_SIGNAL (TASK_SUSPENDING)
#define TASK_REALTIME (1 << 5)
/*
* This is to indicate a task (either current or one of
@@ -109,7 +110,6 @@ struct ktcb {
enum task_state state;
struct link task_list; /* Global task list. */
struct ktcb_list child_exit_list;
/* UTCB related, see utcb.txt in docs */
unsigned long utcb_address; /* Virtual ref to task's utcb area */

1
include/l4/generic/time.h
View File

@@ -16,5 +16,6 @@ struct timeval {
extern volatile u32 jiffies;
int do_timer_irq(void);
int secondary_timer_irq(void);
#endif /* __GENERIC_TIME_H__ */

16
include/l4/glue/arm/ipi.h
View File

@@ -1,18 +1,16 @@
/*
* Copyright (C) 2010 B Labs Ltd.
*
* By Bahadir Balban
*/
#ifndef __IPI_H__
#define __IPI_H__
/*
* Copyright 2010 B Labs.Ltd.
*
* Author: Prem Mallappa <prem.mallappa@b-labs.co.uk>
*
* Description:
*/
#include <l4/generic/irq.h>
int ipi_handler(struct irq_desc *desc);
#define IPI_TIMER_EVENT 0
#endif /* __IPI_H__ */

2
include/l4/glue/arm/smp.h
View File

@@ -34,7 +34,7 @@ static inline void smp_start_cores(void) {}
void init_smp(void);
void arch_smp_spin(void);
void arch_send_ipi(u32 cpu, int ipi);
void smp_send_ipi(unsigned int cpumask, int ipi_num);
void platform_smp_init(int ncpus);
int platform_smp_start(int cpu, void (*start)(int));
void secondary_init_platform(void);

5
include/l4/platform/eb/irq.h
View File

@@ -69,10 +69,13 @@
#if defined (CONFIG_CPU_ARM11MPCORE) || defined (CONFIG_CPU_CORTEXA9)
#define IRQ_TIMER0 MPCORE_GIC_IRQ_TIMER01
#define IRQ_TIMER1 MPCORE_GIC_IRQ_TIMER23
#define IRQ_KEYBOARD0 MPCORE_GIC_IRQ_KMI0
#define IRQ_MOUSE0 MPCORE_GIC_IRQ_KMI1
#else
#define IRQ_TIMER0 EB_IRQ_TIMER01
#define IRQ_TIMER1 EB_IRQ_TIMER23
#define IRQ_KEYBOARD0 EB_IRQ_KMI0
#define IRQ_MOUSE0 EB_IRQ_KMI1
#endif
#endif /* __PLATFORM_IRQ_H__ */

6
include/l4/platform/eb/offsets.h
View File

@@ -19,7 +19,11 @@
#define PLATFORM_GIC3_BASE 0x10060000 /* GIC 3 */
#define PLATFORM_GIC4_BASE 0x10070000 /* GIC 4 */
#define MPCORE_PRIVATE_VBASE (IO_AREA0_VADDR + (13 * DEVICE_PAGE))
/*
* Virtual device offsets for EB platform - starting from
* the last common realview virtual device offset
*/
#define MPCORE_PRIVATE_VBASE (IO_AREA0_VADDR + (14 * DEVICE_PAGE))
#if defined (CONFIG_CPU_CORTEXA9)
#define MPCORE_PRIVATE_BASE 0x1F000000

1
include/l4/platform/pb11mpcore/offsets.h
View File

@@ -16,6 +16,7 @@
#define PLATFORM_TIMER2_BASE 0x10018000 /* TIMER 4-5 */
#define PLATFORM_TIMER3_BASE 0x10019000 /* TIMER 6-7 */
#define PLATFORM_SYSCTRL1_BASE 0x1001A000 /* System controller 1 */
#define PLATFORM_CLCD0_BASE 0x10020000 /* CLCD */
#define PLATFORM_GIC0_BASE 0x1E000000 /* GIC 0 */
#define PLATFORM_GIC1_BASE 0x1E010000 /* GIC 1 */
#define PLATFORM_GIC2_BASE 0x1E020000 /* GIC 2 */

5
include/l4/platform/pb926/platform.h
View File

@@ -1,5 +1,3 @@
#ifndef __PB926_PLATFORM_H__
#define __PB926_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
@@ -7,6 +5,9 @@
* Copyright (C) Bahadir Balban 2007
*/
#ifndef __PB926_PLATFORM_H__
#define __PB926_PLATFORM_H__
void platform_timer_start(void);
#endif /* __PB926_PLATFORM_H__ */

3
include/l4/platform/pba8/irq.h
View File

@@ -24,5 +24,8 @@
#define IRQ_TIMER2 73
#define IRQ_TIMER3 74
#define IRQ_KEYBOARD0 52
#define IRQ_MOUSE0 53
#endif /* __PLATFORM_IRQ_H__ */

1
include/l4/platform/pba8/offsets.h
View File

@@ -24,6 +24,7 @@
#define PLATFORM_TIMER2_BASE 0x10018000 /* Timers 4 and 5 */
#define PLATFORM_TIMER3_BASE 0x10019000 /* Timers 6 and 7 */
#define PLATFORM_SYSCTRL1_BASE 0x1001A000 /* System controller1 */
#define PLATFORM_CLCD0_BASE 0x10020000 /* CLCD */
#define PLATFORM_GIC1_BASE 0x1E000000 /* GIC 1 */
#define PLATFORM_GIC2_BASE 0x1E010000 /* GIC 2 */
#define PLATFORM_GIC3_BASE 0x1E020000 /* GIC 3 */

12
include/l4/platform/pba9/irq.h
View File

@@ -20,14 +20,16 @@
#define IRQ_UART1 38
#define IRQ_UART2 39
#define IRQ_UART3 40
#define IRQ_KEYBOARD0 44
#define IRQ_MOUSE0 45
#define IRQ_CLCD0 46
/*
* Interrupt Distribution:
* 0-31: SI, provided by distributed interrupt controller
* 32-63: Externel peripheral interrupts
* 64-71: Tile site interrupt
* 72-95: Externel peripheral interrupts
* Versatile Express A9 Interrupt Distribution:
* 0 - 31: SI, provided by distributed interrupt controller
* 32 - 74: Irqs from Motherboard (0 - 42)
* 75- 81: Test chip interrupts
*/
#endif /* __PLATFORM_IRQ_H__ */

12
include/l4/platform/pba9/offsets.h
View File

@@ -22,14 +22,24 @@
#define PLATFORM_TIMER3_BASE 0x10019000 /* Timers 2 and 3 */
#define PLATFORM_SYSCTRL1_BASE 0x1001A000 /* System controller1 */
#define PLATFORM_CLCD0_BASE 0x1001F000 /* CLCD */
#define PLATFORM_GIC0_BASE 0x1E000000 /* GIC 0 */
#define MPCORE_PRIVATE_BASE 0x1E000000
#define MPCORE_PRIVATE_VBASE (IO_AREA0_VADDR + (13 * DEVICE_PAGE))
#define SCU_BASE MPCORE_PRIVATE_BASE
#define SCU_VBASE MPCORE_PRIVATE_VBASE
#define GIC0_CPU_VBASE (MPCORE_PRIVATE_VBASE + 0x100)
#define GIC0_DIST_VBASE (MPCORE_PRIVATE_VBASE + 0x1000)
/*
* Virtual device offsets for Versatile Express A9
* Offsets start from the last common realview virtual
* device offset
*/
#define MPCORE_PRIVATE_VBASE (IO_AREA0_VADDR + (14 * DEVICE_PAGE))
/* Add userspace devices here as they become necessary for irqs */
#endif /* __PLATFORM_PBA9_OFFSETS_H__ */

14
include/l4/platform/realview/offsets.h
View File

@@ -22,6 +22,8 @@
*/
#define PLATFORM_SYSTEM_REGISTERS 0x10000000 /* System registers */
#define PLATFORM_SYSCTRL_BASE 0x10001000 /* System controller0 */
#define PLATFORM_KEYBOARD0_BASE 0x10006000 /* Keyboard */
#define PLATFORM_MOUSE0_BASE 0x10007000 /* Mouse */
#define PLATFORM_UART0_BASE 0x10009000 /* Console port (UART0) */
#define PLATFORM_UART1_BASE 0x1000A000 /* Console port (UART1) */
#define PLATFORM_UART2_BASE 0x1000B000 /* Console port (UART2) */
@@ -43,12 +45,15 @@
#define PLATFORM_TIMER0_VBASE (IO_AREA0_VADDR + (4 * DEVICE_PAGE))
#define PLATFORM_GIC0_VBASE (IO_AREA0_VADDR + (5 * DEVICE_PAGE))
#define PLATFORM_GIC1_VBASE (IO_AREA0_VADDR + (7 * DEVICE_PAGE))
#define PLATFORM_GIC2_VBASE (IO_AREA0_VADDR + (9 * DEVICE_PAGE))
#define PLATFORM_GIC3_VBASE (IO_AREA0_VADDR + (11 * DEVICE_PAGE))
#define PLATFORM_GIC2_VBASE (IO_AREA0_VADDR + (8 * DEVICE_PAGE))
#define PLATFORM_GIC3_VBASE (IO_AREA0_VADDR + (9 * DEVICE_PAGE))
/* Add userspace devices here as they become necessary for irqs */
/* Add size of various user space devices, to be used in capability generation */
#define PLATFORM_TIMER1_VBASE (IO_AREA0_VADDR + (10 * DEVICE_PAGE))
#define PLATFORM_KEYBOARD0_VBASE (IO_AREA0_VADDR + (11 * DEVICE_PAGE))
#define PLATFORM_MOUSE0_VBASE (IO_AREA0_VADDR + (12 * DEVICE_PAGE))
#define PLATFORM_CLCD0_VBASE (IO_AREA0_VADDR + (13 * DEVICE_PAGE))
/* The SP810 system controller offsets */
#define SP810_BASE PLATFORM_SYSCTRL_VBASE
@@ -59,6 +64,9 @@
#define PLATFORM_UART2_SIZE DEVICE_PAGE
#define PLATFORM_UART3_SIZE DEVICE_PAGE
#define PLATFORM_TIMER1_SIZE DEVICE_PAGE
#define PLATFORM_KEYBOARD0_SIZE DEVICE_PAGE
#define PLATFORM_MOUSE0_SIZE DEVICE_PAGE
#define PLATFORM_CLCD0_SIZE DEVICE_PAGE
#endif /* __PLATFORM_REALVIEW_OFFSETS_H__ */