Changes between 16 March 2010 - 6 April 2010

Mutex system call fixed for multiple contenders
Userspace irq support extended to keyboard/mouse.
Scheduler modified for real-time irq tasks
This commit is contained in:
Bahadir Balban
2010-04-06 19:47:12 +03:00
parent 1a62b92a8d
commit 403a038845
75 changed files with 1137 additions and 579 deletions

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@@ -69,10 +69,13 @@
#if defined (CONFIG_CPU_ARM11MPCORE) || defined (CONFIG_CPU_CORTEXA9)
#define IRQ_TIMER0 MPCORE_GIC_IRQ_TIMER01
#define IRQ_TIMER1 MPCORE_GIC_IRQ_TIMER23
#define IRQ_KEYBOARD0 MPCORE_GIC_IRQ_KMI0
#define IRQ_MOUSE0 MPCORE_GIC_IRQ_KMI1
#else
#define IRQ_TIMER0 EB_IRQ_TIMER01
#define IRQ_TIMER1 EB_IRQ_TIMER23
#define IRQ_KEYBOARD0 EB_IRQ_KMI0
#define IRQ_MOUSE0 EB_IRQ_KMI1
#endif
#endif /* __PLATFORM_IRQ_H__ */

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@@ -19,7 +19,11 @@
#define PLATFORM_GIC3_BASE 0x10060000 /* GIC 3 */
#define PLATFORM_GIC4_BASE 0x10070000 /* GIC 4 */
#define MPCORE_PRIVATE_VBASE (IO_AREA0_VADDR + (13 * DEVICE_PAGE))
/*
* Virtual device offsets for EB platform - starting from
* the last common realview virtual device offset
*/
#define MPCORE_PRIVATE_VBASE (IO_AREA0_VADDR + (14 * DEVICE_PAGE))
#if defined (CONFIG_CPU_CORTEXA9)
#define MPCORE_PRIVATE_BASE 0x1F000000

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@@ -16,6 +16,7 @@
#define PLATFORM_TIMER2_BASE 0x10018000 /* TIMER 4-5 */
#define PLATFORM_TIMER3_BASE 0x10019000 /* TIMER 6-7 */
#define PLATFORM_SYSCTRL1_BASE 0x1001A000 /* System controller 1 */
#define PLATFORM_CLCD0_BASE 0x10020000 /* CLCD */
#define PLATFORM_GIC0_BASE 0x1E000000 /* GIC 0 */
#define PLATFORM_GIC1_BASE 0x1E010000 /* GIC 1 */
#define PLATFORM_GIC2_BASE 0x1E020000 /* GIC 2 */

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@@ -1,5 +1,3 @@
#ifndef __PB926_PLATFORM_H__
#define __PB926_PLATFORM_H__
/*
* Platform specific ties between drivers and generic APIs used by the kernel.
* E.g. system timer and console.
@@ -7,6 +5,9 @@
* Copyright (C) Bahadir Balban 2007
*/
#ifndef __PB926_PLATFORM_H__
#define __PB926_PLATFORM_H__
void platform_timer_start(void);
#endif /* __PB926_PLATFORM_H__ */

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@@ -24,5 +24,8 @@
#define IRQ_TIMER2 73
#define IRQ_TIMER3 74
#define IRQ_KEYBOARD0 52
#define IRQ_MOUSE0 53
#endif /* __PLATFORM_IRQ_H__ */

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@@ -24,6 +24,7 @@
#define PLATFORM_TIMER2_BASE 0x10018000 /* Timers 4 and 5 */
#define PLATFORM_TIMER3_BASE 0x10019000 /* Timers 6 and 7 */
#define PLATFORM_SYSCTRL1_BASE 0x1001A000 /* System controller1 */
#define PLATFORM_CLCD0_BASE 0x10020000 /* CLCD */
#define PLATFORM_GIC1_BASE 0x1E000000 /* GIC 1 */
#define PLATFORM_GIC2_BASE 0x1E010000 /* GIC 2 */
#define PLATFORM_GIC3_BASE 0x1E020000 /* GIC 3 */

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@@ -20,14 +20,16 @@
#define IRQ_UART1 38
#define IRQ_UART2 39
#define IRQ_UART3 40
#define IRQ_KEYBOARD0 44
#define IRQ_MOUSE0 45
#define IRQ_CLCD0 46
/*
* Interrupt Distribution:
* 0-31: SI, provided by distributed interrupt controller
* 32-63: Externel peripheral interrupts
* 64-71: Tile site interrupt
* 72-95: Externel peripheral interrupts
* Versatile Express A9 Interrupt Distribution:
* 0 - 31: SI, provided by distributed interrupt controller
* 32 - 74: Irqs from Motherboard (0 - 42)
* 75- 81: Test chip interrupts
*/
#endif /* __PLATFORM_IRQ_H__ */

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@@ -22,14 +22,24 @@
#define PLATFORM_TIMER3_BASE 0x10019000 /* Timers 2 and 3 */
#define PLATFORM_SYSCTRL1_BASE 0x1001A000 /* System controller1 */
#define PLATFORM_CLCD0_BASE 0x1001F000 /* CLCD */
#define PLATFORM_GIC0_BASE 0x1E000000 /* GIC 0 */
#define MPCORE_PRIVATE_BASE 0x1E000000
#define MPCORE_PRIVATE_VBASE (IO_AREA0_VADDR + (13 * DEVICE_PAGE))
#define SCU_BASE MPCORE_PRIVATE_BASE
#define SCU_VBASE MPCORE_PRIVATE_VBASE
#define GIC0_CPU_VBASE (MPCORE_PRIVATE_VBASE + 0x100)
#define GIC0_DIST_VBASE (MPCORE_PRIVATE_VBASE + 0x1000)
/*
* Virtual device offsets for Versatile Express A9
* Offsets start from the last common realview virtual
* device offset
*/
#define MPCORE_PRIVATE_VBASE (IO_AREA0_VADDR + (14 * DEVICE_PAGE))
/* Add userspace devices here as they become necessary for irqs */
#endif /* __PLATFORM_PBA9_OFFSETS_H__ */

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@@ -22,6 +22,8 @@
*/
#define PLATFORM_SYSTEM_REGISTERS 0x10000000 /* System registers */
#define PLATFORM_SYSCTRL_BASE 0x10001000 /* System controller0 */
#define PLATFORM_KEYBOARD0_BASE 0x10006000 /* Keyboard */
#define PLATFORM_MOUSE0_BASE 0x10007000 /* Mouse */
#define PLATFORM_UART0_BASE 0x10009000 /* Console port (UART0) */
#define PLATFORM_UART1_BASE 0x1000A000 /* Console port (UART1) */
#define PLATFORM_UART2_BASE 0x1000B000 /* Console port (UART2) */
@@ -43,12 +45,15 @@
#define PLATFORM_TIMER0_VBASE (IO_AREA0_VADDR + (4 * DEVICE_PAGE))
#define PLATFORM_GIC0_VBASE (IO_AREA0_VADDR + (5 * DEVICE_PAGE))
#define PLATFORM_GIC1_VBASE (IO_AREA0_VADDR + (7 * DEVICE_PAGE))
#define PLATFORM_GIC2_VBASE (IO_AREA0_VADDR + (9 * DEVICE_PAGE))
#define PLATFORM_GIC3_VBASE (IO_AREA0_VADDR + (11 * DEVICE_PAGE))
#define PLATFORM_GIC2_VBASE (IO_AREA0_VADDR + (8 * DEVICE_PAGE))
#define PLATFORM_GIC3_VBASE (IO_AREA0_VADDR + (9 * DEVICE_PAGE))
/* Add userspace devices here as they become necessary for irqs */
/* Add size of various user space devices, to be used in capability generation */
#define PLATFORM_TIMER1_VBASE (IO_AREA0_VADDR + (10 * DEVICE_PAGE))
#define PLATFORM_KEYBOARD0_VBASE (IO_AREA0_VADDR + (11 * DEVICE_PAGE))
#define PLATFORM_MOUSE0_VBASE (IO_AREA0_VADDR + (12 * DEVICE_PAGE))
#define PLATFORM_CLCD0_VBASE (IO_AREA0_VADDR + (13 * DEVICE_PAGE))
/* The SP810 system controller offsets */
#define SP810_BASE PLATFORM_SYSCTRL_VBASE
@@ -59,6 +64,9 @@
#define PLATFORM_UART2_SIZE DEVICE_PAGE
#define PLATFORM_UART3_SIZE DEVICE_PAGE
#define PLATFORM_TIMER1_SIZE DEVICE_PAGE
#define PLATFORM_KEYBOARD0_SIZE DEVICE_PAGE
#define PLATFORM_MOUSE0_SIZE DEVICE_PAGE
#define PLATFORM_CLCD0_SIZE DEVICE_PAGE
#endif /* __PLATFORM_REALVIEW_OFFSETS_H__ */