Modifications towards full ipc

- Added a full ipc send/recv test
- Removed non-zero value checking in r2 for ipc that was there
  to catch inadvertent full ipc calls.
- Added correct hanlding for read/write mrs for current status of utcb.

TODO:
- Add mapping of every utcb to every task for privileged access so that
  the kernel can access every utcb without switching spaces.
- Removal of same mappings
- Upon thread creation need to copy page tables accordingly i.e.
  each task will have its own utcb mapped with USER access, but every
  other utcb as kernel access only. Need to handle this case upon page
  table copying.

include/l4/glue/arm/message.h

@@ -6,13 +6,13 @@
 #ifndef __GLUE_ARM_MESSAGE_H__
 #define __GLUE_ARM_MESSAGE_H__
 
-/* 
+/*
  * Here's a summary of how ARM registers are used during IPC:
  *
  * System registers:
  * r0 - r2: Passed as arguments to ipc() call. They are the registers
  * the microkernel will read and they have system-wide meaning.
- * 
+ *
  * Primary message registers:
  * r3 - r8: These 6 registers are the primary message registers MR0-MR6
  * Their format is application-specific, i.e. the microkernel imposes no
@@ -58,7 +58,7 @@
  * Complicated for you? Suggest a simpler design and it shall be implemented!
  */
 
-#define MR_REST			(UTCB_SIZE - MR_TOTAL - 2)	/* -2 is for fields on utcb */
+#define MR_REST			((UTCB_SIZE >> 2) - MR_TOTAL - 2)	/* -2 is for fields on utcb */
 #define MR_TOTAL		6
 #define MR_TAG			0	/* Contains the purpose of message */
 #define MR_SENDER		1	/* For anythread receivers to discover sender */