Changes since April

Clean up of build directories.
Simplifications to capability model.

conts/userlibs/libdev/SConscript

@@ -0,0 +1,40 @@
+# -*- mode: python; coding: utf-8; -*-
+#
+#  Codezero -- Virtualization microkernel for embedded systems.
+#
+#  Copyright © 2009  B Labs Ltd
+
+import os, sys
+from os.path import join
+
+# Get global paths
+PROJRELROOT = '../../../'
+sys.path.append(PROJRELROOT)
+
+from scripts.config.projpaths import *
+
+Import('env', 'type', 'build_dir')
+
+env.Append(CPPPATH = [LIBDEV_INCLUDE, LIBC_INCLUDE, LIBL4_INCLUDE],
+           CCFLAGS = ['-DVARIANT_' + type.upper()])
+
+objects     = SConscript('uart/pl011/SConscript',   duplicate=0, exports = { 'env' : env },
+                         variant_dir = join(build_dir, 'uart/pl011'))
+
+objects     += SConscript('timer/sp804/SConscript', duplicate=0, exports = { 'env' : env },
+                          variant_dir = join(build_dir, 'timer/sp804'))
+
+objects     += SConscript('kmi/pl050/SConscript',   duplicate=0, exports = { 'env' : env },
+                          variant_dir = join(build_dir, 'kmi/pl050'))
+
+objects     += SConscript('clcd/pl110/SConscript',  duplicate=0, exports = { 'env' : env },
+                          variant_dir = join(build_dir, 'clcd/pl110'))
+
+objects     += SConscript('uart/omap/SConscript',   duplicate=0, exports = { 'env' : env },
+                          variant_dir = join(build_dir, 'uart/omap'))
+
+objects     += SConscript('timer/omap/SConscript',  duplicate=0, exports = { 'env' : env },
+                          variant_dir = join(build_dir, 'timer/omap'))
+
+library = env.StaticLibrary(join(build_dir, 'libdev-' + type), objects)
+Return('library')

conts/userlibs/libdev/SConstruct

@@ -0,0 +1,56 @@
+# -*- mode: python; coding: utf-8; -*-
+#
+#  Codezero -- a microkernel for embedded systems.
+#
+#  Copyright © 2009  B Labs Ltd
+#
+import os, sys
+
+PROJRELROOT = '../../..'
+sys.path.append(PROJRELROOT)
+
+from scripts.config.projpaths import *
+from scripts.config.configuration import *
+
+config = configuration_retrieve()
+gcc_arch_flag = config.gcc_arch_flag
+
+# We assume we are compiling for userspace.
+# variant can be specified from cmdline using
+# scons variant=xxx
+variant = ARGUMENTS.get('variant', 'userspace')
+print '\nCompiling for variant: ' + variant + '\n'
+
+builddir = join(join(BUILDDIR, LIBDEV_RELDIR), 'sys-' + variant)
+VariantDir(builddir, os.getcwd())
+
+env = Environment(CC = config.toolchain_userspace + 'gcc',
+		          CCFLAGS = ['-g', '-nostdlib', '-ffreestanding', '-std=gnu99',
+                             '-nostdinc', '-Wall', '-DVARIANT_' + variant.upper(),
+                             '-march=' + gcc_arch_flag, '-Werror'],
+		          LINKFLAGS = ['-nostdlib'],
+		          ASFLAGS = ['-D__ASSEMBLY__'],
+		          ENV = {'PATH' : os.environ['PATH']},
+		          CPPPATH = ['#include', LIBC_INCLUDE, LIBL4_INCLUDE, KERNEL_HEADERS])
+
+
+objects     = SConscript('uart/pl011/SConscript', duplicate=0,
+                         exports = { 'env' : env },
+                         variant_dir = join(builddir, 'uart/pl011'))
+objects     += SConscript('timer/sp804/SConscript', duplicate=0,
+                          exports = { 'env' : env },
+                          variant_dir = join(builddir, 'timer/sp804'))
+objects     += SConscript('kmi/pl050/SConscript', duplicate=0,
+                          exports = { 'env' : env },
+                          variant_dir = join(builddir, 'kmi/pl050'))
+objects     += SConscript('clcd/pl110/SConscript', duplicate=0,
+                          exports = { 'env' : env },
+                          variant_dir = join(builddir, 'clcd/pl110'))
+objects     += SConscript('uart/omap/SConscript', duplicate=0,
+                          exports = { 'env' : env },
+                          variant_dir = join(builddir, 'uart/omap'))
+objects     += SConscript('timer/omap/SConscript', duplicate=0,
+                          exports = { 'env' : env },
+                          variant_dir = join(builddir, 'timer/omap'))
+
+library = env.StaticLibrary(join(builddir, 'libdev-' + variant), objects)

conts/userlibs/libdev/clcd/pl110/SConscript

@@ -0,0 +1,23 @@
+import sys
+Import('env')
+
+# Get global paths
+PROJRELROOT = '../../../'
+sys.path.append(PROJRELROOT)
+
+from scripts.config.configuration import *
+config = configuration_retrieve()
+platform = config.platform
+
+#Platforms using pl110
+plat_list = ('eb', 'pba9', 'pb926')
+
+# The set of source files associated with this SConscript file.
+src_local = []
+
+for plat_supported in plat_list:
+    if plat_supported == platform:
+        src_local += Glob('*.c')
+
+obj = env.StaticObject(src_local)
+Return('obj')

conts/userlibs/libdev/clcd/pl110/clcd.c

@@ -0,0 +1,3 @@
+
+
+

conts/userlibs/libdev/clcd/pl110/clcd.h

@@ -0,0 +1,5 @@
+
+#ifndef __CLCD_H__
+#define __CLCD_H__
+
+#endif /* __CLCD_H__ */

conts/userlibs/libdev/include/dev/io.h

@@ -0,0 +1,12 @@
+/*
+ * IO functions/macros.
+ *
+ * Copyright (C) 2007 Bahadir Balban
+ */
+#ifndef __LIBDEV_IO_H__
+#define __LIBDEV_IO_H__
+
+#define read(address)		*((volatile unsigned int *)(address))
+#define write(val, address)	*((volatile unsigned int *)(address)) = val
+
+#endif /* __LIBDEV_IO_H__ */

conts/userlibs/libdev/include/dev/kmi.h

@@ -0,0 +1,26 @@
+
+#ifndef __KMI_H__
+#define __KMI_H__
+
+/*
+ * Current keyboard state
+ */
+struct keyboard_state{
+	int keyup;
+	int shift;
+	int caps_lock;
+};
+
+/* Common functions */
+void kmi_rx_irq_enable(unsigned long base);
+int kmi_data_read(unsigned long base);
+
+/* Keyboard specific calls */
+char kmi_keyboard_read(unsigned long base, struct keyboard_state *state);
+void kmi_keyboard_init(unsigned long base, unsigned int div);
+
+/* Mouse specific calls */
+void kmi_mouse_enable(unsigned long base);
+void kmi_mouse_init(unsigned long base, unsigned int div);
+
+#endif /* __KMI_H__ */

conts/userlibs/libdev/include/dev/platform.h

@@ -0,0 +1,17 @@
+/*
+ * Generic platform file.
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ * Author: Bahadir Balban
+ */
+#ifndef __LIBDEV_PLATFORM_H__
+#define __LIBDEV_PLATFORM_H__
+
+#define INC_LIBDEV_PLAT(x)             <dev/platform/__PLATFORM__/x>
+
+/* paths realtive to conts/dev/ */
+#include INC_LIBDEV_PLAT(irq.h)
+#include INC_LIBDEV_PLAT(platform.h)
+
+#endif /* __LIBDEV_PLATFORM_H__  */

conts/userlibs/libdev/include/dev/platform/beagle/irq.h

@@ -0,0 +1,13 @@
+/*
+ * IRQ numbers for beagle board.
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ */
+#ifndef __LIBDEV_BEAGLE_IRQ_H__
+#define __LIBDEV_BEAGLE_IRQ_H__
+
+#define IRQ_TIMER0	37
+#define IRQ_TIMER1	38
+
+#endif /* __LIBDEV_BEAGLE_IRQ_H__  */

conts/userlibs/libdev/include/dev/platform/beagle/platform.h

@@ -0,0 +1,13 @@
+/*
+ * Platform offsets for beagle board.
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ */
+#ifndef __LIBDEV_PLATFORM_BEAGLE_H__
+#define __LIBDEV_PLATFORM_BEAGLE_H__
+
+#define PLATFORM_TIMER1_BASE		0x49032000 /* GPTIMER2 */
+#define PLATFORM_TIMER2_BASE            0x49034000 /* GPTIMER3 */
+
+#endif /* __LIBDEV_PLATFORM_BEAGLE_H__  */

conts/userlibs/libdev/include/dev/platform/eb/irq.h

@@ -0,0 +1,22 @@
+/*
+ * IRQ numbers for eb.
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ */
+#ifndef __LIBDEV_EB_IRQ_H__
+#define __LIBDEV_EB_IRQ_H__
+
+#if defined (CONFIG_CPU_ARM11MPCORE) || defined (CONFIG_CPU_CORTEXA9)
+#define IRQ_TIMER1	34
+#define IRQ_KEYBOARD0   39
+#define IRQ_MOUSE0	40
+#define IRQ_CLCD0	55
+#else
+#define IRQ_TIMER1	37
+#define IRQ_KEYBOARD0	52
+#define IRQ_MOUSE0	53
+#define IRQ_CLCD0	55
+#endif	/* CONFIG_CPU_ARM11MPCORE || CONFIG_CPU_CORTEXA9 */
+
+#endif /* __LIBDEV_EB_IRQ_H__  */

conts/userlibs/libdev/include/dev/platform/eb/platform.h

@@ -0,0 +1,14 @@
+/*
+ * Platform offsets for eb.
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ */
+#ifndef __LIBDEV_PLATFORM_EB_H__
+#define __LIBDEV_PLATFORM_EB_H__
+
+#include <dev/platform/realview/platform.h>
+
+#define PLATFORM_CLCD0_BASE		0x10020000 /* CLCD0 */
+
+#endif /* __LIBDEV_PLATFORM_EB_H__  */

conts/userlibs/libdev/include/dev/platform/pb926/irq.h

@@ -0,0 +1,15 @@
+/*
+ * IRQ numbers for pb926.
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ */
+#ifndef __LIBDEV_PB926_IRQ_H__
+#define __LIBDEV_PB926_IRQ_H__
+
+#define IRQ_TIMER1		5
+#define IRQ_CLCD0		16
+#define IRQ_KEYBOARD0           34
+#define IRQ_MOUSE0              35
+
+#endif /* __LIBDEV_PB926_IRQ_H__  */

conts/userlibs/libdev/include/dev/platform/pb926/platform.h

@@ -0,0 +1,15 @@
+/*
+ * Platform offsets for pb926.
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ */
+#ifndef __LIBDEV_PLATFORM_PB926_H__
+#define __LIBDEV_PLATFORM_PB926_H__
+
+#define PLATFORM_KEYBOARD0_BASE		0x10006000 /* Keyboard */
+#define PLATFORM_MOUSE0_BASE            0x10007000 /* Mouse */
+#define	PLATFORM_TIMER1_BASE		0x101E3000 /* Timers 2 and 3 */
+#define	PLATFORM_CLCD0_BASE		0x10120000 /* Color LCD */
+
+#endif /* __LIBDEV_PLATFORM_PB926_H__  */

conts/userlibs/libdev/include/dev/platform/pba9/irq.h

@@ -0,0 +1,15 @@
+/*
+ * IRQ numbers for pba9.
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ */
+#ifndef __LIBDEV_PBA9_IRQ_H__
+#define __LIBDEV_PBA9_IRQ_H__
+
+#define IRQ_TIMER1		35
+#define IRQ_KEYBOARD0		44
+#define IRQ_MOUSE0		45
+#define IRQ_CLCD0		46
+
+#endif /* __LIBDEV_PBA9_IRQ_H__  */

conts/userlibs/libdev/include/dev/platform/pba9/platform.h

@@ -0,0 +1,14 @@
+/*
+ * Platform offsets for versatile express.
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ */
+#ifndef __LIBDEV_PLATFORM_PBA9_H__
+#define __LIBDEV_PLATFORM_PBA9_H__
+
+#include <dev/platform/realview/platform.h>
+
+#define PLATFORM_CLCD0_BASE		0x1001F000 /* CLCD */
+
+#endif /* __LIBDEV_PLATFORM_PBA9_H__  */

conts/userlibs/libdev/include/dev/platform/realview/platform.h

@@ -0,0 +1,17 @@
+/*
+ * Common Platform offsets for realview platforms.
+ * It includes:
+ * 	a. pba9
+ * 	b. eb
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ */
+#ifndef __LIBDEV_PLATFORM_REALVIEW_H__
+#define __LIBDEV_PLATFORM_REALVIEW_H__
+
+#define PLATFORM_KEYBOARD0_BASE         0x10006000 /* Keyboard */
+#define PLATFORM_MOUSE0_BASE            0x10007000 /* Mouse */
+#define PLATFORM_TIMER1_BASE		0x10012000 /* Timers 2 and 3 */
+
+#endif /* __LIBDEV_PLATFORM_REALVIEW_H__  */

conts/userlibs/libdev/include/dev/timer.h

@@ -0,0 +1,23 @@
+/*
+ * Generic timer library API
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ * Author: Bahadir Balban
+ */
+#ifndef __LIBDEV_TIMER_H__
+#define __LIBDEV_TIMER_H__
+
+/*
+ * Simple API for the primary timer
+ * for userspace
+ */
+void timer_start(unsigned long timer_base);
+void timer_load(u32 val, unsigned long timer_base);
+u32 timer_read(unsigned long timer_base);
+void timer_stop(unsigned long timer_base);
+void timer_init_oneshot(unsigned long timer_base);
+void timer_init_periodic(unsigned long timer_base, u32 load_value);
+void timer_init(unsigned long timer_base, u32 load_value);
+
+#endif /* __LIBDEV_TIMER_H__ */

conts/userlibs/libdev/include/dev/uart.h

@@ -0,0 +1,21 @@
+/*
+ * Generic uart API
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ * Author: Bahadir Balban
+ */
+#ifndef __LIBDEV_UART_H__
+#define __LIBDEV_UART_H__
+
+void uart_tx_char(unsigned long uart_base, char c);
+char uart_rx_char(unsigned long uart_base);
+void uart_set_baudrate(unsigned long uart_base, unsigned int val);
+void uart_init(unsigned long base);
+
+/*
+ * Base of primary uart used for printf
+ */
+extern unsigned long uart_print_base;
+
+#endif /* __LIBDEV_UART_H__  */

conts/userlibs/libdev/kmi/pl050/SConscript

@@ -0,0 +1,24 @@
+import sys
+
+Import('env')
+
+# Get global paths
+PROJRELROOT = '../../../'
+sys.path.append(PROJRELROOT)
+
+from scripts.config.configuration import *
+config = configuration_retrieve()
+platform = config.platform
+
+#Platforms using pl050
+plat_list = ('eb', 'pba9', 'pb926')
+
+# The set of source files associated with this SConscript file.
+src_local = []
+
+for plat_supported in plat_list:
+    if plat_supported == platform:
+        src_local += Glob('*.c')
+
+obj = env.StaticObject(src_local)
+Return('obj')

conts/userlibs/libdev/kmi/pl050/keymap.h

@@ -0,0 +1,286 @@
+
+#ifndef __KEYMAP_H__
+#define __KEYMAP_H__
+
+/* Special meaning keys */
+#define KEYCODE_LSHIFT      0x101
+#define KEYCODE_RSHIFT      0x102
+#define KEYCODE_LCTRL       0x103
+#define KEYCODE_RCTRL       0x104
+#define KEYCODE_ALT         0x105
+#define KEYCODE_ALTGR       0x106
+
+#define KEYCODE_CAPSLK      0x201
+#define KEYCODE_SCRLK       0x202
+#define KEYCODE_NUMLK       0x203
+
+#define KEYCODE_RETURN      0x303
+#define KEYCODE_ESCAPE      0x304
+#if 0
+#define KEYCODE_TAB         0x301
+#define KEYCODE_BACKSP      0x302
+#define KEYCODE_ENTER       0x305
+#else
+#define KEYCODE_TAB         '\t'
+#define KEYCODE_BACKSP      '\b'
+#define KEYCODE_ENTER       '\n'
+#endif
+
+#define KEYCODE_PRTSCR      0x401
+#define KEYCODE_BREAK       0x402
+#define KEYCODE_INSERT      0x403
+#define KEYCODE_HOME        0x404
+#define KEYCODE_PAGEUP      0x405
+#define KEYCODE_DELETE      0x406
+#define KEYCODE_END         0x407
+#define KEYCODE_PAGEDN      0x408
+
+#define KEYCODE_UP          0x501
+#define KEYCODE_DOWN        0x502
+#define KEYCODE_LEFT        0x503
+#define KEYCODE_RIGHT       0x504
+#define KEYCODE_CENTER      0x505
+
+#define KEYCODE_F1          0x601
+#define KEYCODE_F2          0x602
+#define KEYCODE_F3          0x603
+#define KEYCODE_F4          0x604
+#define KEYCODE_F5          0x605
+#define KEYCODE_F6          0x606
+#define KEYCODE_F7          0x607
+#define KEYCODE_F8          0x608
+#define KEYCODE_F9          0x609
+#define KEYCODE_F10         0x60A
+#define KEYCODE_F11         0x60B
+#define KEYCODE_F12         0x60C
+
+#define KEYCODE_WINL        0x701
+#define KEYCODE_WINR        0x702
+#define KEYCODE_MENU        0x703
+
+#define MODIFIER_EXTENDED   0x00100000
+#define MODIFIER_EXTENDED2  0x00200000
+#define MODIFIER_RCTRL      0x00400000
+#define MODIFIER_RSHIFT     0x00800000
+#define MODIFIER_LSHIFT     0x01000000
+#define MODIFIER_LCTRL      0x02000000
+#define MODIFIER_ALT        0x04000000
+#define MODIFIER_ALTGR      0x08000000
+#define MODIFIER_SCRLK      0x10000000
+#define MODIFIER_NUMLK      0x20000000
+#define MODIFIER_CAPSLK     0x40000000
+#define MODIFIER_RELEASE    0x80000000
+#define MODIFIER_SHIFT      (MODIFIER_LSHIFT | MODIFIER_RSHIFT)
+#define MODIFIER_CTRL       (MODIFIER_LCTRL | MODIFIER_RCTRL)
+
+struct keyboard_key {
+	int nomods;
+	int shift;
+	int ext_nomods;
+	int ext_shift;
+};
+
+/*
+ * Keymap for a UK keyboard
+ * maps key numbers->key codes
+ *
+ * We will use scan code index to get the key
+ *
+ * FIXME: element 1 and 4 gives, muticharacter
+ * character constant error, fix this.
+ */
+struct keyboard_key keymap_uk2[256] = {
+/*  0    */     {0,0,0,0},
+#if 0
+/*  1    */     {'`','¬',0,0},
+#else
+/*  1    */     {'`',0,0,0},
+#endif
+/*  2    */     {'1','!',0,0},
+/*  3    */     {'2','"',0,0},
+#if 0
+/*  4    */     {'3','£',0,0},
+#else
+/*  4    */     {'3',0,0,0},
+#endif
+/*  5    */     {'4','$',0,0},
+/*  6    */     {'5','%',0,0},
+/*  7    */     {'6','^',0,0},
+/*  8    */     {'7','&',0,0},
+/*  9    */     {'8','*',0,0},
+/*  10   */     {'9','(',0,0},
+/*  11   */     {'0',')',0,0},
+/*  12   */     {'-','_',0,0},
+/*  13   */     {'=','+',0,0},
+/*  14   */     {0,0,0,0},
+/*  15   */     {KEYCODE_BACKSP,0,0,0},
+/*  16   */     {KEYCODE_TAB,0,0,0},
+/*  17   */     {'q','Q',0,0},
+/*  18   */     {'w','W',0,0},
+/*  19   */     {'e','E',0,0},
+/*  20   */     {'r','R',0,0},
+/*  21   */     {'t','T',0,0},
+/*  22   */     {'y','Y',0,0},
+/*  23   */     {'u','U',0,0},
+/*  24   */     {'i','I',0,0},
+/*  25   */     {'o','O',0,0},
+/*  26   */     {'p','P',0,0},
+/*  27   */     {'[','{',0,0},
+/*  28   */     {']','}',0,0},
+/*  29   */     {'#','~',0,0},
+/*  30   */     {KEYCODE_CAPSLK,0,0,0},
+/*  31   */     {'a','A',0,0},
+/*  32   */     {'s','S',0,0},
+/*  33   */     {'d','D',0,0},
+/*  34   */     {'f','F',0,0},
+/*  35   */     {'g','G',0,0},
+/*  36   */     {'h','H',0,0},
+/*  37   */     {'j','J',0,0},
+/*  38   */     {'k','K',0,0},
+/*  39   */     {'l','L',0,0},
+/*  40   */     {';',':',0,0},
+/*  41   */     {'\'','@',0,0},
+/*  42   */     {0,0,0,0},
+/*  43   */     {'\n','\n',KEYCODE_ENTER,0},
+/*  44   */     {KEYCODE_LSHIFT,0,0,0},
+/*  45   */     {'\\','|',0,0},
+/*  46   */     {'z','Z',0,0},
+/*  47   */     {'x','X',0,0},
+/*  48   */     {'c','C',0,0},
+/*  49   */     {'v','V',0,0},
+/*  50   */     {'b','B',0,0},
+/*  51   */     {'n','N',0,0},
+/*  52   */     {'m','M',0,0},
+/*  53   */     {',','<',0,0},
+/*  54   */     {'.','>',0,0},
+/*  55   */     {'/','?','/' | MODIFIER_NUMLK,0},
+/*  56   */     {0,0,0,0},
+/*  57   */     {KEYCODE_RSHIFT,0,0,0},
+/*  58   */     {KEYCODE_LCTRL,0,KEYCODE_RCTRL,0},
+/*  59   */     {0,0,0,0},
+/*  60   */     {KEYCODE_ALT,0,KEYCODE_ALTGR,0},
+/*  61   */     {' ',0,0,0},
+/*  62   */     {KEYCODE_ALTGR,0,0,0},
+/*  63   */     {0,0,0,0},
+/*  64   */     {KEYCODE_RCTRL,0,0,0},
+/*  65   */     {0,0,0,0},
+/*  66   */     {0,0,0,0},
+/*  67   */     {0,0,0,0},
+/*  68   */     {0,0,0,0},
+/*  69   */     {0,0,0,0},
+/*  70   */     {0,0,0,0},
+/*  71   */     {0,0,0,0},
+/*  72   */     {0,0,0,0},
+/*  73   */     {0,0,0,0},
+/*  74   */     {0,0,0,0},
+/*  75   */     {KEYCODE_INSERT,0,0,0},
+/*  76   */     {KEYCODE_DELETE,0,0,0},
+/*  77   */     {0,0,0,0},
+/*  78   */     {0,0,0,0},
+/*  79   */     {KEYCODE_LEFT,0,0,0},
+/*  80   */     {KEYCODE_HOME,0,0,0},
+/*  81   */     {KEYCODE_END,0,0,0},
+/*  82   */     {0,0,0,0},
+/*  83   */     {KEYCODE_UP,0,0,0},
+/*  84   */     {KEYCODE_DOWN,0,0,0},
+/*  85   */     {KEYCODE_PAGEUP,0,0,0},
+/*  86   */     {KEYCODE_PAGEDN,0,0,0},
+/*  87   */     {0,0,0,0},
+/*  88   */     {0,0,0,0},
+/*  89   */     {KEYCODE_RIGHT,0,0,0},
+/*  90   */     {KEYCODE_NUMLK,0,KEYCODE_BREAK,0},
+/*  91   */     {KEYCODE_HOME | MODIFIER_NUMLK,0,KEYCODE_HOME,0},
+/*  92   */     {KEYCODE_LEFT | MODIFIER_NUMLK,0,KEYCODE_LEFT,0},
+/*  93   */     {KEYCODE_END | MODIFIER_NUMLK,0,KEYCODE_END,0},
+/*  94   */     {0,0,0,0},
+/*  95   */     {'/' | MODIFIER_NUMLK,0,0},
+/*  96   */     {KEYCODE_UP | MODIFIER_NUMLK,0,KEYCODE_UP,0},
+/*  97   */     {KEYCODE_CENTER | MODIFIER_NUMLK,0,KEYCODE_CENTER,0},
+/*  98   */     {KEYCODE_DOWN | MODIFIER_NUMLK,0,KEYCODE_DOWN,0},
+/*  99   */     {KEYCODE_INSERT | MODIFIER_NUMLK,0,KEYCODE_INSERT,0},
+/*  100  */     {'*' | MODIFIER_NUMLK,0,KEYCODE_PRTSCR,0},
+/*  101  */     {KEYCODE_PAGEUP | MODIFIER_NUMLK,0,KEYCODE_PAGEUP,0},
+/*  102  */     {KEYCODE_RIGHT | MODIFIER_NUMLK,0,KEYCODE_RIGHT,0},
+/*  103  */     {KEYCODE_PAGEDN | MODIFIER_NUMLK,0,KEYCODE_PAGEDN,0},
+/*  104  */     {KEYCODE_DELETE | MODIFIER_NUMLK,0,KEYCODE_DELETE,0},
+/*  105  */     {'-' | MODIFIER_NUMLK,0,0,0},
+/*  106  */     {'+' | MODIFIER_NUMLK,0,0,0},
+/*  107  */     {KEYCODE_ENTER,0,0,0},
+/*  108  */     {0,0,0,0},
+/*  109  */     {0,0,0,0},
+/*  110  */     {KEYCODE_ESCAPE,0,0,0},
+/*  111  */     {0,0,0,0},
+/*  112  */     {KEYCODE_F1,0,0,7},
+/*  113  */     {KEYCODE_F2,0,0,0},
+/*  114  */     {KEYCODE_F3,0,0,0},
+/*  115  */     {KEYCODE_F4,0,0,0},
+/*  116  */     {KEYCODE_F5,0,0,0},
+/*  117  */     {KEYCODE_F6,0,0,0},
+/*  118  */     {KEYCODE_F7,0,0,0},
+/*  119  */     {KEYCODE_F8,0,0,0},
+/*  120  */     {KEYCODE_F9,0,0,0},
+/*  121  */     {KEYCODE_F10,0,0,0},
+/*  122  */     {KEYCODE_F11,0,0,0},
+/*  123  */     {KEYCODE_F12,0,0,0},
+/*  124  */     {KEYCODE_PRTSCR,0,0,0},
+/*  125  */     {KEYCODE_SCRLK,0,KEYCODE_BREAK,0},
+/*  126  */     {KEYCODE_BREAK,0,0,0},
+/*  127  */     {0,0,0,0},
+/*  128  */     {KEYCODE_WINL,0,KEYCODE_WINL,0},
+/*  129  */     {KEYCODE_WINR,0,KEYCODE_WINR,0},
+/*  130  */     {KEYCODE_MENU,0,KEYCODE_MENU,0},
+/* currently no keys with numbers > 130 */
+/*  131  */     {0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},
+/*  140  */     {0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},
+/*  150  */     {0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},
+/*  160  */     {0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},
+/*  170  */     {0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},
+/*  180  */     {0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},
+/*  190  */     {0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},
+/*  200  */     {0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},
+/*  210  */     {0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},
+/*  220  */     {0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},
+/*  230  */     {0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},
+/*  240  */     {0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},
+/*  250  */     {0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0},{0,0,0,0}
+};
+
+/*
+ * Scan code to key number conversion table for
+ * an extended AT keyboard in mode 2
+ *
+ * This will give us the key index for keyboard
+ */
+int scancode_mode2_extended[256] = {
+  	0, 	120, 	0, 	116, 	114, 	112, 	113,
+	123, 	0, 	121, 	119, 	117, 	115,	16,
+	1, 	0, 	0, 	60, 	44, 	0, 	58,
+	17, 	2, 	0, 	0, 	0, 	46, 	32,
+	31, 	18,	3, 	128, 	0, 	48, 	47,
+	33, 	19, 	5, 	4, 	129, 	0, 	61,
+	49, 	34, 	21, 	20,	6, 	130, 	0,
+	51, 	50, 	36, 	35, 	22, 	7, 	0,
+	0, 	0, 	52, 	37, 	23, 	8, 	9,
+	0, 	0, 	53, 	38, 	24, 	25, 	11,
+	10, 	0, 	0, 	54, 	55, 	39, 	40,
+	26, 	12, 	0, 	0, 	0, 	41, 	0,
+	27, 	13, 	0, 	0, 	30, 	57, 	43,
+	28, 	0, 	29, 	0, 	0, 	0, 	45,
+	0, 	0, 	0, 	0, 	15, 	0, 	0,
+	93, 	0, 	92, 	91, 	0, 	0, 	0,
+	99, 	104,	98, 	97, 	102, 	96, 	110,
+	90, 	122, 	106, 	103, 	105, 	100, 	101,
+	125,  	0, 	0, 	0, 	0, 	118, 	0,
+	0, 	0, 	0, 	0, 	0, 	0, 	0,
+	0, 	0, 	0, 	0,
+  	/* no keys with codes > 0x8F */
+  	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+#endif /* __KEYMAP_H__ */

conts/userlibs/libdev/kmi/pl050/kmi.c

@@ -0,0 +1,386 @@
+
+/*
+ * PL050 Primecell Keyboard, Mouse driver
+ *
+ * Copyright (C) 2010 Amit Mahajan
+ */
+
+#include <dev/kmi.h>
+#include "kmi.h"
+#include "keymap.h"
+
+/* Enable Rx irq */
+void kmi_rx_irq_enable(unsigned long base)
+{
+	*(volatile unsigned long *)(base + PL050_KMICR) = KMI_RXINTR;
+}
+
+int kmi_data_read(unsigned long base)
+{
+	/* Check and return if data present */
+	if (*(volatile unsigned long *)(base + PL050_KMISTAT) & KMI_RXFULL)
+		return *(volatile unsigned long *)(base + PL050_KMIDATA);
+	else
+		return 0;
+}
+
+#if 0
+char kmi_keyboard_read(int c, struct keyboard_state *state)
+{
+	int keycode, shkeycode;
+	int keynum;
+	int extflag;
+	int modmask;
+
+	/* Special codes */
+	switch (c) {
+	case 0xF0:
+		/* release */
+		state->modifiers |= MODIFIER_RELEASE;
+ 		return 0;
+	case 0xE0:
+		/* extended */
+		state->modifiers |= MODIFIER_EXTENDED;
+		return 0;
+	case 0xE1:
+		/* extended for 2 characters - only used for Break in mode 2 */
+		state->modifiers |= MODIFIER_EXTENDED;
+		state->modifiers |= MODIFIER_EXTENDED2;
+ 		return 0;
+ 	}
+
+		extflag = 1;
+		modmask = 0xFFFFFFFF;
+
+		/* Is this a scan code? */
+		if (c > 0 && c <= 0x9F)
+		{
+			keynum = scancode_mode2_extended[c];
+
+			/* ignore unrecognised codes */
+			if (!keynum)
+			{
+				state->modifiers &= ~MODIFIER_RELEASE;
+				return 0;
+			}
+
+			/* is this an extended code? */
+			if (state->modifiers & MODIFIER_EXTENDED)
+			{
+				keycode = keymap_uk2[keynum].ext_nomods;
+				extflag = 0;
+				state->modifiers &= ~MODIFIER_EXTENDED;
+				if (!keycode)
+				{
+					state->modifiers &= ~MODIFIER_RELEASE;
+					return 0;
+				}
+			}
+			else if (state->modifiers & MODIFIER_EXTENDED2)
+			{
+				keycode = keymap_uk2[keynum].ext_nomods;
+				extflag = 0;
+				state->modifiers &= ~MODIFIER_EXTENDED2;
+				if (!keycode)
+				{
+					state->modifiers &= ~MODIFIER_RELEASE;
+					return 0;
+				}
+			}
+			else
+			{
+				keycode = keymap_uk2[keynum].nomods;
+				if (!keycode)
+				{
+					state->modifiers &= ~MODIFIER_RELEASE;
+					return 0;
+				}
+			}
+
+			/* handle shift */
+			if (state->modifiers & MODIFIER_CAPSLK)
+			{
+				if (keycode >= 'a' && keycode <= 'z')
+				{
+					if (!(state->modifiers & MODIFIER_SHIFT))
+					{
+						shkeycode = !extflag ? keymap_uk2[keynum].ext_shift : keymap_uk2[keynum].shift;
+						if (shkeycode)
+							keycode = shkeycode;
+					}
+				}
+				else
+				{
+					if (state->modifiers & MODIFIER_SHIFT)
+					{
+						shkeycode = !extflag ? keymap_uk2[keynum].ext_shift : keymap_uk2[keynum].shift;
+						if (shkeycode)
+							keycode = shkeycode;
+					}
+				}
+			}
+			else
+			{
+				if (state->modifiers & MODIFIER_SHIFT)
+				{
+					shkeycode = extflag ? keymap_uk2[keynum].ext_shift : keymap_uk2[keynum].shift;
+					if (shkeycode)
+						keycode = shkeycode;
+				}
+			}
+
+			/* handle the numeric keypad */
+			if (keycode & MODIFIER_NUMLK)
+			{
+				keycode &= ~MODIFIER_NUMLK;
+
+				if (state->modifiers & MODIFIER_NUMLK)
+				{
+					if (!(state->modifiers & MODIFIER_SHIFT))
+					{
+						switch (keycode)
+						{
+							case KEYCODE_HOME:
+								keycode = '7';
+								break;
+							case KEYCODE_UP:
+								keycode = '8';
+								break;
+							case KEYCODE_PAGEUP:
+								keycode = '9';
+								break;
+							case KEYCODE_LEFT:
+								keycode = '4';
+								break;
+							case KEYCODE_CENTER:
+								keycode = '5';
+								break;
+							case KEYCODE_RIGHT:
+								keycode = '6';
+								break;
+							case KEYCODE_END:
+								keycode = '1';
+								break;
+							case KEYCODE_DOWN:
+								keycode = '2';
+								break;
+							case KEYCODE_PAGEDN:
+								keycode = '3';
+								break;
+							case KEYCODE_INSERT:
+								keycode = '0';
+								break;
+							case KEYCODE_DELETE:
+								keycode = '.';
+								break;
+						}
+					}
+					else
+						modmask = ~MODIFIER_SHIFT;
+				}
+			}
+
+			/* modifier keys */
+			switch (keycode)
+			{
+				case KEYCODE_LSHIFT:
+					if (state->modifiers & MODIFIER_RELEASE)
+						state->modifiers &= ~(MODIFIER_LSHIFT | MODIFIER_RELEASE);
+					else
+						state->modifiers |= MODIFIER_LSHIFT;
+					return 0;
+
+				case KEYCODE_RSHIFT:
+					if (state->modifiers & MODIFIER_RELEASE)
+						state->modifiers &= ~(MODIFIER_RSHIFT | MODIFIER_RELEASE);
+					else
+						state->modifiers |= MODIFIER_RSHIFT;
+					return 0;
+
+				case KEYCODE_LCTRL:
+					if (state->modifiers & MODIFIER_RELEASE)
+						state->modifiers &= ~(MODIFIER_LCTRL | MODIFIER_RELEASE);
+					else
+						state->modifiers |= MODIFIER_LCTRL;
+					return 0;
+
+				case KEYCODE_RCTRL:
+					if (state->modifiers & MODIFIER_RELEASE)
+						state->modifiers &= ~(MODIFIER_RCTRL | MODIFIER_RELEASE);
+					else
+						state->modifiers |= MODIFIER_RCTRL;
+					return 0;
+
+				case KEYCODE_ALT:
+					if (state->modifiers & MODIFIER_RELEASE)
+						state->modifiers &= ~(MODIFIER_ALT | MODIFIER_RELEASE);
+					else
+						state->modifiers |= MODIFIER_ALT;
+					return 0;
+
+				case KEYCODE_ALTGR:
+					if (state->modifiers & MODIFIER_RELEASE)
+						state->modifiers &= ~(MODIFIER_ALTGR | MODIFIER_RELEASE);
+					else
+						state->modifiers |= MODIFIER_ALTGR;
+					return 0;
+
+				case KEYCODE_CAPSLK:
+					if (state->modifiers & MODIFIER_RELEASE)
+						state->modifiers &= ~MODIFIER_RELEASE;
+					else
+					{
+						state->modifiers ^= MODIFIER_CAPSLK;
+						//__keyb_update_locks (state);
+					}
+					return 0;
+
+				case KEYCODE_SCRLK:
+					if (state->modifiers & MODIFIER_RELEASE)
+						state->modifiers &= ~MODIFIER_RELEASE;
+					else
+					{
+						state->modifiers ^= MODIFIER_SCRLK;
+						//__keyb_update_locks (state);
+					}
+					return 0;
+
+				case KEYCODE_NUMLK:
+					if (state->modifiers & MODIFIER_RELEASE)
+						state->modifiers &= ~MODIFIER_RELEASE;
+					else
+					{
+						state->modifiers ^= MODIFIER_NUMLK;
+						//__keyb_update_locks (state);
+					}
+					return 0;
+			}
+
+			if (state->modifiers & MODIFIER_RELEASE)
+			{
+				/* clear release condition */
+				state->modifiers &= ~MODIFIER_RELEASE;
+			}
+			else
+			{
+				/* write code into the buffer */
+				return keycode;
+			}
+			return 0;
+		}
+
+	return 0;
+}
+#endif
+
+/*
+ * Simple logic to interpret keyboard keys and shift keys
+ * TODO: Add support for all the modifier keys
+ *
+ * Keyevents work in 3 phase manner, if you press 'A':
+ * 1. scan code for 'A' is generated
+ * 2. Key release event i.e KYBD_DATA_KEYUP
+ * 3. scan code for 'A' again is generated
+ */
+char kmi_keyboard_read(unsigned long base, struct keyboard_state *state)
+{
+	int keynum, keycode = 0;
+
+	/* Read Keyboard RX buffer */
+	unsigned char data = kmi_data_read(base);
+
+	/* if a key up occurred (key released) occured */
+	if (data == KYBD_DATA_KEYUP) {
+		state->keyup = 1;
+		return 0;
+	}
+	else if (state->keyup){
+		state->keyup = 0;
+
+		/* Check if shift was lifted */
+		if ((data == KYBD_DATA_SHIFTL) || (data == KYBD_DATA_SHIFTR)) {
+			state->shift = 0;
+		}
+		else {
+			/*	Find key number */
+			keynum = scancode_mode2_extended[data];
+			if(state->shift)
+				keycode = keymap_uk2[keynum].shift;
+			else
+				keycode = keymap_uk2[keynum].nomods;
+
+		}
+
+	}
+	else if ((data == KYBD_DATA_SHIFTL) || (data == KYBD_DATA_SHIFTR)) {
+		state->shift = 1;
+	}
+
+	return (unsigned char)keycode;
+}
+
+void kmi_keyboard_init(unsigned long base, unsigned int div)
+{
+	/* STOP KMI */
+	*(volatile unsigned long *)(base + PL050_KMICR) = 0x0;
+
+	/*
+	 * For versatile, KMI refernce clock = 24MHz
+	 * KMI manual says we need 8MHz clock,
+	 * so divide by 3
+	 */
+	*(volatile unsigned long *)(base + PL050_KMICLKDIV) = div;
+
+	/* Enable KMI and TX/RX interrupts */
+	*(volatile unsigned long *)(base + PL050_KMICR) =
+						KMI_RXINTR | KMI_EN;
+
+	/* Reset and wait for reset to complete */
+	*(volatile unsigned long *)(base + PL050_KMIDATA) =
+						KYBD_DATA_RESET;
+	while(kmi_data_read(base) != KYBD_DATA_RTR);
+}
+
+void kmi_mouse_enable(unsigned long base)
+{
+	unsigned long *datareg = (unsigned long *)(base + PL050_KMIDATA);
+
+	*datareg = MOUSE_DATA_ENABLE;
+
+	/*sleep for sometime here */
+
+	while (*datareg != MOUSE_DATA_ACK);
+}
+
+void kmi_mouse_init(unsigned long base, unsigned int div)
+{
+	int data[2];
+
+	/* STOP KMI */
+	*(volatile unsigned long *)(base + PL050_KMICR) = 0x0;
+
+	/*
+	 * For versatile, KMI refernce clock = 24MHz
+	 * KMI manual says we need 8MHz clock,
+	 * so divide by 3
+	 */
+	*(volatile unsigned long *)(base + PL050_KMICLKDIV) = div;
+
+	/* Enable KMI and TX/RX interrupts */
+	*(volatile unsigned long *)(base + PL050_KMICR) =
+						KMI_RXINTR | KMI_EN;
+
+	/* Reset and wait for reset to complete */
+	*(volatile unsigned long *)(base + PL050_KMIDATA) =
+						MOUSE_DATA_RESET;
+
+	do {
+		data[0] = kmi_data_read(base);
+		/* Some sleep here */
+		data[1] = kmi_data_read(base);
+	}while((data[0] != MOUSE_DATA_ACK) && (data[1] != MOUSE_DATA_RTR));
+
+	/* Set enable data code to mouse */
+	kmi_mouse_enable(base);
+}
+

conts/userlibs/libdev/kmi/pl050/kmi.h

@@ -0,0 +1,59 @@
+
+#ifndef __PL050_KMI_H__
+#define __PL050_KMI_H__
+
+/* Register offsets */
+#define PL050_KMICR		0x00
+#define PL050_KMISTAT		0x04
+#define PL050_KMIDATA		0x08
+#define PL050_KMICLKDIV		0x0C
+#define PL050_KMIIR		0x10
+
+/* Bit definitions for KMI control register */
+#define KMI_TYPE		(1 << 0x5)
+#define	KMI_RXINTR		(1 << 0x4)
+#define KMI_TXINTR          	(1 << 0x3)
+#define KMI_EN			(1 << 0x2)
+#define KMI_FD			(1 << 0x1)
+#define	KMI_FC			(1 << 0x0)
+
+/* KMI generic defines */
+#define KMI_DATA_RESET     0xFF
+#define KMI_DATA_RTR       0xAA
+
+/* Keyboard special defines */
+#define KYBD_DATA_RESET     KMI_DATA_RESET	// Keyboard reset
+#define KYBD_DATA_RTR       KMI_DATA_RTR	// Keyboard response to reset
+
+#define KYBD_DATA_KEYUP		0xF0	// Key up control code
+#define KYBD_DATA_SHIFTL	18    	// Shift key left
+#define KYBD_DATA_SHIFTR	89    	// Shift key right
+
+/* Bit definitions for KMI STAT register */
+#define KMI_TXEMPTY	(1 << 0x6)
+#define KMI_TXBUSY	(1 << 0x5)
+#define KMI_RXFULL	(1 << 0x4)
+#define KMI_RXBUSY	(1 << 0x3)
+#define KMI_RXPARITY	(1 << 0x2)
+#define KMI_CLKIN	(1 << 0x1)
+#define KMI_DATAIN	(1 << 0x0)
+
+/* Mouse special defines */
+#define MOUSE_DATA_RESET	KMI_DATA_RESET	// Mouse reset
+#define MOUSE_DATA_RTR		KMI_DATA_RTR	// Mouse response to reset
+#define MOUSE_DATA_ACK		0xFA
+#define MOUSE_DATA_ENABLE   	0xF4    	// Mouse enable
+
+/* Common functions */
+void kmi_rx_irq_enable(unsigned long base);
+int kmi_data_read(unsigned long base);
+
+/* Keyboard specific calls */
+char kmi_keyboard_read(unsigned long base, struct keyboard_state *state);
+void kmi_keyboard_init(unsigned long base, unsigned int div);
+
+/* Mouse specific calls */
+void kmi_mouse_enable(unsigned long base);
+void kmi_mouse_init(unsigned long base, unsigned int div);
+
+#endif /* __PL050_KMI_H__ */

conts/userlibs/libdev/timer/omap/SConscript

@@ -0,0 +1,25 @@
+import sys
+
+Import('env')
+
+# Get global paths
+PROJRELROOT = '../../../'
+sys.path.append(PROJRELROOT)
+
+from scripts.config.configuration import *
+config = configuration_retrieve()
+platform = config.platform
+
+#Platforms using omap_uart
+plat_list = 'beagle'
+
+# The set of source files associated with this SConscript file.
+src_local = []
+
+#for plat_supported in plat_list:
+#if plat_supported == platform:
+if plat_list == platform:
+    src_local += ['timer.c']
+
+obj = env.StaticObject(src_local)
+Return('obj')

conts/userlibs/libdev/timer/omap/timer.c

@@ -0,0 +1,97 @@
+/*
+ * omap GP timer driver honoring generic
+ * timer library API
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ * Author: Bahadir Balban
+ */
+
+#include <dev/io.h>
+#include <l4lib/types.h>
+#include "timer.h"
+
+#define OMAP_TIMER_MAT_IT_FLAG  (1 << 0)
+#define OMAP_TIMER_OVR_IT_FLAG  (1 << 1)
+#define OMAP_TIMER_TCAR_IT_FLAG (1 << 2)
+u32 timer_periodic_intr_status(unsigned long timer_base)
+{
+	volatile u32 reg = read(timer_base + OMAP_TIMER_TISR);
+	return (reg & OMAP_TIMER_OVR_IT_FLAG);
+}
+
+#define OMAP_TIMER_SOFT_RESET	(1 << 1)
+void timer_reset(unsigned long timer_base)
+{
+	/* Reset Timer */
+	write(OMAP_TIMER_SOFT_RESET, timer_base + OMAP_TIMER_TIOCP);
+
+	/* Wait for reset completion */
+	while (!read(timer_base + OMAP_TIMER_TSTAT));
+}
+
+void timer_load(unsigned long timer_base, u32 value)
+{
+	write(value, timer_base + OMAP_TIMER_TLDR);
+	write(value, timer_base + OMAP_TIMER_TCRR);
+}
+
+u32 timer_read(unsigned long timer_base)
+{
+	return read(timer_base + OMAP_TIMER_TCRR);
+}
+
+#define OMAP_TIMER_START	(1 << 0)
+void timer_start(unsigned long timer_base)
+{
+	volatile u32 reg = read(timer_base + OMAP_TIMER_TCLR);
+	reg |= OMAP_TIMER_START;
+	write(reg, timer_base + OMAP_TIMER_TCLR);
+}
+
+void timer_stop(unsigned long timer_base)
+{
+	volatile u32 reg = read(timer_base + OMAP_TIMER_TCLR);
+	reg &= (~OMAP_TIMER_START);
+	write(reg, timer_base + OMAP_TIMER_TCLR);
+}
+
+void timer_init_periodic(unsigned long timer_base)
+{
+	volatile u32 reg;
+
+	/* Reset the timer */
+	timer_reset(timer_base);
+
+	/* Set timer to autoreload mode */
+	reg = read(timer_base + OMAP_TIMER_TCLR);
+	reg |= (1 << OMAP_TIMER_MODE_AUTORELAOD);
+	write(reg, timer_base + OMAP_TIMER_TCLR);
+
+	/*
+	* Beagle Board RevC manual:
+	* overflow period = (0xffffffff - TLDR + 1)*PS*(1/TIMER_FCLK)
+	* where,
+	* PS: Prescaler divisor (we are not using this)
+	*
+	* Beagle board manual says, 26MHz oscillator present on board.
+	* U-Boot divides the sys_clock by 2 if sys_clk is >19MHz,
+	* so,we have sys_clk frequency = 13MHz
+	*
+	* TIMER_FCLK = 13MHz
+	* So, for 1ms period, TLDR = 0xffffcd38
+	*
+	*/
+	timer_load(timer_base, 0xffffcd38);
+
+	/* Clear pending Interrupts, if any */
+	write(7, timer_base + OMAP_TIMER_TISR);
+
+	/* Enable inteerupts */
+	write((1 << OMAP_TIMER_INTR_OVERFLOW), timer_base + OMAP_TIMER_TIER);
+}
+
+void timer_init(unsigned long timer_base)
+{
+	timer_init_periodic(timer_base);
+}

conts/userlibs/libdev/timer/omap/timer.h

@@ -0,0 +1,51 @@
+/*
+ * OMAP GP Timer offsets
+ *
+ * Copyright (C) 2007 Bahadir Balban
+ *
+ */
+#ifndef __OMAP_GPTIMER_H__
+#define __OMAP_GPTIMER_H__
+
+/* Register offsets */
+#define OMAP_TIMER_TIOCP		0x10
+#define OMAP_TIMER_TSTAT		0x14
+#define OMAP_TIMER_TISR                 0x18
+#define OMAP_TIMER_TIER			0x1C
+#define OMAP_TIMER_TCLR			0x24
+#define OMAP_TIMER_TCRR			0x28
+#define OMAP_TIMER_TLDR                 0x2C
+#define OMAP_TIMER_TPIR			0x48
+#define OMAP_TIMER_TNIR			0x4C
+#define OMAP_TIMER_TCVR			0x50
+
+/* Enable/Disable IRQ */
+#define OMAP_TIMER_IRQENABLE		1
+#define OMAP_TIMER_IRQDISABLE		0
+
+/* Timer modes supported */
+#define OMAP_TIMER_MODE_AUTORELAOD	1
+#define OMAP_TIMER_MODE_COMPARE		6
+#define OMAP_TIMER_MODE_CAPTURE		13
+
+/* Interrupt types */
+#define OMAP_TIMER_INTR_MATCH           0x0
+#define OMAP_TIMER_INTR_OVERFLOW        0x1
+#define OMAP_TIMER_INTR_CAPTURE         0x2
+
+/* Clock source for timer */
+#define OMAP_TIMER_CLKSRC_SYS_CLK	0x1
+#define OMAP_TIMER_CLKSRC_32KHZ_CLK	0x0
+
+u32 timer_periodic_intr_status(unsigned long timer_base);
+void timer_start(unsigned long base);
+void timer_set_mode(unsigned long base, int mode);
+void timer_reset(unsigned long timer_base);
+void timer_load(unsigned long timer_base, u32 value);
+u32 timer_read(unsigned long timer_base);
+void timer_start(unsigned long timer_base);
+void timer_stop(unsigned long timer_base);
+void timer_init_periodic(unsigned long timer_base);
+void timer_init(unsigned long timer_base);
+
+#endif /* __OMAP_GPTIMER_H__*/

conts/userlibs/libdev/timer/sp804/SConscript

@@ -0,0 +1,24 @@
+import sys
+
+Import('env')
+
+# Get global paths
+PROJRELROOT = '../../../'
+sys.path.append(PROJRELROOT)
+
+from scripts.config.configuration import *
+config = configuration_retrieve()
+platform = config.platform
+
+#Platforms using sp804
+plat_list = ('eb', 'pba9', 'pb926')
+
+# The set of source files associated with this SConscript file.
+src_local = []
+
+for plat_supported in plat_list:
+    if plat_supported == platform:
+        src_local += Glob('*.c')
+
+obj = env.StaticObject(src_local)
+Return('obj')

conts/userlibs/libdev/timer/sp804/timer.c

@@ -0,0 +1,68 @@
+/*
+ * SP804 primecell driver honoring generic
+ * timer library API
+ *
+ * Copyright (C) 2010 B Labs Ltd.
+ *
+ * Author: Bahadir Balban
+ */
+#include <l4lib/types.h>
+#include "timer.h"
+
+/* Enable timer with its current configuration */
+void timer_start(unsigned long timer_base)
+{
+	volatile u32 reg = read(timer_base + SP804_CTRL);
+
+	reg |= SP804_ENABLE;
+
+	write(reg, timer_base + SP804_CTRL);
+
+}
+
+/* Load the timer with ticks value */
+void timer_load(u32 loadval, unsigned long timer_base)
+{
+	write(loadval, timer_base + SP804_LOAD);
+}
+
+u32 timer_read(unsigned long timer_base)
+{
+	return read(timer_base + SP804_VALUE);
+}
+
+void timer_stop(unsigned long timer_base)
+{
+	write(0, timer_base + SP804_CTRL);
+}
+
+void timer_init_periodic(unsigned long timer_base, u32 load_value)
+{
+	volatile u32 reg = read(timer_base + SP804_CTRL);
+
+	reg |= SP804_PERIODIC | SP804_32BIT | SP804_IRQEN;
+
+	write(reg, timer_base + SP804_CTRL);
+
+	if (load_value)
+		timer_load(load_value, timer_base);
+	else
+		/* 1 tick per usec, 1 irq per msec */
+		timer_load(1000, timer_base);
+}
+
+void timer_init_oneshot(unsigned long timer_base)
+{
+	volatile u32 reg = read(timer_base + SP804_CTRL);
+
+	/* One shot, 32 bits, no irqs */
+	reg |= SP804_32BIT | SP804_ONESHOT;
+
+	write(reg, timer_base + SP804_CTRL);
+}
+
+void timer_init(unsigned long timer_base, u32 load_value)
+{
+	timer_stop(timer_base);
+	timer_init_periodic(timer_base, load_value);
+}

conts/userlibs/libdev/timer/sp804/timer.h

@@ -0,0 +1,63 @@
+/*
+ * SP804 Primecell Timer offsets
+ *
+ * Copyright (C) 2007 Bahadir Balban
+ *
+ */
+#ifndef __SP804_TIMER_H__
+#define __SP804_TIMER_H__
+
+#include <dev/io.h>
+
+/* Register offsets */
+#define SP804_LOAD			0x0
+#define SP804_VALUE			0x4
+#define SP804_CTRL			0x8
+#define SP804_INTCLR			0xC
+#define SP804_RIS			0x10
+#define SP804_MIS			0x14
+#define SP804_BGLOAD			0x18
+
+#define SP804_ENABLE			(1 << 7)
+#define SP804_PERIODIC			(1 << 6)
+#define SP804_IRQEN			(1 << 5)
+#define SP804_32BIT			(1 << 1)
+#define SP804_ONESHOT			(1 << 0)
+
+/* Timer prescaling */
+#define SP804_SCALE_SHIFT		2
+#define SP804_SCALE_DIV16		1
+#define SP804_SCALE_DIV256		2
+
+/* Wrapping = 0, Oneshot = 1 */
+#define SP804_ONESHOT			(1 << 0)
+
+static inline __attribute__ ((always_inline))
+void sp804_load(unsigned long timer_base, u32 val)
+{
+	write(val, timer_base + SP804_LOAD);
+}
+
+static inline __attribute__ ((always_inline))
+void sp804_irq_clear(unsigned long timer_base)
+{
+	write(1, timer_base + SP804_INTCLR);
+}
+
+static inline __attribute__ ((always_inline))
+void sp804_enable(unsigned long timer_base)
+{
+	volatile u32 reg = read(timer_base + SP804_CTRL);
+
+	write(reg | SP804_ENABLE, timer_base + SP804_CTRL);
+}
+
+void timer_start(unsigned long timer_base);
+void timer_load(u32 loadval, unsigned long timer_base);
+u32 timer_read(unsigned long timer_base);
+void timer_stop(unsigned long timer_base);
+void timer_init_periodic(unsigned long timer_base, u32 load_value);
+void timer_init_oneshot(unsigned long timer_base);
+void timer_init(unsigned long timer_base, u32 load_value);
+
+#endif /* __SP804_TIMER_H__ */

conts/userlibs/libdev/uart/omap/SConscript

@@ -0,0 +1,25 @@
+import sys
+
+Import('env')
+
+# Get global paths
+PROJRELROOT = '../../../'
+sys.path.append(PROJRELROOT)
+
+from scripts.config.configuration import *
+config = configuration_retrieve()
+platform = config.platform
+
+#Platforms using omap_uart
+plat_list = 'beagle'
+
+# The set of source files associated with this SConscript file.
+src_local = []
+
+#for plat_supported in plat_list:
+#if plat_supported == platform:
+if plat_list == platform:
+    src_local += ['uart.c']
+
+obj = env.StaticObject(src_local)
+Return('obj')

conts/userlibs/libdev/uart/omap/uart.c

@@ -0,0 +1,115 @@
+/*
+ * UART driver used by OMAP devices
+ *
+ * Copyright (C) 2007 Bahadir Balban
+ */
+
+#include <dev/uart.h>
+#include <dev/io.h>
+#include "uart.h"
+
+#define OMAP_UART_TXFE		0x20
+void uart_tx_char(unsigned long uart_base, char c)
+{
+	volatile u32 reg;
+
+	/* Check if there is space for tx */
+	do {
+		reg = read(uart_base + OMAP_UART_LSR);
+	} while(!(reg & OMAP_UART_TXFE));
+
+	write(c, uart_base + OMAP_UART_THR);
+}
+
+#define OMAP_UART_RXFNE			0x1
+#define OMAP_UART_RX_FIFO_STATUS	0x8
+char uart_rx_char(unsigned long uart_base)
+{
+	volatile u32 reg;
+
+	/* Check if pending data is there */
+	do {
+		reg = read(uart_base + OMAP_UART_LSR);
+	} while(!(reg & OMAP_UART_RXFNE));
+
+#if 0
+	/* Check if there is some error in recieve */
+	if(reg & OMAP_UART_RX_FIFO_STATUS)
+		return -1;
+#endif
+	return (char)read(uart_base + OMAP_UART_RHR);
+
+}
+
+void uart_set_baudrate(unsigned long uart_base, u32 baudrate)
+{
+	u32 clk_div;
+
+	/* 48Mhz clock fixed on beagleboard */
+	const u32 clkrate = 48000000;
+
+	/* If baud out of range, set default rate */
+	if(baudrate > 3686400 || baudrate < 300)
+		baudrate = 115200;
+
+	clk_div = clkrate/(16 * baudrate);
+
+	/* Set clockrate in DLH and DLL */
+	write((clk_div & 0xff), uart_base + OMAP_UART_DLL);
+	write(((clk_div >> 8) & 0xff ), uart_base + OMAP_UART_DLH);
+}
+
+void uart_init(unsigned long uart_base)
+{
+	/* Disable UART */
+	uart_select_mode(uart_base, OMAP_UART_MODE_DEFAULT);
+
+	/* Disable interrupts */
+	uart_disable_interrupt(uart_base);
+
+	/* Change to config mode, to set baud divisor */
+	uart_set_link_control(uart_base, OMAP_UART_BANKED_MODE_CONFIG_A);
+
+	/* Set the baud rate */
+	uart_set_baudrate(uart_base, 115200);
+
+	/* Switch to operational mode */
+	uart_set_link_control(uart_base, OMAP_UART_BANKED_MODE_OPERATIONAL);
+
+	/* Set up the link- parity, data bits stop bits to 8N1 */
+	uart_disable_parity(uart_base);
+	uart_set_data_bits(uart_base, OMAP_UART_DATA_BITS_8);
+	uart_set_stop_bits(uart_base, OMAP_UART_STOP_BITS_1);
+
+	/* Disable Fifos */
+	uart_disable_fifo(uart_base);
+
+	/* Enable modem Rx/Tx */
+	uart_enable_tx(uart_base);
+	uart_enable_rx(uart_base);
+
+	/* Enable UART in 16x mode */
+	uart_select_mode(uart_base, OMAP_UART_MODE_UART16X);
+}
+
+unsigned long uart_print_base;
+
+void platform_init(void)
+{
+	uart_print_base = OMAP_UART_BASE;
+
+	/*
+         * We dont need to initialize uart here for variant-userspace,
+         * as this is the same uart as used by kernel and hence
+         * already initialized, we just need
+         * a uart struct instance with proper base address.
+         *
+         * But in case of baremetal like loader, no one has done
+         * initialization, so we need to do it.
+         */
+#if defined(VARIANT_BAREMETAL)
+	uart_init(uart_print_base);
+#endif
+}
+
+

conts/userlibs/libdev/uart/omap/uart.h

@@ -0,0 +1,195 @@
+/*
+ * OMAP UART Generic driver implementation.
+ *
+ * Copyright (C) 2007 Bahadir Balban
+ *
+ * The particular intention of this code is that it has been carefully written
+ * as decoupled from os-specific code and in a verbose way such that it clearly
+ * demonstrates how the device operates, reducing the amount of time to be spent
+ * for understanding the operational model and implementing a driver from
+ * scratch. This is the very first to be such a driver so far, hopefully it will
+ * turn out to be useful.
+ */
+
+#ifndef __OMAP_UART_H__
+#define __OMAP_UART_H__
+
+#include <l4/config.h> /* To get PLATFORM */
+#include <l4lib/types.h>
+
+#if defined(VARIANT_USERSPACE)
+/* FIXME: Take this value in agreement from kernel, or from kernel only */
+#include <l4/macros.h>
+#include INC_ARCH(io.h)
+#define OMAP_UART_BASE              USERSPACE_CONSOLE_VBASE
+#endif
+
+#if defined(VARIANT_BAREMETAL)
+#if defined(CONFIG_PLATFORM_BEAGLE)
+#define OMAP_UART_BASE		0x49020000
+#endif
+#endif
+
+/* Register offsets */
+#define OMAP_UART_DLL		0x00
+#define OMAP_UART_THR		0x00
+#define OMAP_UART_RHR		0x00
+#define OMAP_UART_DLH		0x04
+#define OMAP_UART_IER		0x04
+#define OMAP_UART_FCR		0x08
+#define OMAP_UART_MCR		0x10
+#define OMAP_UART_LSR		0x14
+#define OMAP_UART_MDR1		0x20
+#define	OMAP_UART_LCR		0x0C
+
+/* Modes supported by OMAP UART/IRDA/CIR IP */
+#define OMAP_UART_MODE_UART16X               0x0
+#define OMAP_UART_MODE_SIR                   0x1
+#define OMAP_UART_MODE_UART16X_AUTO_BAUD     0x2
+#define OMAP_UART_MODE_UART13X               0x3
+#define OMAP_UART_MODE_MIR                   0x4
+#define OMAP_UART_MODE_FIR                   0x5
+#define OMAP_UART_MODE_CIR                   0x6
+#define OMAP_UART_MODE_DEFAULT               0x7 /* Disable */
+
+/* Number of data bits for UART */
+#define OMAP_UART_DATA_BITS_5           0x0
+#define OMAP_UART_DATA_BITS_6           0x1
+#define OMAP_UART_DATA_BITS_7           0x2
+#define OMAP_UART_DATA_BITS_8           0x3
+
+/* Stop bits to be used for UART data */
+#define OMAP_UART_STOP_BITS_1           0x0
+#define OMAP_UART_STOP_BITS_1_5         0x1
+
+/* Banked Register modes- ConfigA, ConfigB, Operational */
+#define OMAP_UART_BANKED_MODE_OPERATIONAL      0x00
+#define OMAP_UART_BANKED_MODE_CONFIG_A         0x80
+#define OMAP_UART_BANKED_MODE_CONFIG_B         0xBF
+
+void uart_tx_char(unsigned long uart_base, char c);
+char uart_rx_char(unsigned long uart_base);
+void uart_set_baudrate(unsigned long uart_base, u32 baudrate);
+void uart_init(unsigned long uart_base);
+
+
+#define OMAP_UART_FIFO_ENABLE	(1 << 0)
+#define OMAP_UART_RX_FIFO_CLR   (1 << 1)
+#define OMAP_UART_TX_FIFO_CLR   (1 << 2)
+static inline void uart_enable_fifo(unsigned long uart_base)
+{
+	volatile u32 reg = read(uart_base + OMAP_UART_FCR);
+	reg |= (OMAP_UART_FIFO_ENABLE | OMAP_UART_RX_FIFO_CLR |
+                OMAP_UART_TX_FIFO_CLR);
+	write(reg, uart_base + OMAP_UART_FCR);
+}
+
+static inline void uart_disable_fifo(unsigned long uart_base)
+{
+	volatile u32 reg= read(uart_base + OMAP_UART_FCR);
+	reg &= (~OMAP_UART_FIFO_ENABLE | OMAP_UART_RX_FIFO_CLR |
+                 OMAP_UART_TX_FIFO_CLR);
+	write(reg, uart_base + OMAP_UART_FCR);
+}
+
+#define OMAP_UART_TX_ENABLE	(1 << 0)
+static inline void uart_enable_tx(unsigned long uart_base)
+{
+	volatile u32 reg = read(uart_base + OMAP_UART_MCR);
+	reg |= OMAP_UART_TX_ENABLE;
+	write(reg, uart_base + OMAP_UART_MCR);
+}
+
+static inline void uart_disable_tx(unsigned long uart_base)
+{
+	volatile u32 reg = read(uart_base + OMAP_UART_MCR);
+	reg &= ~OMAP_UART_TX_ENABLE;
+	write(reg, uart_base + OMAP_UART_MCR);
+
+}
+
+#define OMAP_UART_RX_ENABLE	(1 << 1)
+static inline void uart_enable_rx(unsigned long uart_base)
+{
+	volatile u32 reg = read(uart_base + OMAP_UART_MCR);
+	reg |= OMAP_UART_RX_ENABLE;
+	write(reg, uart_base + OMAP_UART_MCR);
+}
+
+static inline void uart_disable_rx(unsigned long uart_base)
+{
+	volatile u32 reg = read(uart_base + OMAP_UART_MCR);
+	reg &= ~OMAP_UART_RX_ENABLE;
+	write(reg, uart_base + OMAP_UART_MCR);
+}
+
+#define OMAP_UART_STOP_BITS_MASK	(1 << 2)
+static inline void uart_set_stop_bits(unsigned long uart_base, int bits)
+{
+	volatile u32 reg = read(uart_base + OMAP_UART_LCR);
+	reg &= ~OMAP_UART_STOP_BITS_MASK;
+	reg |= (bits << 2);
+	write(reg, uart_base + OMAP_UART_LCR);
+}
+
+#define OMAP_UART_DATA_BITS_MASK	(0x3)
+static inline void uart_set_data_bits(unsigned long uart_base, int bits)
+{
+	volatile u32 reg = read(uart_base + OMAP_UART_LCR);
+	reg &= ~OMAP_UART_DATA_BITS_MASK;
+	reg |= bits;
+	write(reg, uart_base + OMAP_UART_LCR);
+}
+
+#define OMAP_UART_PARITY_ENABLE		(1 << 3)
+static inline void uart_enable_parity(unsigned long uart_base)
+{
+	volatile u32 reg = read(uart_base + OMAP_UART_LCR);
+	reg |= OMAP_UART_PARITY_ENABLE;
+	write(reg, uart_base + OMAP_UART_LCR);
+}
+
+static inline void uart_disable_parity(unsigned long uart_base)
+{
+	volatile u32 reg = read(uart_base + OMAP_UART_LCR);
+	reg &= ~OMAP_UART_PARITY_ENABLE;
+	write(reg, uart_base + OMAP_UART_LCR);
+}
+
+#define OMAP_UART_PARITY_EVEN		(1 << 4)
+static inline void uart_set_even_parity(unsigned long uart_base)
+{
+	volatile u32 reg = read(uart_base + OMAP_UART_LCR);
+	reg |= OMAP_UART_PARITY_EVEN;
+	write(reg, uart_base + OMAP_UART_LCR);
+}
+
+static inline void uart_set_odd_parity(unsigned long uart_base)
+{
+	volatile u32 reg = read(uart_base + OMAP_UART_LCR);
+	reg &= ~OMAP_UART_PARITY_EVEN;
+	write(reg, uart_base + OMAP_UART_LCR);
+}
+
+static inline void uart_select_mode(unsigned long uart_base, int mode)
+{
+	write(mode, uart_base + OMAP_UART_MDR1);
+}
+
+#define OMAP_UART_INTR_EN	1
+static inline void uart_enable_interrupt(unsigned long uart_base)
+{
+	write(OMAP_UART_INTR_EN, uart_base + OMAP_UART_IER);
+}
+
+static inline void uart_disable_interrupt(unsigned long uart_base)
+{
+	write((~OMAP_UART_INTR_EN), uart_base + OMAP_UART_IER);
+}
+
+static inline void uart_set_link_control(unsigned long uart_base, int mode)
+{
+	write(mode, uart_base + OMAP_UART_LCR);
+}
+
+#endif /* __OMAP_UART_H__ */

conts/userlibs/libdev/uart/pl011/SConscript

@@ -0,0 +1,24 @@
+import sys
+
+Import('env')
+
+# Get global paths
+PROJRELROOT = '../../../'
+sys.path.append(PROJRELROOT)
+
+from scripts.config.configuration import *
+config = configuration_retrieve()
+platform = config.platform
+
+#Platforms using pl011
+plat_list = ('eb', 'pba9', 'pb926')
+
+# The set of source files associated with this SConscript file.
+src_local = []
+
+for plat_supported in plat_list:
+    if plat_supported == platform:
+        src_local += Glob('*.c')
+
+obj = env.StaticObject(src_local)
+Return('obj')

conts/userlibs/libdev/uart/pl011/uart.c

@@ -0,0 +1,127 @@
+/*
+ * PL011 UART driver
+ *
+ * Copyright (C) 2009 B Labs Ltd.
+ */
+#include <dev/uart.h>
+#include <dev/io.h>
+#include "uart.h"
+
+/* Error status bits in receive status register */
+#define PL011_FE		(1 << 0)
+#define PL011_PE		(1 << 1)
+#define PL011_BE		(1 << 2)
+#define PL011_OE		(1 << 3)
+
+/* Status bits in flag register */
+#define PL011_TXFE		(1 << 7)
+#define PL011_RXFF		(1 << 6)
+#define PL011_TXFF		(1 << 5)
+#define PL011_RXFE		(1 << 4)
+#define PL011_BUSY		(1 << 3)
+#define PL011_DCD		(1 << 2)
+#define PL011_DSR		(1 << 1)
+#define PL011_CTS		(1 << 0)
+
+void uart_tx_char(unsigned long base, char c)
+{
+	unsigned int val = 0;
+
+	do {
+		val = read((base + PL011_UARTFR));
+	} while (val & PL011_TXFF);  /* TX FIFO FULL */
+
+	write(c, (base + PL011_UARTDR));
+}
+
+char uart_rx_char(unsigned long base)
+{
+	unsigned int val = 0;
+
+	do {
+		val = read(base + PL011_UARTFR);
+	} while (val & PL011_RXFE); /* RX FIFO Empty */
+
+	return (char)read((base + PL011_UARTDR));
+}
+
+/*
+ * Sets the baud rate in kbps. It is recommended to use
+ * standard rates such as: 1200, 2400, 3600, 4800, 7200,
+ * 9600, 14400, 19200, 28800, 38400, 57600 76800, 115200.
+ */
+void pl011_set_baudrate(unsigned long base, unsigned int baud,
+			unsigned int clkrate)
+{
+	const unsigned int uartclk = 24000000;	/* 24Mhz clock fixed on pb926 */
+	unsigned int val = 0, ipart = 0, fpart = 0;
+
+	/* Use default pb926 rate if no rate is supplied */
+	if (clkrate == 0)
+		clkrate = uartclk;
+	if (baud > 115200 || baud < 1200)
+		baud = 38400;	/* Default rate. */
+
+	/* 24000000 / (38400 * 16) */
+	ipart = 39;
+
+	write(ipart, base + PL011_UARTIBRD);
+	write(fpart, base + PL011_UARTFBRD);
+
+	/*
+	 * For the IBAUD and FBAUD to update, we need to
+	 * write to UARTLCR_H because the 3 registers are
+	 * actually part of a single register in hardware
+	 * which only updates by a write to UARTLCR_H
+	 */
+	val = read(base + PL011_UARTLCR_H);
+	write(val, base + PL011_UARTLCR_H);
+
+}
+
+void uart_init(unsigned long uart_base)
+{
+	/* Initialise data register for 8 bit data read/writes */
+	pl011_set_word_width(uart_base, 8);
+
+	/*
+	 * Fifos are disabled because by default it is assumed the port
+	 * will be used as a user terminal, and in that case the typed
+	 * characters will only show up when fifos are flushed, rather than
+	 * when each character is typed. We avoid this by not using fifos.
+	 */
+	pl011_disable_fifos(uart_base);
+
+	/* Set default baud rate of 38400 */
+	pl011_set_baudrate(uart_base, 38400, 24000000);
+
+	/* Set default settings of 1 stop bit, no parity, no hw flow ctrl */
+	pl011_set_stopbits(uart_base, 1);
+	pl011_parity_disable(uart_base);
+
+	/* Enable rx, tx, and uart chip */
+	pl011_tx_enable(uart_base);
+	pl011_rx_enable(uart_base);
+	pl011_uart_enable(uart_base);
+}
+
+unsigned long uart_print_base;
+
+void platform_init(void)
+{
+	uart_print_base = PL011_BASE;
+
+	/*
+	 * We dont need to initialize uart here for variant-userspace,
+	 * as this is the same uart as used by kernel and hence
+	 * already initialized, we just need
+	 * a uart struct instance with proper base address.
+	 *
+	 * But in case of baremetal like loader, no one has done
+	 * initialization, so we need to do it.
+	 */
+#if defined(VARIANT_BAREMETAL)
+	uart_init(uart_print_base);
+#endif
+}
+

conts/userlibs/libdev/uart/pl011/uart.h

@@ -0,0 +1,249 @@
+/*
+ * PL011 UART Generic driver implementation.
+ * Copyright Bahadir Balban (C) 2009
+ */
+#ifndef __PL011_H__
+#define __PL011_H__
+
+#include <l4/config.h> /* To get PLATFORM */
+#include <dev/io.h>
+
+#if defined(VARIANT_USERSPACE)
+#include <l4/macros.h>
+#include INC_ARCH(io.h)
+#define PL011_BASE		USERSPACE_CONSOLE_VBASE
+#endif
+
+#if defined(VARIANT_BAREMETAL)
+#if defined(CONFIG_PLATFORM_PB926)
+#define PL011_BASE		0x101F1000
+#elif defined(CONFIG_PLATFORM_EB) || defined(CONFIG_PLATFORM_PBA9)
+#define PL011_BASE              0x10009000
+#endif
+#endif
+
+/* Register offsets */
+#define PL011_UARTDR		0x00
+#define PL011_UARTRSR		0x04
+#define PL011_UARTECR		0x04
+#define PL011_UARTFR		0x18
+#define PL011_UARTILPR		0x20
+#define PL011_UARTIBRD		0x24
+#define PL011_UARTFBRD		0x28
+#define PL011_UARTLCR_H		0x2C
+#define PL011_UARTCR		0x30
+#define PL011_UARTIFLS		0x34
+#define PL011_UARTIMSC		0x38
+#define PL011_UARTRIS		0x3C
+#define PL011_UARTMIS		0x40
+#define PL011_UARTICR		0x44
+#define PL011_UARTDMACR		0x48
+
+/* IRQ bits for each uart irq event */
+#define PL011_RXIRQ		(1 << 4)
+#define PL011_TXIRQ		(1 << 5)
+#define PL011_RXTIMEOUTIRQ	(1 << 6)
+#define PL011_FEIRQ		(1 << 7)
+#define PL011_PEIRQ		(1 << 8)
+#define PL011_BEIRQ		(1 << 9)
+#define PL011_OEIRQ		(1 << 10)
+
+
+void pl011_set_baudrate(unsigned long base, unsigned int baud,
+			unsigned int clkrate);
+
+#define PL011_UARTEN	(1 << 0)
+static inline void pl011_uart_enable(unsigned long base)
+{
+	unsigned int val = 0;
+
+	val = read((base + PL011_UARTCR));
+	val |= PL011_UARTEN;
+	write(val, (base + PL011_UARTCR));
+
+	return;
+}
+
+static inline void pl011_uart_disable(unsigned long base)
+{
+	unsigned int val = 0;
+
+	val = read((base + PL011_UARTCR));
+	val &= ~PL011_UARTEN;
+	write(val, (base + PL011_UARTCR));
+
+	return;
+}
+
+#define PL011_TXE	(1 << 8)
+static inline void pl011_tx_enable(unsigned long base)
+{
+	unsigned int val = 0;
+
+	val = read((base + PL011_UARTCR));
+	val |= PL011_TXE;
+	write(val, (base + PL011_UARTCR));
+	return;
+}
+
+static inline void pl011_tx_disable(unsigned long base)
+{
+	unsigned int val = 0;
+
+	val =read((base + PL011_UARTCR));
+	val &= ~PL011_TXE;
+	write(val, (base + PL011_UARTCR));
+	return;
+}
+
+#define PL011_RXE	(1 << 9)
+static inline void pl011_rx_enable(unsigned long base)
+{
+	unsigned int val = 0;
+
+	val = read((base + PL011_UARTCR));
+	val |= PL011_RXE;
+	write(val, (base + PL011_UARTCR));
+	return;
+}
+
+static inline void pl011_rx_disable(unsigned long base)
+{
+	unsigned int val = 0;
+
+	val = read((base + PL011_UARTCR));
+	val &= ~PL011_RXE;
+	write(val, (base + PL011_UARTCR));
+	return;
+}
+
+#define PL011_TWO_STOPBITS_SELECT	(1 << 3)
+static inline void pl011_set_stopbits(unsigned long base, int stopbits)
+{
+	unsigned int val = 0;
+
+	val = read((base + PL011_UARTLCR_H));
+
+	if(stopbits == 2) {			/* Set to two bits */
+		val |= PL011_TWO_STOPBITS_SELECT;
+	} else {				/* Default is 1 */
+		val &= ~PL011_TWO_STOPBITS_SELECT;
+	}
+	write(val, (base + PL011_UARTLCR_H));
+	return;
+}
+
+#define PL011_PARITY_ENABLE	(1 << 1)
+static inline void pl011_parity_enable(unsigned long base)
+{
+	unsigned int val = 0;
+
+	val = read((base +PL011_UARTLCR_H));
+	val |= PL011_PARITY_ENABLE;
+	write(val, (base + PL011_UARTLCR_H));
+	return;
+}
+
+static inline void pl011_parity_disable(unsigned long base)
+{
+	unsigned int val = 0;
+
+	val = read((base + PL011_UARTLCR_H));
+	val &= ~PL011_PARITY_ENABLE;
+	write(val, (base + PL011_UARTLCR_H));
+	return;
+}
+
+#define PL011_PARITY_EVEN	(1 << 2)
+static inline void pl011_set_parity_even(unsigned long base)
+{
+	unsigned int val = 0;
+
+	val = read((base + PL011_UARTLCR_H));
+	val |= PL011_PARITY_EVEN;
+	write(val, (base + PL011_UARTLCR_H));
+	return;
+}
+
+static inline void pl011_set_parity_odd(unsigned long base)
+{
+	unsigned int val = 0;
+
+	val = read((base + PL011_UARTLCR_H));
+	val &= ~PL011_PARITY_EVEN;
+	write(val, (base + PL011_UARTLCR_H));
+	return;
+}
+
+#define	PL011_ENABLE_FIFOS	(1 << 4)
+static inline void pl011_enable_fifos(unsigned long base)
+{
+	unsigned int val = 0;
+
+	val = read((base + PL011_UARTLCR_H));
+	val |= PL011_ENABLE_FIFOS;
+	write(val, (base + PL011_UARTLCR_H));
+	return;
+}
+
+static inline void pl011_disable_fifos(unsigned long base)
+{
+	unsigned int val = 0;
+
+	val = read((base + PL011_UARTLCR_H));
+	val &= ~PL011_ENABLE_FIFOS;
+	write(val, (base + PL011_UARTLCR_H));
+	return;
+}
+
+/* Sets the transfer word width for the data register. */
+static inline void pl011_set_word_width(unsigned long base, int size)
+{
+	unsigned int val = 0;
+	if(size < 5 || size > 8)	/* Default is 8 */
+		size = 8;
+
+	/* Clear size field */
+	val = read((base + PL011_UARTLCR_H));
+	val &= ~(0x3 << 5);
+	write(val, (base + PL011_UARTLCR_H));
+
+	/*
+	 * The formula is to write 5 less of size given:
+	 * 11 = 8 bits
+	 * 10 = 7 bits
+	 * 01 = 6 bits
+	 * 00 = 5 bits
+	 */
+	val = read((base + PL011_UARTLCR_H));
+	val |= (size - 5) << 5;
+	write(val, (base + PL011_UARTLCR_H));
+
+	return;
+}
+
+/*
+ * Defines at which level of fifo fullness an irq will be generated.
+ * @xfer: tx fifo = 0, rx fifo = 1
+ * @level: Generate irq if:
+ * 0	rxfifo >= 1/8 full  	txfifo <= 1/8 full
+ * 1	rxfifo >= 1/4 full  	txfifo <= 1/4 full
+ * 2	rxfifo >= 1/2 full  	txfifo <= 1/2 full
+ * 3	rxfifo >= 3/4 full	txfifo <= 3/4 full
+ * 4	rxfifo >= 7/8 full	txfifo <= 7/8 full
+ * 5-7	reserved		reserved
+ */
+static inline void pl011_set_irq_fifolevel(unsigned long base, \
+			unsigned int xfer, unsigned int level)
+{
+	if(xfer != 1 && xfer != 0)	/* Invalid fifo */
+		return;
+	if(level > 4)			/* Invalid level */
+		return;
+
+	write(level << (xfer * 3), (base + PL011_UARTIFLS));
+	return;
+}
+
+#endif /* __PL011__UART__ */
+