mirror of
https://github.com/drasko/codezero.git
synced 2026-03-23 20:41:51 +01:00
Kernel updates since December 2009
This commit is contained in:
Bahadir Balban
@@ -8,33 +8,42 @@ symbols
|
||||
ARCH_ARM 'ARM'
|
||||
|
||||
arm_cpu_type 'ARM Processor Type'
|
||||
CPU_ARM1136 'ARM1136 - To be added'
|
||||
CPU_ARM11MPCORE 'ARM11 MPCore - To be added'
|
||||
CPU_ARM1136 'ARM1136 - Experimental'
|
||||
CPU_ARM11MPCORE 'ARM11 MPCore - Experimental'
|
||||
CPU_ARM926 'ARM926EJ-S'
|
||||
CPU_CORTEXA8 'ARM Cortex-A8 - Not supported'
|
||||
|
||||
arm_subarch_type 'ARM Architecture Family'
|
||||
SUBARCH_V5 'ARM v5 Architecture'
|
||||
SUBARCH_V6 'ARM v6 Architecture, To be added'
|
||||
SUBARCH_V7 'ARM v7 Architecture, To be added'
|
||||
CPU_CORTEXA8 'ARM Cortex-A8'
|
||||
CPU_CORTEXA9 'ARM Cortex-A9'
|
||||
|
||||
arm_platform_type 'ARM Platform Type'
|
||||
PLATFORM_EB 'Realview EB Platform, Unsupported yet'
|
||||
PLATFORM_EB 'Realview EB Platform'
|
||||
PLATFORM_PBA8 'Realview PB-A8 Platform, To be added'
|
||||
PLATFORM_PB926 'Versatile PB926 Platform'
|
||||
PLATFORM_PB11MPCORE 'Realview PB11MPCore Platform'
|
||||
PLATFORM_BEAGLE 'OMAP3530/Cortex-A8 Beagle Board'
|
||||
PLATFORM_PBA9 'Realview Express Cortex-A9'
|
||||
|
||||
main_menu 'Codezero Microkernel Configurator'
|
||||
arm_menu 'ARM Architecture Configuration'
|
||||
arm_cpu_menu 'ARM CPU type'
|
||||
arm_platform_menu 'ARM Platform Type'
|
||||
processor_properties 'Generic Processor Properties'
|
||||
kernel_generic_options 'Generic Kernel Properties'
|
||||
toolchain_menu 'Toolchain Prefix'
|
||||
containers_menu 'Container Setup'
|
||||
arch_type 'Main architecture'
|
||||
|
||||
TOOLCHAIN_KERNEL 'Toolchain prefix for kernel'
|
||||
TOOLCHAIN_USER 'Toolchain prefix for userspace'
|
||||
SMP 'Enable SMP Support'
|
||||
NCPU 'Number of SMP CPUs'
|
||||
DEBUG_ACCOUNTING 'Enable system operations accounting'
|
||||
DEBUG_PERFMON 'Enable performance monitoring'
|
||||
DEBUG_PERFMON_USER 'Userspace access to perfmon registers (in-kernel measurements disabled)'
|
||||
DEBUG_SPINLOCKS 'Debug spinlocks, e.g. detect recursive locks, double unlocks'
|
||||
SCHED_TICKS 'Scheduler ticks per second'
|
||||
ICACHE_DISABLE 'Disable the L1 instruction cache'
|
||||
DCACHE_DISABLE 'Disable the L1 data cache'
|
||||
PREEMPT_DISABLE 'Disable Kernel Preemption'
|
||||
TOOLCHAIN 'Toolchain prefix for kernel'
|
||||
|
||||
CONTAINERS 'Number of containers'
|
||||
CAPABILITIES 'Enable capability checking'
|
||||
|
||||
#############
|
||||
@@ -45,17 +54,13 @@ choices arch_type
|
||||
ARCH_ARM
|
||||
default ARCH_ARM
|
||||
|
||||
choices arm_subarch_type
|
||||
SUBARCH_V5
|
||||
SUBARCH_V6
|
||||
SUBARCH_V7
|
||||
default SUBARCH_V5
|
||||
|
||||
|
||||
choices arm_platform_type
|
||||
PLATFORM_EB
|
||||
PLATFORM_PBA8
|
||||
PLATFORM_PB926
|
||||
PLATFORM_PB11MPCORE
|
||||
PLATFORM_BEAGLE
|
||||
PLATFORM_PBA9
|
||||
default PLATFORM_PB926
|
||||
|
||||
choices arm_cpu_type
|
||||
@@ -63,6 +68,7 @@ choices arm_cpu_type
|
||||
CPU_ARM1136
|
||||
CPU_ARM11MPCORE
|
||||
CPU_CORTEXA8
|
||||
CPU_CORTEXA9
|
||||
default CPU_ARM926
|
||||
|
||||
#############
|
||||
@@ -76,55 +82,119 @@ menu arm_platform_menu
|
||||
arm_platform_type
|
||||
|
||||
menu arm_menu
|
||||
arm_subarch_type
|
||||
arm_cpu_menu
|
||||
arm_platform_menu
|
||||
arm_cpu_menu
|
||||
|
||||
menu processor_properties
|
||||
SMP
|
||||
NCPU%
|
||||
ICACHE_DISABLE
|
||||
DCACHE_DISABLE
|
||||
|
||||
menu kernel_generic_options
|
||||
PREEMPT_DISABLE
|
||||
DEBUG_ACCOUNTING
|
||||
DEBUG_PERFMON
|
||||
DEBUG_PERFMON_USER
|
||||
DEBUG_SPINLOCKS
|
||||
SCHED_TICKS%
|
||||
|
||||
menu toolchain_menu
|
||||
TOOLCHAIN_KERNEL$
|
||||
TOOLCHAIN_USER$
|
||||
TOOLCHAIN$
|
||||
|
||||
menu main_menu
|
||||
arch_type
|
||||
arm_menu
|
||||
processor_properties
|
||||
kernel_generic_options
|
||||
toolchain_menu
|
||||
CONTAINERS%
|
||||
containers_menu
|
||||
|
||||
#############`
|
||||
#############
|
||||
# RULES #
|
||||
#############
|
||||
#Capability/Container rules:
|
||||
default CAPABILITIES from y
|
||||
default CONTAINERS from 1
|
||||
default DEBUG_ACCOUNTING from n
|
||||
default DEBUG_PERFMON from n
|
||||
default DEBUG_PERFMON_USER from n
|
||||
default DEBUG_SPINLOCKS from n
|
||||
default SCHED_TICKS from 1000
|
||||
derive DEBUG_PERFMON_KERNEL from DEBUG_PERFMON == y and DEBUG_PERFMON_USER != y
|
||||
|
||||
#Platform rules:
|
||||
unless SUBARCH_V5 suppress PLATFORM_PB926
|
||||
unless SUBARCH_V6 suppress PLATFORM_PB11MPCORE
|
||||
#Subarch Derivation Rules
|
||||
derive SUBARCH_V5 from CPU_ARM926
|
||||
|
||||
derive SUBARCH_V6 from CPU_ARM1136 or
|
||||
CPU_ARM11MPCORE
|
||||
|
||||
derive SUBARCH_V7 from CPU_CORTEXA8 or
|
||||
CPU_CORTEXA9
|
||||
|
||||
#CPU rules:
|
||||
unless SUBARCH_V5 suppress CPU_ARM926
|
||||
unless SUBARCH_V6 suppress CPU_ARM1136
|
||||
unless SUBARCH_V6 suppress CPU_ARM11MPCORE
|
||||
unless SUBARCH_V7 suppress CPU_CORTEXA8
|
||||
unless PLATFORM_PB926 suppress CPU_ARM926
|
||||
unless PLATFORM_PB11MPCORE or PLATFORM_EB suppress CPU_ARM11MPCORE
|
||||
unless PLATFORM_EB suppress CPU_ARM1136
|
||||
unless PLATFORM_PBA9 or PLATFORM_EB suppress CPU_CORTEXA9
|
||||
|
||||
unless PLATFORM_BEAGLE or
|
||||
PLATFORM_PBA8 or
|
||||
PLATFORM_EB suppress CPU_CORTEXA8
|
||||
|
||||
#SMP support rules
|
||||
unless CPU_CORTEXA9 or CPU_ARM11MPCORE suppress SMP
|
||||
unless CPU_CORTEXA9 or CPU_ARM11MPCORE suppress NCPU
|
||||
unless SMP suppress NCPU
|
||||
unless DEBUG_ACCOUNTING suppress DEBUG_PERFMON
|
||||
DEBUG_PERFMON_USER
|
||||
unless DEBUG_PERFMON suppress DEBUG_PERFMON_USER
|
||||
|
||||
# NOTE: Unlike menus, choices dont take { sym } model of visibility
|
||||
# dependencies. Instead, a choice symbol is declared in a menu, and
|
||||
# suppress statement is used to make sym visible, instead of a
|
||||
# { sym } model under the choices. (See manual for { sym } usage).
|
||||
|
||||
unless SUBARCH_V5 suppress PLATFORM_PB926
|
||||
unless ARCH_ARM suppress arm_menu
|
||||
unless PLATFORM_EB suppress CPU_ARM1136
|
||||
derive DRIVER_UART_PL011 from SUBARCH_V5 or SUBARCH_V6 or SUBARCH_V7
|
||||
derive DRIVER_TIMER_SP804 from SUBARCH_V5 or SUBARCH_V6 or SUBARCH_V7
|
||||
derive DRIVER_IRQ_PL190 from PLATFORM_PB926
|
||||
derive DRIVER_IRQ_GIC from PLATFORM_PB11MPCORE or PLATFORM_EB
|
||||
derive DRIVER_UART_PL011 from PLATFORM_PB926 or
|
||||
PLATFORM_PB11MPCORE or
|
||||
PLATFORM_PBA9 or
|
||||
PLATFORM_EB or
|
||||
PLATFORM_PBA8
|
||||
|
||||
derive DRIVER_TIMER_SP804 from PLATFORM_PB926 or
|
||||
PLATFORM_PB11MPCORE or
|
||||
PLATFORM_PBA9 or
|
||||
PLATFORM_EB or
|
||||
PLATFORM_PBA8
|
||||
|
||||
derive DRIVER_IRQ_PL190 from PLATFORM_PB926
|
||||
|
||||
derive DRIVER_IRQ_GIC from PLATFORM_PB11MPCORE or
|
||||
PLATFORM_PBA9 or
|
||||
PLATFORM_EB or
|
||||
PLATFORM_PBA8
|
||||
|
||||
derive DRIVER_UART_OMAP from PLATFORM_BEAGLE
|
||||
derive DRIVER_TIMER_OMAP from PLATFORM_BEAGLE
|
||||
derive DRIVER_INTC_OMAP from PLATFORM_BEAGLE
|
||||
|
||||
#SMP default value
|
||||
default SMP from y
|
||||
default NCPU from 4
|
||||
default ICACHE_DISABLE from n
|
||||
default DCACHE_DISABLE from n
|
||||
default PREEMPT_DISABLE from n
|
||||
|
||||
require NCPU <= 4
|
||||
|
||||
# Derive Ram base address depending on platform selected
|
||||
# we use this in setting containers physical regions
|
||||
# default values
|
||||
# FIXME: Find a better solution
|
||||
derive RAM_BASE_PLAT from PLATFORM_BEAGLE ? 0x80000000 : 0x00000000
|
||||
|
||||
# Toolchains:
|
||||
default TOOLCHAIN_KERNEL from 'arm-none-eabi-'
|
||||
default TOOLCHAIN_USER from 'arm-none-linux-gnueabi-'
|
||||
default TOOLCHAIN from 'arm-none-eabi-'
|
||||
|
||||
prefix CONFIG_
|
||||
|
||||
|
||||
Reference in New Issue
Block a user