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Kernel updates since December 2009

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This commit is contained in:
Bahadir Balban
2010-03-25 01:12:40 +02:00
parent 16818191b3
commit 74b5963fcb
487 changed files with 22477 additions and 3857 deletions
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52
include/l4/drivers/timer/omap/timer.h Normal file
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/*
* OMAP GP Timer offsets
*
* Copyright (C) 2007 Bahadir Balban
*
*/
#ifndef __OMAP_GPTIMER_H__
#define __OMAP_GPTIMER_H__
/* Register offsets */
#define OMAP_TIMER_TIOCP 0x10
#define OMAP_TIMER_TSTAT 0x14
#define OMAP_TIMER_TISR 0x18
#define OMAP_TIMER_TIER 0x1C
#define OMAP_TIMER_TCLR 0x24
#define OMAP_TIMER_TCRR 0x28
#define OMAP_TIMER_TLDR 0x2C
#define OMAP_TIMER_TMAR 0x38
#define OMAP_TIMER_TPIR 0x48
#define OMAP_TIMER_TNIR 0x4C
#define OMAP_TIMER_TCVR 0x50
/* Enable/Disable IRQ */
#define OMAP_TIMER_IRQENABLE 1
#define OMAP_TIMER_IRQDISABLE 0
/* Timer modes supported */
#define OMAP_TIMER_MODE_AUTORELAOD 1
#define OMAP_TIMER_MODE_COMPARE 6
#define OMAP_TIMER_MODE_CAPTURE 13
/* Interrupt types */
#define OMAP_TIMER_INTR_MATCH 0x0
#define OMAP_TIMER_INTR_OVERFLOW 0x1
#define OMAP_TIMER_INTR_CAPTURE 0x2
/* Clock source for timer */
#define OMAP_TIMER_CLKSRC_SYS_CLK 0x1
#define OMAP_TIMER_CLKSRC_32KHZ_CLK 0x0
void timer_init_oneshot(unsigned long timer_base);
u32 timer_periodic_intr_status(unsigned long timer_base);
void timer_reset(unsigned long timer_base);
void timer_load(unsigned long timer_base, u32 value);
u32 timer_read(unsigned long timer_base);
void timer_start(unsigned long timer_base);
void timer_stop(unsigned long timer_base);
void timer_init_periodic(unsigned long timer_base);
void timer_irq_clear(unsigned long timer_base);
void timer_init(unsigned long timer_base);
#endif /* __OMAP_GPTIMER_H__*/

46
include/l4/drivers/timer/sp804/timer.h Normal file
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/*
* SP804 Primecell Timer offsets
*
* Copyright (C) 2007 Bahadir Balban
*
*/
#ifndef __SP804_TIMER_H__
#define __SP804_TIMER_H__
#include INC_ARCH(io.h)
/* Register offsets */
#define SP804_LOAD 0x0
#define SP804_VALUE 0x4
#define SP804_CTRL 0x8
#define SP804_INTCLR 0xC
#define SP804_RIS 0x10
#define SP804_MIS 0x14
#define SP804_BGLOAD 0x18
#define SP804_ENABLE (1 << 7)
#define SP804_PERIODIC (1 << 6)
#define SP804_IRQEN (1 << 5)
#define SP804_32BIT (1 << 1)
#define SP804_ONESHOT (1 << 0)
#define SP804_SECONDARY_OFFSET 0x20
/* Timer prescaling */
#define SP804_SCALE_SHIFT 2
#define SP804_SCALE_DIV16 1
#define SP804_SCALE_DIV256 2
/* Wrapping = 0, Oneshot = 1 */
#define SP804_ONESHOT (1 << 0)
unsigned long timer_secondary_base(unsigned long timer_base);
void timer_irq_clear(unsigned long timer_base);
void timer_start(unsigned long timer_base);
void timer_load(u32 loadval, unsigned long timer_base);
u32 timer_read(unsigned long timer_base);
void timer_stop(unsigned long timer_base);
void timer_init_periodic(unsigned long timer_base, unsigned int load_value);
void timer_init_oneshot(unsigned long timer_base);
void timer_init(unsigned long timer_base, unsigned int load_value);
#endif /* __SP804_TIMER_H__ */