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l4lib changes to accomodate extended and full ipc.

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- Added ARM register ipc usage explanation to glue/arm/message.h
- In the current design, the unused r2 register is a system register
  that kernel checks for ipc flags such as:
  - IPC type: e.g. full or extended.
  - In extended IPC, MR index containing message buffer ptr.
  - In extended IPC, message size
This commit is contained in:
Bahadir Balban
2009-05-14 20:23:10 +03:00
parent 548617660f
commit 814eba43dd
3 changed files with 134 additions and 45 deletions
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64
include/l4/glue/arm/message.h
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@@ -1,12 +1,62 @@
/*
* Userspace thread control block
*
* Copyright (C) 2007 Bahadir Balban
* Copyright (C) 2007-2009 Bahadir Bilgehan Balban
*/
#ifndef __GLUE_ARM_MESSAGE_H__
#define __GLUE_ARM_MESSAGE_H__
#include INC_GLUE(memlayout.h)
/*
* Here's a summary of how ARM registers are used during IPC:
*
* System registers:
* r0 - r2: Passed as arguments to ipc() call. They are the registers
* the microkernel will read and they have system-wide meaning.
*
* Primary message registers:
* r3 - r8: These 6 registers are the primary message registers MR0-MR6
* Their format is application-specific, i.e. the microkernel imposes no
* format restrictions on them.
*
* TODO: The only exception is that, for ANYTHREAD receivers the predefined
* MR_SENDER is touched by the kernel to indicate the sender. This register
* is among the primary MRs and it may be better fit to put it into one of
* the system registers.
*
* l4lib registers: (MR_TAG, MR_SENDER, MR_RETURN)
* Some of the primary message registers are used by the l4lib convenience
* library for operations necessary on most or all common ipcs. For example
* every ipc has a tag that specifies the ipc reason. Also send/receive
* operations require a return value. Threads that are open to receive from
* all threads require the sender id. These values are passed in predefined
* primary message registers, but the microkernel has no knowledge about them.
*
* System call registers: L4SYS_ARG0 to ARG4.(See syslib.h for definitions)
* Finally the rest of the primary message registers are available for
* implementing system call arguments. For example the POSIX services use
* these arguments to pass posix system call information.
*
* Secondary Message Registers:
* These are non-real registers and are present in the UTCB memory region.
* Both real and non-real message registers have a location in the UTCB, but
* non-real ones are copied only if the FULL IPC flag is set.
*
* The big picture:
*
* r0 System register
* r1 System register
* r2 System register
* r3 Primary MR0 MR_RETURN, MR_TAG Present in UTCB, Short IPC
* r4 Primary MR1 MR_SENDER Present in UTCB, Short IPC
* r5 Primary MR2 L4SYS_ARG0 Present in UTCB, Short IPC
* r6 Primary MR3 L4SYS_ARG1 Present in UTCB, Short IPC
* r7 Primary MR4 L4SYS_ARG2 Present in UTCB, Short IPC
* r8 Primary MR5 L4SYS_ARG3 Present in UTCB, Short IPC
* x Secondary MR6 Present in UTCB, Full IPC only
* x Secondary MR64 Present in UTCB, Full IPC only
*
* Complicated for you? Suggest a simpler design and it shall be implemented!
*/
#define MR_REST (UTCB_SIZE - MR_TOTAL - 2) /* -2 is for fields on utcb */
#define MR_TOTAL 6
@@ -23,4 +73,14 @@
#define MR0_REGISTER r3
#define MR_RETURN_REGISTER r3
#define L4_IPC_FLAGS_FULL 0x00000001 /* Full IPC involves full UTCB copy */
#define L4_IPC_FLAGS_EXTENDED 0x00000002 /* Extended IPC can page-fault and copy up to 2KB */
#define L4_IPC_FLAGS_MSG_INDEX_MASK 0x00000FF0 /* Index of message register with buffer pointer */
#define L4_IPC_FLAGS_MASK 0x0000000F
#define L4_IPC_FLAGS_SIZE_MASK 0x0FFF0000
#define L4_IPC_FLAGS_SIZE_SHIFT 16
#define L4_IPC_FLAGS_MSG_INDEX_SHIFT 4
#include INC_GLUE(memlayout.h)
#endif /* __GLUE_ARM_MESSAGE_H__ */