Added new subarch, platform, cpu, driver variants for configuration testing.

New files are an exact copy of pb926 files, but will help in testing different
configurations and compilations.

include/l4/platform/ab926/irq.h

@@ -0,0 +1,27 @@
+#ifndef __PLATFORM_IRQ_H__
+#define __PLATFORM_IRQ_H__
+
+#define IRQ_CHIPS_MAX				2
+#define IRQS_MAX				64
+
+/* IRQ indices. */
+#define IRQ_TIMER01			4
+#define IRQ_TIMER23			5
+#define IRQ_RTC				10
+#define IRQ_UART0			12
+#define IRQ_UART1			13
+#define IRQ_UART2			14
+#define IRQ_SIC				31
+
+/* Cascading definitions */
+
+#define PIC_IRQS_MAX			31 /* Total irqs on PIC */
+/* The local irq line of the dummy peripheral on this chip */
+#define LOCALIRQ_DUMMY			15
+/* The irq index offset of this chip, is the maximum of previous chip + 1 */
+#define SIRQ_CHIP_OFFSET		(PIC_IRQS_MAX + 1)
+/* The global irq number of dummy is the local irq line + it's chip offset */
+#define IRQ_DUMMY			(LOCALIRQ_DUMMY + SIRQ_CHIP_OFFSET)
+
+
+#endif /* __PLATFORM_IRQ_H__ */

include/l4/platform/ab926/offsets.h

@@ -0,0 +1,60 @@
+/*
+ * Describes physical memory layout of pb926 platform.
+ *
+ * Copyright (C) 2007 Bahadir Balban
+ */
+
+#ifndef __PLATFORM_PB926_OFFSETS_H__
+#define __PLATFORM_PB926_OFFSETS_H__
+
+/* Physical memory base */
+#define	PHYS_MEM_START			0x00000000 /* inclusive */
+#define	PHYS_MEM_END			0x08000000 /* 128 MB, exclusive */
+
+/*
+ * These bases taken from where kernel is `physically' linked at,
+ * also used to calculate virtual-to-physical translation offset.
+ * See the linker script for their sources. PHYS_ADDR_BASE can't
+ * use a linker variable because it's referred from assembler.
+ */
+#define	PHYS_ADDR_BASE			0x100000
+
+/* Device memory base */
+#define	PB926_DEV_PHYS			0x10000000
+
+/* Device offsets in physical memory */
+#define	PB926_SYSTEM_REGISTERS		0x10000000 /* System registers */
+#define	PB926_SYSCTRL_BASE		0x101E0000 /* System controller */
+#define	PB926_WATCHDOG_BASE		0x101E1000 /* Watchdog */
+#define	PB926_TIMER01_BASE		0x101E2000 /* Timers 0 and 1 */
+#define	PB926_TIMER23_BASE		0x101E3000 /* Timers 2 and 3 */
+#define	PB926_RTC_BASE			0x101E8000 /* Real Time Clock */
+#define	PB926_VIC_BASE			0x10140000 /* Primary Vectored IC */
+#define	PB926_SIC_BASE			0x10003000 /* Secondary IC */
+#define	PB926_UART0_BASE		0x101F1000 /* Console port (UART0) */
+
+/*
+ * Uart virtual address until a file-based console access
+ * is available for userspace
+ */
+#define	USERSPACE_UART_BASE		0x500000
+
+/*
+ * Device offsets in virtual memory. They offset to some virtual
+ * device base address. Each page on this virtual base is consecutively
+ * allocated to devices. Nice and smooth.
+ */
+#define PB926_TIMER01_VOFFSET			0x00000000
+#define PB926_UART0_VOFFSET			0x00001000
+#define	PB926_VIC_VOFFSET			0x00002000
+#define	PB926_SIC_VOFFSET			0x00003000
+#define PB926_SYSREGS_VOFFSET			0x00005000
+#define PB926_SYSCTRL_VOFFSET			0x00006000
+
+#define PB926_UART0_VBASE			(IO_AREA0_VADDR + PB926_UART0_VOFFSET)
+#define PB926_TIMER01_VBASE			(IO_AREA0_VADDR + PB926_TIMER01_VOFFSET)
+#define PB926_SYSCTRL_VBASE			(IO_AREA0_VADDR + PB926_SYSCTRL_VOFFSET)
+#define PB926_VIC_VBASE				(IO_AREA0_VADDR + PB926_VIC_VOFFSET)
+#define PB926_SIC_VBASE				(IO_AREA0_VADDR + PB926_SIC_VOFFSET)
+#endif /* __PLATFORM_PB926_OFFSETS_H__ */
+

include/l4/platform/ab926/platform.h

@@ -0,0 +1,22 @@
+#ifndef __PLATFORM_PB926_PLATFORM_H__
+#define __PLATFORM_PB926_PLATFORM_H__
+/*
+ * Platform specific ties between drivers and generic APIs used by the kernel.
+ * E.g. system timer and console.
+ *
+ * Copyright (C) Bahadir Balban 2007
+ */
+
+#include INC_PLAT(offsets.h)
+#include INC_GLUE(memlayout.h)
+
+#define PLATFORM_CONSOLE_BASE			PB926_UART0_VBASE
+#define PLATFORM_TIMER_BASE			PB926_TIMER01_VBASE
+#define PLATFORM_SP810_BASE			PB926_SYSCTRL_VBASE
+#define PLATFORM_IRQCTRL_BASE			PB926_VIC_VBASE
+#define PLATFORM_SIRQCTRL_BASE			PB926_SIC_VBASE
+
+void platform_irq_enable(int irq);
+void platform_irq_disable(int irq);
+void timer_start(void);
+#endif /* __PLATFORM_PB926_PLATFORM_H__ */

include/l4/platform/ab926/printascii.h

@@ -0,0 +1,15 @@
+#ifndef __PLATFORM__PB926__PRINTASCII__H__
+#define __PLATFORM__PB926__PRINTASCII__H__
+
+#define	dprintk(str, val)		\
+{					\
+	printascii(str);		\
+	printascii("0x");		\
+	printhex8((val));		\
+	printascii("\n");		\
+}
+
+void printascii(char *str);
+void printhex8(unsigned int);
+
+#endif /* __PLATFORM__PB926__PRINTASCII__H__ */

include/l4/platform/ab926/uart.h

@@ -0,0 +1,20 @@
+/*
+ * Platform specific ties to generic uart functions that putc expects.
+ *
+ * Copyright (C) 2007 Bahadir Balban
+ *
+ */
+
+#ifndef __PLATFORM_PB926_UART_H__
+#define __PLATFORM_PB926_UART_H__
+
+#include INC_PLAT(offsets.h)
+#include INC_GLUE(memlayout.h)
+
+#define PLATFORM_CONSOLE_BASE			PB926_UART0_VBASE
+#include <l4/drivers/uart/pl011/pl011_uart.h>
+
+void uart_init(void);
+void uart_putc(char c);
+
+#endif /* __PLATFORM_PB926_UART_H__ */

include/l4/platform/eb/irq.h

@@ -0,0 +1,27 @@
+#ifndef __PLATFORM_IRQ_H__
+#define __PLATFORM_IRQ_H__
+
+#define IRQ_CHIPS_MAX				2
+#define IRQS_MAX				64
+
+/* IRQ indices. */
+#define IRQ_TIMER01			4
+#define IRQ_TIMER23			5
+#define IRQ_RTC				10
+#define IRQ_UART0			12
+#define IRQ_UART1			13
+#define IRQ_UART2			14
+#define IRQ_SIC				31
+
+/* Cascading definitions */
+
+#define PIC_IRQS_MAX			31 /* Total irqs on PIC */
+/* The local irq line of the dummy peripheral on this chip */
+#define LOCALIRQ_DUMMY			15
+/* The irq index offset of this chip, is the maximum of previous chip + 1 */
+#define SIRQ_CHIP_OFFSET		(PIC_IRQS_MAX + 1)
+/* The global irq number of dummy is the local irq line + it's chip offset */
+#define IRQ_DUMMY			(LOCALIRQ_DUMMY + SIRQ_CHIP_OFFSET)
+
+
+#endif /* __PLATFORM_IRQ_H__ */

include/l4/platform/eb/offsets.h

@@ -0,0 +1,60 @@
+/*
+ * Describes physical memory layout of pb926 platform.
+ *
+ * Copyright (C) 2007 Bahadir Balban
+ */
+
+#ifndef __PLATFORM_PB926_OFFSETS_H__
+#define __PLATFORM_PB926_OFFSETS_H__
+
+/* Physical memory base */
+#define	PHYS_MEM_START			0x00000000 /* inclusive */
+#define	PHYS_MEM_END			0x08000000 /* 128 MB, exclusive */
+
+/*
+ * These bases taken from where kernel is `physically' linked at,
+ * also used to calculate virtual-to-physical translation offset.
+ * See the linker script for their sources. PHYS_ADDR_BASE can't
+ * use a linker variable because it's referred from assembler.
+ */
+#define	PHYS_ADDR_BASE			0x100000
+
+/* Device memory base */
+#define	PB926_DEV_PHYS			0x10000000
+
+/* Device offsets in physical memory */
+#define	PB926_SYSTEM_REGISTERS		0x10000000 /* System registers */
+#define	PB926_SYSCTRL_BASE		0x101E0000 /* System controller */
+#define	PB926_WATCHDOG_BASE		0x101E1000 /* Watchdog */
+#define	PB926_TIMER01_BASE		0x101E2000 /* Timers 0 and 1 */
+#define	PB926_TIMER23_BASE		0x101E3000 /* Timers 2 and 3 */
+#define	PB926_RTC_BASE			0x101E8000 /* Real Time Clock */
+#define	PB926_VIC_BASE			0x10140000 /* Primary Vectored IC */
+#define	PB926_SIC_BASE			0x10003000 /* Secondary IC */
+#define	PB926_UART0_BASE		0x101F1000 /* Console port (UART0) */
+
+/*
+ * Uart virtual address until a file-based console access
+ * is available for userspace
+ */
+#define	USERSPACE_UART_BASE		0x500000
+
+/*
+ * Device offsets in virtual memory. They offset to some virtual
+ * device base address. Each page on this virtual base is consecutively
+ * allocated to devices. Nice and smooth.
+ */
+#define PB926_TIMER01_VOFFSET			0x00000000
+#define PB926_UART0_VOFFSET			0x00001000
+#define	PB926_VIC_VOFFSET			0x00002000
+#define	PB926_SIC_VOFFSET			0x00003000
+#define PB926_SYSREGS_VOFFSET			0x00005000
+#define PB926_SYSCTRL_VOFFSET			0x00006000
+
+#define PB926_UART0_VBASE			(IO_AREA0_VADDR + PB926_UART0_VOFFSET)
+#define PB926_TIMER01_VBASE			(IO_AREA0_VADDR + PB926_TIMER01_VOFFSET)
+#define PB926_SYSCTRL_VBASE			(IO_AREA0_VADDR + PB926_SYSCTRL_VOFFSET)
+#define PB926_VIC_VBASE				(IO_AREA0_VADDR + PB926_VIC_VOFFSET)
+#define PB926_SIC_VBASE				(IO_AREA0_VADDR + PB926_SIC_VOFFSET)
+#endif /* __PLATFORM_PB926_OFFSETS_H__ */
+

include/l4/platform/eb/platform.h

@@ -0,0 +1,22 @@
+#ifndef __PLATFORM_PB926_PLATFORM_H__
+#define __PLATFORM_PB926_PLATFORM_H__
+/*
+ * Platform specific ties between drivers and generic APIs used by the kernel.
+ * E.g. system timer and console.
+ *
+ * Copyright (C) Bahadir Balban 2007
+ */
+
+#include INC_PLAT(offsets.h)
+#include INC_GLUE(memlayout.h)
+
+#define PLATFORM_CONSOLE_BASE			PB926_UART0_VBASE
+#define PLATFORM_TIMER_BASE			PB926_TIMER01_VBASE
+#define PLATFORM_SP810_BASE			PB926_SYSCTRL_VBASE
+#define PLATFORM_IRQCTRL_BASE			PB926_VIC_VBASE
+#define PLATFORM_SIRQCTRL_BASE			PB926_SIC_VBASE
+
+void platform_irq_enable(int irq);
+void platform_irq_disable(int irq);
+void timer_start(void);
+#endif /* __PLATFORM_PB926_PLATFORM_H__ */

include/l4/platform/eb/printascii.h

@@ -0,0 +1,15 @@
+#ifndef __PLATFORM__PB926__PRINTASCII__H__
+#define __PLATFORM__PB926__PRINTASCII__H__
+
+#define	dprintk(str, val)		\
+{					\
+	printascii(str);		\
+	printascii("0x");		\
+	printhex8((val));		\
+	printascii("\n");		\
+}
+
+void printascii(char *str);
+void printhex8(unsigned int);
+
+#endif /* __PLATFORM__PB926__PRINTASCII__H__ */

include/l4/platform/eb/uart.h

@@ -0,0 +1,20 @@
+/*
+ * Platform specific ties to generic uart functions that putc expects.
+ *
+ * Copyright (C) 2007 Bahadir Balban
+ *
+ */
+
+#ifndef __PLATFORM_PB926_UART_H__
+#define __PLATFORM_PB926_UART_H__
+
+#include INC_PLAT(offsets.h)
+#include INC_GLUE(memlayout.h)
+
+#define PLATFORM_CONSOLE_BASE			PB926_UART0_VBASE
+#include <l4/drivers/uart/pl011/pl011_uart.h>
+
+void uart_init(void);
+void uart_putc(char c);
+
+#endif /* __PLATFORM_PB926_UART_H__ */

include/l4/platform/pb11mpcore/irq.h

@@ -0,0 +1,27 @@
+#ifndef __PLATFORM_IRQ_H__
+#define __PLATFORM_IRQ_H__
+
+#define IRQ_CHIPS_MAX				2
+#define IRQS_MAX				64
+
+/* IRQ indices. */
+#define IRQ_TIMER01			4
+#define IRQ_TIMER23			5
+#define IRQ_RTC				10
+#define IRQ_UART0			12
+#define IRQ_UART1			13
+#define IRQ_UART2			14
+#define IRQ_SIC				31
+
+/* Cascading definitions */
+
+#define PIC_IRQS_MAX			31 /* Total irqs on PIC */
+/* The local irq line of the dummy peripheral on this chip */
+#define LOCALIRQ_DUMMY			15
+/* The irq index offset of this chip, is the maximum of previous chip + 1 */
+#define SIRQ_CHIP_OFFSET		(PIC_IRQS_MAX + 1)
+/* The global irq number of dummy is the local irq line + it's chip offset */
+#define IRQ_DUMMY			(LOCALIRQ_DUMMY + SIRQ_CHIP_OFFSET)
+
+
+#endif /* __PLATFORM_IRQ_H__ */

include/l4/platform/pb11mpcore/offsets.h

@@ -0,0 +1,60 @@
+/*
+ * Describes physical memory layout of pb926 platform.
+ *
+ * Copyright (C) 2007 Bahadir Balban
+ */
+
+#ifndef __PLATFORM_PB926_OFFSETS_H__
+#define __PLATFORM_PB926_OFFSETS_H__
+
+/* Physical memory base */
+#define	PHYS_MEM_START			0x00000000 /* inclusive */
+#define	PHYS_MEM_END			0x08000000 /* 128 MB, exclusive */
+
+/*
+ * These bases taken from where kernel is `physically' linked at,
+ * also used to calculate virtual-to-physical translation offset.
+ * See the linker script for their sources. PHYS_ADDR_BASE can't
+ * use a linker variable because it's referred from assembler.
+ */
+#define	PHYS_ADDR_BASE			0x100000
+
+/* Device memory base */
+#define	PB926_DEV_PHYS			0x10000000
+
+/* Device offsets in physical memory */
+#define	PB926_SYSTEM_REGISTERS		0x10000000 /* System registers */
+#define	PB926_SYSCTRL_BASE		0x101E0000 /* System controller */
+#define	PB926_WATCHDOG_BASE		0x101E1000 /* Watchdog */
+#define	PB926_TIMER01_BASE		0x101E2000 /* Timers 0 and 1 */
+#define	PB926_TIMER23_BASE		0x101E3000 /* Timers 2 and 3 */
+#define	PB926_RTC_BASE			0x101E8000 /* Real Time Clock */
+#define	PB926_VIC_BASE			0x10140000 /* Primary Vectored IC */
+#define	PB926_SIC_BASE			0x10003000 /* Secondary IC */
+#define	PB926_UART0_BASE		0x101F1000 /* Console port (UART0) */
+
+/*
+ * Uart virtual address until a file-based console access
+ * is available for userspace
+ */
+#define	USERSPACE_UART_BASE		0x500000
+
+/*
+ * Device offsets in virtual memory. They offset to some virtual
+ * device base address. Each page on this virtual base is consecutively
+ * allocated to devices. Nice and smooth.
+ */
+#define PB926_TIMER01_VOFFSET			0x00000000
+#define PB926_UART0_VOFFSET			0x00001000
+#define	PB926_VIC_VOFFSET			0x00002000
+#define	PB926_SIC_VOFFSET			0x00003000
+#define PB926_SYSREGS_VOFFSET			0x00005000
+#define PB926_SYSCTRL_VOFFSET			0x00006000
+
+#define PB926_UART0_VBASE			(IO_AREA0_VADDR + PB926_UART0_VOFFSET)
+#define PB926_TIMER01_VBASE			(IO_AREA0_VADDR + PB926_TIMER01_VOFFSET)
+#define PB926_SYSCTRL_VBASE			(IO_AREA0_VADDR + PB926_SYSCTRL_VOFFSET)
+#define PB926_VIC_VBASE				(IO_AREA0_VADDR + PB926_VIC_VOFFSET)
+#define PB926_SIC_VBASE				(IO_AREA0_VADDR + PB926_SIC_VOFFSET)
+#endif /* __PLATFORM_PB926_OFFSETS_H__ */
+

include/l4/platform/pb11mpcore/platform.h

@@ -0,0 +1,22 @@
+#ifndef __PLATFORM_PB926_PLATFORM_H__
+#define __PLATFORM_PB926_PLATFORM_H__
+/*
+ * Platform specific ties between drivers and generic APIs used by the kernel.
+ * E.g. system timer and console.
+ *
+ * Copyright (C) Bahadir Balban 2007
+ */
+
+#include INC_PLAT(offsets.h)
+#include INC_GLUE(memlayout.h)
+
+#define PLATFORM_CONSOLE_BASE			PB926_UART0_VBASE
+#define PLATFORM_TIMER_BASE			PB926_TIMER01_VBASE
+#define PLATFORM_SP810_BASE			PB926_SYSCTRL_VBASE
+#define PLATFORM_IRQCTRL_BASE			PB926_VIC_VBASE
+#define PLATFORM_SIRQCTRL_BASE			PB926_SIC_VBASE
+
+void platform_irq_enable(int irq);
+void platform_irq_disable(int irq);
+void timer_start(void);
+#endif /* __PLATFORM_PB926_PLATFORM_H__ */

include/l4/platform/pb11mpcore/printascii.h

@@ -0,0 +1,15 @@
+#ifndef __PLATFORM__PB926__PRINTASCII__H__
+#define __PLATFORM__PB926__PRINTASCII__H__
+
+#define	dprintk(str, val)		\
+{					\
+	printascii(str);		\
+	printascii("0x");		\
+	printhex8((val));		\
+	printascii("\n");		\
+}
+
+void printascii(char *str);
+void printhex8(unsigned int);
+
+#endif /* __PLATFORM__PB926__PRINTASCII__H__ */

include/l4/platform/pb11mpcore/uart.h

@@ -0,0 +1,20 @@
+/*
+ * Platform specific ties to generic uart functions that putc expects.
+ *
+ * Copyright (C) 2007 Bahadir Balban
+ *
+ */
+
+#ifndef __PLATFORM_PB926_UART_H__
+#define __PLATFORM_PB926_UART_H__
+
+#include INC_PLAT(offsets.h)
+#include INC_GLUE(memlayout.h)
+
+#define PLATFORM_CONSOLE_BASE			PB926_UART0_VBASE
+#include <l4/drivers/uart/pl011/pl011_uart.h>
+
+void uart_init(void);
+void uart_putc(char c);
+
+#endif /* __PLATFORM_PB926_UART_H__ */

include/l4/platform/pba8/irq.h

@@ -0,0 +1,27 @@
+#ifndef __PLATFORM_IRQ_H__
+#define __PLATFORM_IRQ_H__
+
+#define IRQ_CHIPS_MAX				2
+#define IRQS_MAX				64
+
+/* IRQ indices. */
+#define IRQ_TIMER01			4
+#define IRQ_TIMER23			5
+#define IRQ_RTC				10
+#define IRQ_UART0			12
+#define IRQ_UART1			13
+#define IRQ_UART2			14
+#define IRQ_SIC				31
+
+/* Cascading definitions */
+
+#define PIC_IRQS_MAX			31 /* Total irqs on PIC */
+/* The local irq line of the dummy peripheral on this chip */
+#define LOCALIRQ_DUMMY			15
+/* The irq index offset of this chip, is the maximum of previous chip + 1 */
+#define SIRQ_CHIP_OFFSET		(PIC_IRQS_MAX + 1)
+/* The global irq number of dummy is the local irq line + it's chip offset */
+#define IRQ_DUMMY			(LOCALIRQ_DUMMY + SIRQ_CHIP_OFFSET)
+
+
+#endif /* __PLATFORM_IRQ_H__ */

include/l4/platform/pba8/offsets.h

@@ -0,0 +1,60 @@
+/*
+ * Describes physical memory layout of pb926 platform.
+ *
+ * Copyright (C) 2007 Bahadir Balban
+ */
+
+#ifndef __PLATFORM_PB926_OFFSETS_H__
+#define __PLATFORM_PB926_OFFSETS_H__
+
+/* Physical memory base */
+#define	PHYS_MEM_START			0x00000000 /* inclusive */
+#define	PHYS_MEM_END			0x08000000 /* 128 MB, exclusive */
+
+/*
+ * These bases taken from where kernel is `physically' linked at,
+ * also used to calculate virtual-to-physical translation offset.
+ * See the linker script for their sources. PHYS_ADDR_BASE can't
+ * use a linker variable because it's referred from assembler.
+ */
+#define	PHYS_ADDR_BASE			0x100000
+
+/* Device memory base */
+#define	PB926_DEV_PHYS			0x10000000
+
+/* Device offsets in physical memory */
+#define	PB926_SYSTEM_REGISTERS		0x10000000 /* System registers */
+#define	PB926_SYSCTRL_BASE		0x101E0000 /* System controller */
+#define	PB926_WATCHDOG_BASE		0x101E1000 /* Watchdog */
+#define	PB926_TIMER01_BASE		0x101E2000 /* Timers 0 and 1 */
+#define	PB926_TIMER23_BASE		0x101E3000 /* Timers 2 and 3 */
+#define	PB926_RTC_BASE			0x101E8000 /* Real Time Clock */
+#define	PB926_VIC_BASE			0x10140000 /* Primary Vectored IC */
+#define	PB926_SIC_BASE			0x10003000 /* Secondary IC */
+#define	PB926_UART0_BASE		0x101F1000 /* Console port (UART0) */
+
+/*
+ * Uart virtual address until a file-based console access
+ * is available for userspace
+ */
+#define	USERSPACE_UART_BASE		0x500000
+
+/*
+ * Device offsets in virtual memory. They offset to some virtual
+ * device base address. Each page on this virtual base is consecutively
+ * allocated to devices. Nice and smooth.
+ */
+#define PB926_TIMER01_VOFFSET			0x00000000
+#define PB926_UART0_VOFFSET			0x00001000
+#define	PB926_VIC_VOFFSET			0x00002000
+#define	PB926_SIC_VOFFSET			0x00003000
+#define PB926_SYSREGS_VOFFSET			0x00005000
+#define PB926_SYSCTRL_VOFFSET			0x00006000
+
+#define PB926_UART0_VBASE			(IO_AREA0_VADDR + PB926_UART0_VOFFSET)
+#define PB926_TIMER01_VBASE			(IO_AREA0_VADDR + PB926_TIMER01_VOFFSET)
+#define PB926_SYSCTRL_VBASE			(IO_AREA0_VADDR + PB926_SYSCTRL_VOFFSET)
+#define PB926_VIC_VBASE				(IO_AREA0_VADDR + PB926_VIC_VOFFSET)
+#define PB926_SIC_VBASE				(IO_AREA0_VADDR + PB926_SIC_VOFFSET)
+#endif /* __PLATFORM_PB926_OFFSETS_H__ */
+

include/l4/platform/pba8/platform.h

@@ -0,0 +1,22 @@
+#ifndef __PLATFORM_PB926_PLATFORM_H__
+#define __PLATFORM_PB926_PLATFORM_H__
+/*
+ * Platform specific ties between drivers and generic APIs used by the kernel.
+ * E.g. system timer and console.
+ *
+ * Copyright (C) Bahadir Balban 2007
+ */
+
+#include INC_PLAT(offsets.h)
+#include INC_GLUE(memlayout.h)
+
+#define PLATFORM_CONSOLE_BASE			PB926_UART0_VBASE
+#define PLATFORM_TIMER_BASE			PB926_TIMER01_VBASE
+#define PLATFORM_SP810_BASE			PB926_SYSCTRL_VBASE
+#define PLATFORM_IRQCTRL_BASE			PB926_VIC_VBASE
+#define PLATFORM_SIRQCTRL_BASE			PB926_SIC_VBASE
+
+void platform_irq_enable(int irq);
+void platform_irq_disable(int irq);
+void timer_start(void);
+#endif /* __PLATFORM_PB926_PLATFORM_H__ */

include/l4/platform/pba8/printascii.h

@@ -0,0 +1,15 @@
+#ifndef __PLATFORM__PB926__PRINTASCII__H__
+#define __PLATFORM__PB926__PRINTASCII__H__
+
+#define	dprintk(str, val)		\
+{					\
+	printascii(str);		\
+	printascii("0x");		\
+	printhex8((val));		\
+	printascii("\n");		\
+}
+
+void printascii(char *str);
+void printhex8(unsigned int);
+
+#endif /* __PLATFORM__PB926__PRINTASCII__H__ */

include/l4/platform/pba8/uart.h

@@ -0,0 +1,20 @@
+/*
+ * Platform specific ties to generic uart functions that putc expects.
+ *
+ * Copyright (C) 2007 Bahadir Balban
+ *
+ */
+
+#ifndef __PLATFORM_PB926_UART_H__
+#define __PLATFORM_PB926_UART_H__
+
+#include INC_PLAT(offsets.h)
+#include INC_GLUE(memlayout.h)
+
+#define PLATFORM_CONSOLE_BASE			PB926_UART0_VBASE
+#include <l4/drivers/uart/pl011/pl011_uart.h>
+
+void uart_init(void);
+void uart_putc(char c);
+
+#endif /* __PLATFORM_PB926_UART_H__ */