From c44d25b596784d048bf5cf843f39dc037220b790 Mon Sep 17 00:00:00 2001 From: Amit Mahajan Date: Thu, 5 Nov 2009 23:45:11 +0530 Subject: [PATCH] Taking UART code out from libc and loader and putting in libdev --- SConstruct.loader | 17 +- SConstruct.userlibs | 12 +- conts/bare_src/SConstruct | 15 +- conts/libc/SConscript | 13 +- .../sys-userspace/arch-arm/platform_init.c | 53 --- .../src/sys-userspace/arch-arm/sys_fputc.c | 201 +-------- conts/libdev/SConscript | 34 ++ .../arch => libdev/uart/include}/pl011_uart.h | 18 +- conts/libdev/uart/src/pl011_uart.c | 199 +++++++++ .../libdev/uart/src}/platform_init.c | 26 +- conts/posix/SConstruct | 14 +- conts/posix/mm0/SConscript | 2 +- conts/posix/test0/src/crt0.S | 1 + conts/posix/test0/src/test_exec/crt0.S | 1 + loader/libs/c/SConscript | 8 +- loader/libs/c/include/arch/pl011_uart.h | 380 ------------------ .../c/src/sys-baremetal/arch-arm/sys_fputc.c | 199 +-------- scripts/kernel/generate_kernel_cinfo.py | 2 +- 18 files changed, 334 insertions(+), 861 deletions(-) delete mode 100644 conts/libc/src/sys-userspace/arch-arm/platform_init.c create mode 100644 conts/libdev/SConscript rename conts/{libc/include/sys-userspace/arch-arm/arch => libdev/uart/include}/pl011_uart.h (95%) create mode 100644 conts/libdev/uart/src/pl011_uart.c rename {loader/libs/c/src/sys-baremetal/arch-arm => conts/libdev/uart/src}/platform_init.c (86%) delete mode 100644 loader/libs/c/include/arch/pl011_uart.h diff --git a/SConstruct.loader b/SConstruct.loader index 7f96a78..c5a41c3 100644 --- a/SConstruct.loader +++ b/SConstruct.loader @@ -15,12 +15,18 @@ arch = config.arch platform = config.platform gcc_cpu_flag = config.gcc_cpu_flag +variant = 'baremetal' + # Locally important paths are here LIBC_PATH = 'loader/libs/c' LIBC_LIBPATH = LIBC_PATH LIBC_INCPATH = ['#' + join(LIBC_PATH, 'include'), \ '#' + join(LIBC_PATH, 'include/arch/' + arch)] +LIBDEV_PATH = 'conts/libdev' +LIBDEV_LIBPATH = join(LIBDEV_PATH, 'uart') +LIBDEV_INCPATH = ['#' + join(LIBDEV_PATH, 'uart/include'),] + LIBELF_PATH = 'loader/libs/elf' LIBELF_LIBPATH = LIBELF_PATH LIBELF_INCPATH = '#' + join(LIBELF_PATH, 'include') @@ -34,12 +40,15 @@ env = Environment(CC = config.kernel_toolchain + 'gcc', ASFLAGS = ['-D__ASSEMBLY__'], PROGSUFFIX = '.elf', ENV = {'PATH' : os.environ['PATH']}, - LIBS = ['gcc', 'elf', 'c-baremetal', 'gcc'], - LIBPATH = [join('build', LIBELF_PATH), join('build', LIBC_PATH)], - CPPPATH = ['#include', LIBC_INCPATH, LIBELF_INCPATH]) + LIBS = ['gcc', 'elf', 'libdev-baremetal', 'c-baremetal', 'gcc'], + LIBPATH = [join('build', LIBELF_PATH), join('build', LIBDEV_PATH), join('build', LIBC_PATH)], + CPPPATH = ['#include', LIBDEV_INCPATH, LIBC_INCPATH, LIBELF_INCPATH]) +libdev = SConscript('conts/libdev/SConscript', \ + exports = { 'env' : env, 'arch' : arch, 'platform' : platform, 'type' : variant}, \ + duplicate = 0, variant_dir = 'build/conts/libdev') libc = SConscript('loader/libs/c/SConscript', \ - exports = { 'env' : env, 'arch' : arch, 'platform' : platform }, \ + exports = { 'env' : env, 'arch' : arch, 'platform' : platform, 'type' : variant}, \ duplicate = 0, variant_dir = 'build/loader/libs/c') libelf = SConscript('loader/libs/elf/SConscript', exports = { 'env' : env }, \ duplicate = 0, variant_dir = 'build/loader/libs/elf') diff --git a/SConstruct.userlibs b/SConstruct.userlibs index 330883b..652dca6 100644 --- a/SConstruct.userlibs +++ b/SConstruct.userlibs @@ -28,14 +28,19 @@ env = Environment(CC = config.user_toolchain + 'gcc', CPPPATH = "#include", CPPFLAGS = '-include l4/config.h -include l4/macros.h -include l4/types.h') - - libl4 = SConscript('conts/libl4/SConscript', \ exports = { 'arch' : arch }, duplicate = 0, \ variant_dir = join(BUILDDIR, os.path.relpath('conts/libl4', PROJROOT))) +e = env.Clone() +e.Replace(CPPFLAGS = '') +libdev = SConscript('conts/libdev/SConscript', \ + exports = { 'env' : e, 'arch' : arch, 'platform' : platform, 'type' : 'userspace' }, \ + duplicate = 0, variant_dir = \ + join(BUILDDIR, os.path.relpath('conts/libdev', PROJROOT))) + libc = SConscript('conts/libc/SConscript', \ - exports = { 'env' : env, 'arch' : arch, 'platform' : platform }, \ + exports = { 'env' : env, 'arch' : arch, 'platform' : platform, 'type' : 'userspace' }, \ duplicate = 0, variant_dir = \ join(BUILDDIR, os.path.relpath('conts/libc', PROJROOT))) @@ -46,6 +51,7 @@ libmm, libmc, libmalloc = SConscript('conts/libmem/SConscript', \ Alias('libl4', libl4) +Alias('libdev', libdev) Alias('libc', libc) Alias('libmm', libmm) Alias('libmc', libmc) diff --git a/conts/bare_src/SConstruct b/conts/bare_src/SConstruct index 3bd1575..ae537d4 100644 --- a/conts/bare_src/SConstruct +++ b/conts/bare_src/SConstruct @@ -33,6 +33,11 @@ LIBC_LIBPATH = join(BUILDDIR, LIBC_RELDIR) LIBC_INCLUDE = [join(LIBC_DIR, 'include'), \ join(LIBC_DIR, 'include/arch' + '/' + arch)] +LIBDEV_RELDIR = 'conts/libdev' +LIBDEV_DIR = join(PROJROOT, LIBDEV_RELDIR) +LIBDEV_LIBPATH = join(BUILDDIR, LIBDEV_RELDIR) +LIBDEV_INCLUDE = [join(LIBDEV_DIR, 'uart/include')] + LIBMEM_RELDIR = 'conts/libmem' LIBMEM_DIR = join(PROJROOT, LIBMEM_RELDIR) LIBMEM_LIBPATH = join(BUILDDIR, LIBMEM_RELDIR) @@ -47,10 +52,12 @@ env = Environment(CC = config.user_toolchain + 'gcc', ASFLAGS = ['-D__ASSEMBLY__'], \ PROGSUFFIX = '.elf', # The suffix to use for final executable ENV = {'PATH' : os.environ['PATH']}, # Inherit shell path - LIBS = ['gcc', 'libl4', 'c-userspace', 'libmm', 'libmc', 'libmalloc', \ - 'gcc', 'c-userspace'], # libgcc.a - This is required for division routines. - CPPPATH = ["#include", KERNEL_INCLUDE, LIBL4_INCLUDE, LIBC_INCLUDE, LIBMEM_INCLUDE], - LIBPATH = [LIBL4_LIBPATH, LIBC_LIBPATH, LIBMEM_LIBPATH], + LIBS = ['gcc', 'libl4', 'c-userspace', 'libdev-userspace', \ + 'libmm', 'libmc', 'libmalloc', 'gcc', 'c-userspace'], + # libgcc.a - This is required for division routines. + CPPPATH = ["#include", KERNEL_INCLUDE, LIBL4_INCLUDE, LIBDEV_INCLUDE, \ + LIBC_INCLUDE, LIBMEM_INCLUDE], + LIBPATH = [LIBL4_LIBPATH, LIBDEV_LIBPATH, LIBC_LIBPATH, LIBMEM_LIBPATH], CPPFLAGS = '-include l4/config.h -include l4/macros.h -include l4/types.h') src = Glob('*.[cS]') diff --git a/conts/libc/SConscript b/conts/libc/SConscript index c412f66..e0136c8 100644 --- a/conts/libc/SConscript +++ b/conts/libc/SConscript @@ -15,14 +15,17 @@ sys.path.append(PROJRELROOT) from config.configuration import * from config.projpaths import * -Import('env', 'arch') +Import('env', 'arch', 'type') +variant = type -variant = 'userspace' +# Needed by fputc(), for declaration of pl011_uart_tx() +LIBDEV_PATH = join(PROJROOT, 'conts/libdev') +LIBDEV_INCPATH = [LIBDEV_PATH + '/uart/include'] e = env.Clone() - -e.Append(CPPPATH = ['include', 'include/sys-' + variant + '/arch-' + arch]) -e.Append(CCFLAGS = '-nostdinc') +e.Append(CPPPATH = ['include', 'include/sys-' + variant + '/arch-' + arch, + LIBDEV_INCPATH], + CCFLAGS = ['-nostdinc', '-DVARIANT_' + variant.upper()]) source = \ Glob('src/*.c') + \ diff --git a/conts/libc/src/sys-userspace/arch-arm/platform_init.c b/conts/libc/src/sys-userspace/arch-arm/platform_init.c deleted file mode 100644 index c317640..0000000 --- a/conts/libc/src/sys-userspace/arch-arm/platform_init.c +++ /dev/null @@ -1,53 +0,0 @@ -#include - -/* TODO: May need to remove this */ -struct pl011_uart uart = { - .base = PL011_USR_BASE, - }; - -/* - * Initialises the uart class data structures, and the device. - * Terminal-like operation is assumed for default settings. - */ -int pl011_initialise(struct pl011_uart * uart) -{ - uart->frame_errors = 0; - uart->parity_errors = 0; - uart->break_errors = 0; - uart->overrun_errors = 0; - - /* Initialise data register for 8 bit data read/writes */ - pl011_set_word_width(uart->base, 8); - - /* - * Fifos are disabled because by default it is assumed the port - * will be used as a user terminal, and in that case the typed - * characters will only show up when fifos are flushed, rather than - * when each character is typed. We avoid this by not using fifos. - */ - pl011_disable_fifos(uart->base); - - /* Set default baud rate of 38400 */ - pl011_set_baudrate(uart->base, 38400, 24000000); - - /* Set default settings of 1 stop bit, no parity, no hw flow ctrl */ - pl011_set_stopbits(uart->base, 1); - pl011_parity_disable(uart->base); - - /* Disable all irqs */ - pl011_set_irq_mask(uart->base, 0x3FF); - - /* Enable rx, tx, and uart chip */ - pl011_tx_enable(uart->base); - pl011_rx_enable(uart->base); - pl011_uart_enable(uart->base); - - return 0; -} - -void platform_init(void) -{ - uart.base = PL011_USR_BASE; - pl011_initialise(&uart); -} - diff --git a/conts/libc/src/sys-userspace/arch-arm/sys_fputc.c b/conts/libc/src/sys-userspace/arch-arm/sys_fputc.c index 3dc2f1d..01580de 100644 --- a/conts/libc/src/sys-userspace/arch-arm/sys_fputc.c +++ b/conts/libc/src/sys-userspace/arch-arm/sys_fputc.c @@ -1,205 +1,14 @@ /* - * Australian Public Licence B (OZPLB) - * - * Version 1-0 - * - * Copyright (c) 2004 National ICT Australia - * - * All rights reserved. - * - * Developed by: Embedded, Real-time and Operating Systems Program (ERTOS) - * National ICT Australia - * http://www.ertos.nicta.com.au - * - * Permission is granted by National ICT Australia, free of charge, to - * any person obtaining a copy of this software and any associated - * documentation files (the "Software") to deal with the Software without - * restriction, including (without limitation) the rights to use, copy, - * modify, adapt, merge, publish, distribute, communicate to the public, - * sublicense, and/or sell, lend or rent out copies of the Software, and - * to permit persons to whom the Software is furnished to do so, subject - * to the following conditions: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimers. - * - * * Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimers in the documentation and/or other materials provided - * with the distribution. - * - * * Neither the name of National ICT Australia, nor the names of its - * contributors, may be used to endorse or promote products derived - * from this Software without specific prior written permission. - * - * EXCEPT AS EXPRESSLY STATED IN THIS LICENCE AND TO THE FULL EXTENT - * PERMITTED BY APPLICABLE LAW, THE SOFTWARE IS PROVIDED "AS-IS", AND - * NATIONAL ICT AUSTRALIA AND ITS CONTRIBUTORS MAKE NO REPRESENTATIONS, - * WARRANTIES OR CONDITIONS OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING - * BUT NOT LIMITED TO ANY REPRESENTATIONS, WARRANTIES OR CONDITIONS - * REGARDING THE CONTENTS OR ACCURACY OF THE SOFTWARE, OR OF TITLE, - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, - * THE ABSENCE OF LATENT OR OTHER DEFECTS, OR THE PRESENCE OR ABSENCE OF - * ERRORS, WHETHER OR NOT DISCOVERABLE. - * - * TO THE FULL EXTENT PERMITTED BY APPLICABLE LAW, IN NO EVENT SHALL - * NATIONAL ICT AUSTRALIA OR ITS CONTRIBUTORS BE LIABLE ON ANY LEGAL - * THEORY (INCLUDING, WITHOUT LIMITATION, IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHERWISE) FOR ANY CLAIM, LOSS, DAMAGES OR OTHER - * LIABILITY, INCLUDING (WITHOUT LIMITATION) LOSS OF PRODUCTION OR - * OPERATION TIME, LOSS, DAMAGE OR CORRUPTION OF DATA OR RECORDS; OR LOSS - * OF ANTICIPATED SAVINGS, OPPORTUNITY, REVENUE, PROFIT OR GOODWILL, OR - * OTHER ECONOMIC LOSS; OR ANY SPECIAL, INCIDENTAL, INDIRECT, - * CONSEQUENTIAL, PUNITIVE OR EXEMPLARY DAMAGES, ARISING OUT OF OR IN - * CONNECTION WITH THIS LICENCE, THE SOFTWARE OR THE USE OF OR OTHER - * DEALINGS WITH THE SOFTWARE, EVEN IF NATIONAL ICT AUSTRALIA OR ITS - * CONTRIBUTORS HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH CLAIM, LOSS, - * DAMAGES OR OTHER LIABILITY. - * - * If applicable legislation implies representations, warranties, or - * conditions, or imposes obligations or liability on National ICT - * Australia or one of its contributors in respect of the Software that - * cannot be wholly or partly excluded, restricted or modified, the - * liability of National ICT Australia or the contributor is limited, to - * the full extent permitted by the applicable legislation, at its - * option, to: - * a. in the case of goods, any one or more of the following: - * i. the replacement of the goods or the supply of equivalent goods; - * ii. the repair of the goods; - * iii. the payment of the cost of replacing the goods or of acquiring - * equivalent goods; - * iv. the payment of the cost of having the goods repaired; or - * b. in the case of services: - * i. the supplying of the services again; or - * ii. the payment of the cost of having the services supplied again. - * - * The construction, validity and performance of this licence is governed - * by the laws in force in New South Wales, Australia. + * Ties up platform's uart driver functions with printf + * + * Copyright (C) 2009 B Labs Ltd. + * */ #include -#include -#include +#include extern struct pl011_uart uart; -/* UART-specific internal error codes */ -#define PL011_ERROR 1 -#define PL011_EAGAIN 2 - -/* Error status bits in receive status register */ -#define PL011_FE (1 << 0) -#define PL011_PE (1 << 1) -#define PL011_BE (1 << 2) -#define PL011_OE (1 << 3) - -/* Status bits in flag register */ -#define PL011_TXFE (1 << 7) -#define PL011_RXFF (1 << 6) -#define PL011_TXFF (1 << 5) -#define PL011_RXFE (1 << 4) -#define PL011_BUSY (1 << 3) -#define PL011_DCD (1 << 2) -#define PL011_DSR (1 << 1) -#define PL011_CTS (1 << 0) - -int pl011_tx_char(unsigned int base, char c) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTFR)); - if(val & PL011_TXFF) { /* TX FIFO Full */ - return -PL011_EAGAIN; - } - write(c, (base + PL011_UARTDR)); - return 0; -} - -int pl011_rx_char(unsigned int base, char * c) -{ - unsigned int data; - unsigned int val = 0; - - read(val, (base + PL011_UARTFR)); - if(val & PL011_RXFE) { /* RX FIFO Empty */ - return -PL011_EAGAIN; - } - - read(data, (base + PL011_UARTDR)); - *c = (char) data; - - if((data >> 8) & 0xF) { /* There were errors */ - return -1; /* Signal error in xfer */ - } - return 0; /* No error return */ -} - -/* - * Sets the baud rate in kbps. It is recommended to use - * standard rates such as: 1200, 2400, 3600, 4800, 7200, - * 9600, 14400, 19200, 28800, 38400, 57600 76800, 115200. - */ -void pl011_set_baudrate(unsigned int base, unsigned int baud, - unsigned int clkrate) -{ - const unsigned int uartclk = 24000000; /* 24Mhz clock fixed on pb926 */ - unsigned int val = 0, ipart = 0, fpart = 0; - - /* Use default pb926 rate if no rate is supplied */ - if(clkrate == 0) { - clkrate = uartclk; - } - if(baud > 115200 || baud < 1200) { - baud = 38400; /* Default rate. */ - } - /* 24000000 / (38400 * 16) */ - ipart = 39; - - write(ipart, (base + PL011_UARTIBRD)); - write(fpart, (base + PL011_UARTFBRD)); - - /* - * For the IBAUD and FBAUD to update, we need to - * write to UARTLCR_H because the 3 registers are - * actually part of a single register in hardware - * which only updates by a write to UARTLCR_H - */ - read(val, (base + PL011_UARTLCR_H)); - write(val, (base + PL011_UARTLCR_H)); - return; - -} - -/* Masks the irqs given in the flags bitvector. */ -void pl011_set_irq_mask(unsigned int base, unsigned int flags) -{ - unsigned int val = 0; - - if(flags > 0x3FF) { /* Invalid irqmask bitvector */ - return; - } - - read(val, (base + PL011_UARTIMSC)); - val |= flags; - write(val, (base + PL011_UARTIMSC)); - return; -} - -/* Clears the irqs given in flags from masking */ -void pl011_clr_irq_mask(unsigned int base, unsigned int flags) -{ - unsigned int val = 0; - - if(flags > 0x3FF) { - /* Invalid irqmask bitvector */ - return; - } - - read(val, (base + PL011_UARTIMSC)); - val &= ~flags; - write(val, (base + PL011_UARTIMSC)); - return; -} - int __fputc(int c, FILE *stream) { int res; diff --git a/conts/libdev/SConscript b/conts/libdev/SConscript new file mode 100644 index 0000000..2ff6bb3 --- /dev/null +++ b/conts/libdev/SConscript @@ -0,0 +1,34 @@ +# -*- mode: python; coding: utf-8; -*- +# +# Codezero -- Virtualization microkernel for embedded systems. +# +# Copyright © 2009 B Labs Ltd + +import os, sys, shelve +from os.path import join + +# Get global paths +PROJRELROOT = '../../../' + +sys.path.append(PROJRELROOT) + +from config.configuration import * +from config.projpaths import * + +Import('env', 'arch', 'platform', 'type') +variant = type + +# Path for uart files +LIBDEV_UART_PATH = join(PROJROOT, 'conts/libdev/uart') + +e = env.Clone() +e.Append(CPPPATH = [LIBDEV_UART_PATH + '/include'], + CCFLAGS = ['-nostdinc', '-DVARIANT_' + variant.upper(), + '-DPLATFORM_' + platform.upper()]) + +source = Glob('uart/src' + '/*.c') + +objects = e.StaticObject(source) +library = e.StaticLibrary('libdev-' + variant, objects) + +Return('library') diff --git a/conts/libc/include/sys-userspace/arch-arm/arch/pl011_uart.h b/conts/libdev/uart/include/pl011_uart.h similarity index 95% rename from conts/libc/include/sys-userspace/arch-arm/arch/pl011_uart.h rename to conts/libdev/uart/include/pl011_uart.h index 3315399..5df44e6 100644 --- a/conts/libc/include/sys-userspace/arch-arm/arch/pl011_uart.h +++ b/conts/libdev/uart/include/pl011_uart.h @@ -14,8 +14,22 @@ * such a driver so far, hopefully it will turn out to be useful. */ +#if defined(VARIANT_USERSPACE) /* FIXME: Take this value in agreement from kernel, or from kernel only */ -#define PL011_USR_BASE 0x500000 +#define PL011_BASE 0x500000 +#endif + +#if defined(VARIANT_BAREMETAL) +#if defined(PLATFORM_PB926) +#define PL011_BASE 0x101F1000 +#elif defined(PLATFORM_EB) +#define PL011_BASE 0x10009000 +#elif defined(PLATFORM_PB11MPCORE) +#define PL011_BASE 0x10009000 +#elif defined(PLATFORM_PBA8) +#define PL011_BASE 0x10009000 +#endif +#endif /* Architecture specific memory access macros */ #define read(val, address) val = *((volatile unsigned int *) address) @@ -59,7 +73,7 @@ struct pl011_uart { int pl011_tx_char(unsigned int base, char c); int pl011_rx_char(unsigned int base, char *c); -void pl011_set_baudrate(unsigned int base, unsigned int baud, +void pl011_set_baudrate(unsigned int base, unsigned int baud, unsigned int clkrate); void pl011_set_irq_mask(unsigned int base, unsigned int flags); void pl011_clr_irq_mask(unsigned int base, unsigned int flags); diff --git a/conts/libdev/uart/src/pl011_uart.c b/conts/libdev/uart/src/pl011_uart.c new file mode 100644 index 0000000..6784d7e --- /dev/null +++ b/conts/libdev/uart/src/pl011_uart.c @@ -0,0 +1,199 @@ +/* + * Australian Public Licence B (OZPLB) + * + * Version 1-0 + * + * Copyright (c) 2004 National ICT Australia + * + * All rights reserved. + * + * Developed by: Embedded, Real-time and Operating Systems Program (ERTOS) + * National ICT Australia + * http://www.ertos.nicta.com.au + * + * Permission is granted by National ICT Australia, free of charge, to + * any person obtaining a copy of this software and any associated + * documentation files (the "Software") to deal with the Software without + * restriction, including (without limitation) the rights to use, copy, + * modify, adapt, merge, publish, distribute, communicate to the public, + * sublicense, and/or sell, lend or rent out copies of the Software, and + * to permit persons to whom the Software is furnished to do so, subject + * to the following conditions: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimers. + * + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimers in the documentation and/or other materials provided + * with the distribution. + * + * * Neither the name of National ICT Australia, nor the names of its + * contributors, may be used to endorse or promote products derived + * from this Software without specific prior written permission. + * + * EXCEPT AS EXPRESSLY STATED IN THIS LICENCE AND TO THE FULL EXTENT + * PERMITTED BY APPLICABLE LAW, THE SOFTWARE IS PROVIDED "AS-IS", AND + * NATIONAL ICT AUSTRALIA AND ITS CONTRIBUTORS MAKE NO REPRESENTATIONS, + * WARRANTIES OR CONDITIONS OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + * BUT NOT LIMITED TO ANY REPRESENTATIONS, WARRANTIES OR CONDITIONS + * REGARDING THE CONTENTS OR ACCURACY OF THE SOFTWARE, OR OF TITLE, + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, + * THE ABSENCE OF LATENT OR OTHER DEFECTS, OR THE PRESENCE OR ABSENCE OF + * ERRORS, WHETHER OR NOT DISCOVERABLE. + * + * TO THE FULL EXTENT PERMITTED BY APPLICABLE LAW, IN NO EVENT SHALL + * NATIONAL ICT AUSTRALIA OR ITS CONTRIBUTORS BE LIABLE ON ANY LEGAL + * THEORY (INCLUDING, WITHOUT LIMITATION, IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHERWISE) FOR ANY CLAIM, LOSS, DAMAGES OR OTHER + * LIABILITY, INCLUDING (WITHOUT LIMITATION) LOSS OF PRODUCTION OR + * OPERATION TIME, LOSS, DAMAGE OR CORRUPTION OF DATA OR RECORDS; OR LOSS + * OF ANTICIPATED SAVINGS, OPPORTUNITY, REVENUE, PROFIT OR GOODWILL, OR + * OTHER ECONOMIC LOSS; OR ANY SPECIAL, INCIDENTAL, INDIRECT, + * CONSEQUENTIAL, PUNITIVE OR EXEMPLARY DAMAGES, ARISING OUT OF OR IN + * CONNECTION WITH THIS LICENCE, THE SOFTWARE OR THE USE OF OR OTHER + * DEALINGS WITH THE SOFTWARE, EVEN IF NATIONAL ICT AUSTRALIA OR ITS + * CONTRIBUTORS HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH CLAIM, LOSS, + * DAMAGES OR OTHER LIABILITY. + * + * If applicable legislation implies representations, warranties, or + * conditions, or imposes obligations or liability on National ICT + * Australia or one of its contributors in respect of the Software that + * cannot be wholly or partly excluded, restricted or modified, the + * liability of National ICT Australia or the contributor is limited, to + * the full extent permitted by the applicable legislation, at its + * option, to: + * a. in the case of goods, any one or more of the following: + * i. the replacement of the goods or the supply of equivalent goods; + * ii. the repair of the goods; + * iii. the payment of the cost of replacing the goods or of acquiring + * equivalent goods; + * iv. the payment of the cost of having the goods repaired; or + * b. in the case of services: + * i. the supplying of the services again; or + * ii. the payment of the cost of having the services supplied again. + * + * The construction, validity and performance of this licence is governed + * by the laws in force in New South Wales, Australia. + */ + +#include + +/* UART-specific internal error codes */ +#define PL011_ERROR 1 +#define PL011_EAGAIN 2 + +/* Error status bits in receive status register */ +#define PL011_FE (1 << 0) +#define PL011_PE (1 << 1) +#define PL011_BE (1 << 2) +#define PL011_OE (1 << 3) + +/* Status bits in flag register */ +#define PL011_TXFE (1 << 7) +#define PL011_RXFF (1 << 6) +#define PL011_TXFF (1 << 5) +#define PL011_RXFE (1 << 4) +#define PL011_BUSY (1 << 3) +#define PL011_DCD (1 << 2) +#define PL011_DSR (1 << 1) +#define PL011_CTS (1 << 0) + +int pl011_tx_char(unsigned int base, char c) +{ + unsigned int val = 0; + + read(val, (base + PL011_UARTFR)); + if(val & PL011_TXFF) { /* TX FIFO Full */ + return -PL011_EAGAIN; + } + write(c, (base + PL011_UARTDR)); + return 0; +} + +int pl011_rx_char(unsigned int base, char * c) +{ + unsigned int data; + unsigned int val = 0; + + read(val, (base + PL011_UARTFR)); + if(val & PL011_RXFE) { /* RX FIFO Empty */ + return -PL011_EAGAIN; + } + + read(data, (base + PL011_UARTDR)); + *c = (char) data; + + if((data >> 8) & 0xF) { /* There were errors */ + return -1; /* Signal error in xfer */ + } + return 0; /* No error return */ +} + +/* + * Sets the baud rate in kbps. It is recommended to use + * standard rates such as: 1200, 2400, 3600, 4800, 7200, + * 9600, 14400, 19200, 28800, 38400, 57600 76800, 115200. + */ +void pl011_set_baudrate(unsigned int base, unsigned int baud, + unsigned int clkrate) +{ + const unsigned int uartclk = 24000000; /* 24Mhz clock fixed on pb926 */ + unsigned int val = 0, ipart = 0, fpart = 0; + + /* Use default pb926 rate if no rate is supplied */ + if(clkrate == 0) { + clkrate = uartclk; + } + if(baud > 115200 || baud < 1200) { + baud = 38400; /* Default rate. */ + } + /* 24000000 / (38400 * 16) */ + ipart = 39; + + write(ipart, (base + PL011_UARTIBRD)); + write(fpart, (base + PL011_UARTFBRD)); + + /* + * For the IBAUD and FBAUD to update, we need to + * write to UARTLCR_H because the 3 registers are + * actually part of a single register in hardware + * which only updates by a write to UARTLCR_H + */ + read(val, (base + PL011_UARTLCR_H)); + write(val, (base + PL011_UARTLCR_H)); + return; + +} + +/* Masks the irqs given in the flags bitvector. */ +void pl011_set_irq_mask(unsigned int base, unsigned int flags) +{ + unsigned int val = 0; + + if(flags > 0x3FF) { /* Invalid irqmask bitvector */ + return; + } + + read(val, (base + PL011_UARTIMSC)); + val |= flags; + write(val, (base + PL011_UARTIMSC)); + return; +} + +/* Clears the irqs given in flags from masking */ +void pl011_clr_irq_mask(unsigned int base, unsigned int flags) +{ + unsigned int val = 0; + + if(flags > 0x3FF) { + /* Invalid irqmask bitvector */ + return; + } + + read(val, (base + PL011_UARTIMSC)); + val &= ~flags; + write(val, (base + PL011_UARTIMSC)); + return; +} + diff --git a/loader/libs/c/src/sys-baremetal/arch-arm/platform_init.c b/conts/libdev/uart/src/platform_init.c similarity index 86% rename from loader/libs/c/src/sys-baremetal/arch-arm/platform_init.c rename to conts/libdev/uart/src/platform_init.c index eb4775c..4234266 100644 --- a/loader/libs/c/src/sys-baremetal/arch-arm/platform_init.c +++ b/conts/libdev/uart/src/platform_init.c @@ -1,15 +1,17 @@ -#include +/* + * User space uart driver. + * + * Copyright (C) 2009, B Labs Ltd. + */ +#include + +/* + * Every task who wants to use this uart needs + * to initialize an instance of this + */ struct pl011_uart uart; -void platform_init(void); - -void platform_init(void) -{ - uart.base = PL011_BASE; - pl011_initialise(&uart); -} - /* * Initialises the uart class data structures, and the device. * Terminal-like operation is assumed for default settings. @@ -50,3 +52,9 @@ int pl011_initialise(struct pl011_uart * uart) return 0; } +void platform_init(void) +{ + uart.base = PL011_BASE; + pl011_initialise(&uart); +} + diff --git a/conts/posix/SConstruct b/conts/posix/SConstruct index 41effcc..1471be5 100644 --- a/conts/posix/SConstruct +++ b/conts/posix/SConstruct @@ -32,6 +32,11 @@ LIBC_LIBPATH = join(BUILDDIR, LIBC_RELDIR) LIBC_INCLUDE = [join(LIBC_DIR, 'include'), \ join(LIBC_DIR, 'include/arch' + '/' + arch)] +LIBDEV_RELDIR = 'conts/libdev' +LIBDEV_DIR = join(PROJROOT, LIBDEV_RELDIR) +LIBDEV_LIBPATH = join(BUILDDIR, LIBDEV_RELDIR) +LIBDEV_INCLUDE = [join(LIBDEV_DIR, 'uart/include')] + LIBMEM_RELDIR = 'conts/libmem' LIBMEM_DIR = join(PROJROOT, LIBMEM_RELDIR) LIBMEM_LIBPATH = join(BUILDDIR, LIBMEM_RELDIR) @@ -50,9 +55,12 @@ env = Environment(CC = config.user_toolchain + 'gcc', ASFLAGS = ['-D__ASSEMBLY__'], PROGSUFFIX = '.elf', ENV = {'PATH' : os.environ['PATH']}, - LIBS = ['gcc', 'libl4', 'c-userspace', 'libmm', 'libmc', 'libmalloc', 'gcc'], - CPPPATH = ['include', LIBC_INCLUDE, KERNEL_INCLUDE, LIBL4_INCLUDE, LIBMEM_INCLUDE], - LIBPATH = [LIBC_LIBPATH, LIBL4_LIBPATH, LIBMEM_LIBPATH, LIBPOSIX_LIBPATH], + LIBS = ['gcc', 'libl4', 'c-userspace','libdev-userspace', \ + 'libmm', 'libmc', 'libmalloc', 'gcc'], + CPPPATH = ['include', LIBDEV_INCLUDE, LIBC_INCLUDE, KERNEL_INCLUDE, + LIBL4_INCLUDE, LIBMEM_INCLUDE], + LIBPATH = [LIBDEV_LIBPATH, LIBC_LIBPATH, LIBL4_LIBPATH, + LIBMEM_LIBPATH, LIBPOSIX_LIBPATH], CPPFLAGS = '-include l4/config.h -include l4/macros.h -include l4/types.h') contid = ARGUMENTS.get('cont', '0') diff --git a/conts/posix/mm0/SConscript b/conts/posix/mm0/SConscript index 53ce3b5..d4bf57d 100644 --- a/conts/posix/mm0/SConscript +++ b/conts/posix/mm0/SConscript @@ -52,7 +52,7 @@ def generate_vma_lma_lds(target, source, env): lma_lds = Command('include/linker.lds', 'include/linker.lds.in', generate_vma_lma_lds) container_h = Command('include/container.h', 'include/container.h.in', generate_container_h) -src = [Glob('*.c') + Glob('mm/*.c') + Glob('lib/*.c') + Glob('fs/*.c') + Glob('fs/memfs/*.c') + Glob('lib/elf/*.c') + Glob('mm/arch/*.c')] +src = [Glob('*.c') + Glob('mm/*.c') + Glob('lib/*.c') + Glob('fs/*.c') + Glob('fs/memfs/*.c') + Glob('lib/elf/*.c') + Glob('mm/arch/*.[Sc]')] e = env.Clone() diff --git a/conts/posix/test0/src/crt0.S b/conts/posix/test0/src/crt0.S index b9aabb0..be1e944 100644 --- a/conts/posix/test0/src/crt0.S +++ b/conts/posix/test0/src/crt0.S @@ -13,6 +13,7 @@ .global _start; .align; _start: + bl platform_init mov fp, #0 @ Clear frame pointer mov lr, #0 @ Clear link register ldmfd sp!, {r0} @ Argc value in r0 diff --git a/conts/posix/test0/src/test_exec/crt0.S b/conts/posix/test0/src/test_exec/crt0.S index b9aabb0..be1e944 100644 --- a/conts/posix/test0/src/test_exec/crt0.S +++ b/conts/posix/test0/src/test_exec/crt0.S @@ -13,6 +13,7 @@ .global _start; .align; _start: + bl platform_init mov fp, #0 @ Clear frame pointer mov lr, #0 @ Clear link register ldmfd sp!, {r0} @ Argc value in r0 diff --git a/loader/libs/c/SConscript b/loader/libs/c/SConscript index 7ff03c1..552c41d 100644 --- a/loader/libs/c/SConscript +++ b/loader/libs/c/SConscript @@ -15,12 +15,12 @@ sys.path.append(PROJRELROOT) from config.configuration import * from config.projpaths import * -Import('env', 'arch', 'platform') -variant = 'baremetal' +Import('env', 'arch', 'platform', 'type') +variant = type e = env.Clone() -e.Append(CPPPATH = ['include/sys-' + variant + '/arch-' + arch]) -e.Append(CCFLAGS = ['-nostdinc', ('-D' + platform)]) +e.Append(CPPPATH = ['include/sys-' + variant + '/arch-' + arch], + CCFLAGS = ['-nostdinc', '-DVARIANT_' + variant.upper()]) source = \ Glob('src/*.c') + \ diff --git a/loader/libs/c/include/arch/pl011_uart.h b/loader/libs/c/include/arch/pl011_uart.h deleted file mode 100644 index fb873bc..0000000 --- a/loader/libs/c/include/arch/pl011_uart.h +++ /dev/null @@ -1,380 +0,0 @@ - -#ifndef __PL011__UART__H__ -#define __PL011__UART__H__ - -/* - * PL011 UART Generic driver implementation. - * Copyright Bahadir Balban (C) 2006 - * - * The particular intention of this code is that it has been carefully - * written as decoupled from os-specific code and in a verbose way such - * that it clearly demonstrates how the device operates, reducing the - * amount of time to be spent for understanding the operational model - * and implementing a driver from scratch. This is the very first to be - * such a driver so far, hopefully it will turn out to be useful. - */ - -/* Select the physcial base address of UART0 based on platform selected */ -#if defined(pb926) -#define PL011_DEFAULT_PHYSICAL_BASE 0x101F1000 -#elif defined(eb) -#define PL011_DEFAULT_PHYSICAL_BASE 0x10009000 -#elif defined(pb11mpcore) -#define PL011_DEFAULT_PHYSICAL_BASE 0x10009000 -#elif defined(pba8) -#define PL011_DEFAULT_PHYSICAL_BASE 0x10009000 -#endif - -#define PL011_BASE PL011_DEFAULT_PHYSICAL_BASE - -/* Architecture specific memory access macros */ -#define read(val, address) val = *((volatile unsigned int *) address) -#define write(val, address) *((volatile unsigned int *) address) = val - -/* Register offsets */ -#define PL011_UARTDR 0x00 -#define PL011_UARTRSR 0x04 -#define PL011_UARTECR 0x04 -#define PL011_UARTFR 0x18 -#define PL011_UARTILPR 0x20 -#define PL011_UARTIBRD 0x24 -#define PL011_UARTFBRD 0x28 -#define PL011_UARTLCR_H 0x2C -#define PL011_UARTCR 0x30 -#define PL011_UARTIFLS 0x34 -#define PL011_UARTIMSC 0x38 -#define PL011_UARTRIS 0x3C -#define PL011_UARTMIS 0x40 -#define PL011_UARTICR 0x44 -#define PL011_UARTDMACR 0x48 - -/* IRQ bits for each uart irq event */ -#define PL011_RXIRQ (1 << 4) -#define PL011_TXIRQ (1 << 5) -#define PL011_RXTIMEOUTIRQ (1 << 6) -#define PL011_FEIRQ (1 << 7) -#define PL011_PEIRQ (1 << 8) -#define PL011_BEIRQ (1 << 9) -#define PL011_OEIRQ (1 << 10) - -/* FIXME: Need to define this somewhere else */ -struct pl011_uart uart; - -int pl011_initialise(struct pl011_uart *uart); -int pl011_tx_char(unsigned int base, char c); -int pl011_rx_char(unsigned int base, char *c); - -void pl011_set_baudrate(unsigned int base, unsigned int baud, - unsigned int clkrate); -void pl011_set_irq_mask(unsigned int base, unsigned int flags); -void pl011_clr_irq_mask(unsigned int base, unsigned int flags); - -void pl011_irq_handler(struct pl011_uart *); -void pl011_tx_irq_handler(struct pl011_uart *uart, unsigned int); -void pl011_rx_irq_handler(struct pl011_uart *uart, unsigned int); -void pl011_error_irq_handler(struct pl011_uart *uart, unsigned int); - -static inline void pl011_uart_enable(unsigned int base); -static inline void pl011_uart_disable(unsigned int base); -static inline void pl011_tx_enable(unsigned int base); -static inline void pl011_tx_disable(unsigned int base); -static inline void pl011_rx_enable(unsigned int base); -static inline void pl011_rx_disable(unsigned int base); -static inline void pl011_irq_clear(unsigned int base, unsigned int flags); -static inline unsigned int pl011_read_irqstat(unsigned int base); -static inline unsigned int pl011_read_irqmask(unsigned int base); -static inline void pl011_rx_dma_disable(unsigned int base); -static inline void pl011_rx_dma_enable(unsigned int base); -static inline void pl011_tx_dma_enable(unsigned int base); -static inline void pl011_tx_dma_disable(unsigned int base); -static inline void pl011_set_irq_fifolevel(unsigned int base, - unsigned int xfer, unsigned int level); -static inline void pl011_set_word_width(unsigned int base, int size); -static inline void pl011_disable_fifos(unsigned int base); -static inline void pl011_set_parity_even(unsigned int base); -static inline void pl011_parity_enable(unsigned int base); -static inline void pl011_set_stopbits(unsigned int base, int stopbits); - -static inline void pl011_set_parity_odd(unsigned int base); -static inline void pl011_enable_fifos(unsigned int base); -static inline void pl011_parity_disable(unsigned int base); - -struct pl011_uart { - unsigned int base; - unsigned int frame_errors; - unsigned int parity_errors; - unsigned int break_errors; - unsigned int overrun_errors; - unsigned int rx_timeout_errors; -}; - -#define PL011_UARTEN (1 << 0) -static inline void pl011_uart_enable(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTCR)); - val |= PL011_UARTEN; - write(val, (base + PL011_UARTCR)); - - return; -} - -static inline void pl011_uart_disable(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTCR)); - val &= ~PL011_UARTEN; - write(val, (base + PL011_UARTCR)); - - return; -} - -#define PL011_TXE (1 << 8) -static inline void pl011_tx_enable(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTCR)); - val |= PL011_TXE; - write(val, (base + PL011_UARTCR)); - return; -} - -static inline void pl011_tx_disable(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTCR)); - val &= ~PL011_TXE; - write(val, (base + PL011_UARTCR)); - return; -} - -#define PL011_RXE (1 << 9) -static inline void pl011_rx_enable(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTCR)); - val |= PL011_RXE; - write(val, (base + PL011_UARTCR)); - return; -} - -static inline void pl011_rx_disable(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTCR)); - val &= ~PL011_RXE; - write(val, (base + PL011_UARTCR)); - return; -} - -#define PL011_TWO_STOPBITS_SELECT (1 << 3) -static inline void pl011_set_stopbits(unsigned int base, int stopbits) -{ - unsigned int val = 0; - read(val, (base + PL011_UARTLCR_H)); - - if(stopbits == 2) { /* Set to two bits */ - val |= PL011_TWO_STOPBITS_SELECT; - } else { /* Default is 1 */ - val &= ~PL011_TWO_STOPBITS_SELECT; - } - write(val, (base + PL011_UARTLCR_H)); - return; -} - -#define PL011_PARITY_ENABLE (1 << 1) -static inline void pl011_parity_enable(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base +PL011_UARTLCR_H)); - val |= PL011_PARITY_ENABLE; - write(val, (base + PL011_UARTLCR_H)); - return; -} - -static inline void pl011_parity_disable(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTLCR_H)); - val &= ~PL011_PARITY_ENABLE; - write(val, (base + PL011_UARTLCR_H)); - return; -} - -#define PL011_PARITY_EVEN (1 << 2) -static inline void pl011_set_parity_even(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTLCR_H)); - val |= PL011_PARITY_EVEN; - write(val, (base + PL011_UARTLCR_H)); - return; -} - -static inline void pl011_set_parity_odd(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTLCR_H)); - val &= ~PL011_PARITY_EVEN; - write(val, (base + PL011_UARTLCR_H)); - return; -} - -#define PL011_ENABLE_FIFOS (1 << 4) -static inline void pl011_enable_fifos(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTLCR_H)); - val |= PL011_ENABLE_FIFOS; - write(val, (base + PL011_UARTLCR_H)); - return; -} - -static inline void pl011_disable_fifos(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTLCR_H)); - val &= ~PL011_ENABLE_FIFOS; - write(val, (base + PL011_UARTLCR_H)); - return; -} - -#define PL011_WORD_WIDTH_SHIFT (5) -/* Sets the transfer word width for the data register. */ -static inline void pl011_set_word_width(unsigned int base, int size) -{ - unsigned int val = 0; - if(size < 5 || size > 8) /* Default is 8 */ - size = 8; - - /* Clear size field */ - read(val, (base + PL011_UARTLCR_H)); - val &= ~(0x3 << PL011_WORD_WIDTH_SHIFT); - write(val, (base + PL011_UARTLCR_H)); - - /* - * The formula is to write 5 less of size given: - * 11 = 8 bits - * 10 = 7 bits - * 01 = 6 bits - * 00 = 5 bits - */ - read(val, (base + PL011_UARTLCR_H)); - val |= (size - 5) << PL011_WORD_WIDTH_SHIFT; - write(val, (base + PL011_UARTLCR_H)); - - return; -} - -/* - * Defines at which level of fifo fullness an irq will be generated. - * @xfer: tx fifo = 0, rx fifo = 1 - * @level: Generate irq if: - * 0 rxfifo >= 1/8 full txfifo <= 1/8 full - * 1 rxfifo >= 1/4 full txfifo <= 1/4 full - * 2 rxfifo >= 1/2 full txfifo <= 1/2 full - * 3 rxfifo >= 3/4 full txfifo <= 3/4 full - * 4 rxfifo >= 7/8 full txfifo <= 7/8 full - * 5-7 reserved reserved - */ -static inline void pl011_set_irq_fifolevel(unsigned int base, \ - unsigned int xfer, unsigned int level) -{ - if(xfer != 1 && xfer != 0) /* Invalid fifo */ - return; - if(level > 4) /* Invalid level */ - return; - - write(level << (xfer * 3), (base + PL011_UARTIFLS)); - return; -} - -/* returns which irqs are masked */ -static inline unsigned int pl011_read_irqmask(unsigned int base) -{ - unsigned int flags; - read(flags, (base + PL011_UARTIMSC)); - return flags; -} - -/* returns masked irq status */ -static inline unsigned int pl011_read_irqstat(unsigned int base) -{ - unsigned int irqstatus; - read(irqstatus, (base + PL011_UARTMIS)); - return irqstatus; -} - -/* Clears the given asserted irqs */ -static inline void pl011_irq_clear(unsigned int base, unsigned int flags) -{ - if(flags > 0x3FF) { - /* Invalid irq clearing bitvector */ - return; - } - /* Simply write the flags since it's a write-only register */ - write(flags, (base + PL011_UARTICR)); - return; -} - -#define PL011_TXDMAEN (1 << 1) -#define PL011_RXDMAEN (1 << 0) -/* - * Enables dma transfers for uart. The dma controller - * must be initialised, set-up and enabled separately. - */ -static inline void pl011_tx_dma_enable(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTDMACR)); - val |= PL011_TXDMAEN; - write(val, (base + PL011_UARTDMACR)); - return; -} - -/* Disables dma transfers for uart */ -static inline void pl011_tx_dma_disable(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTDMACR)); - val &= ~PL011_TXDMAEN; - write(val, (base + PL011_UARTDMACR)); - return; -} - -static inline void pl011_rx_dma_enable(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTDMACR)); - val |= PL011_RXDMAEN; - write(val, (base + PL011_UARTDMACR)); - return; -} - -static inline void pl011_rx_dma_disable(unsigned int base) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTDMACR)); - val &= ~PL011_RXDMAEN; - write(val, (base +PL011_UARTDMACR)); - return; -} - -#endif /* __PL011__UART__ */ - diff --git a/loader/libs/c/src/sys-baremetal/arch-arm/sys_fputc.c b/loader/libs/c/src/sys-baremetal/arch-arm/sys_fputc.c index c45afc1..521ab61 100644 --- a/loader/libs/c/src/sys-baremetal/arch-arm/sys_fputc.c +++ b/loader/libs/c/src/sys-baremetal/arch-arm/sys_fputc.c @@ -1,207 +1,14 @@ /* - * Australian Public Licence B (OZPLB) + * Ties up platform's uart driver functions with printf * - * Version 1-0 + * Copyright (C) 2009 B Labs Ltd. * - * Copyright (c) 2004 National ICT Australia - * - * All rights reserved. - * - * Developed by: Embedded, Real-time and Operating Systems Program (ERTOS) - * National ICT Australia - * http://www.ertos.nicta.com.au - * - * Permission is granted by National ICT Australia, free of charge, to - * any person obtaining a copy of this software and any associated - * documentation files (the "Software") to deal with the Software without - * restriction, including (without limitation) the rights to use, copy, - * modify, adapt, merge, publish, distribute, communicate to the public, - * sublicense, and/or sell, lend or rent out copies of the Software, and - * to permit persons to whom the Software is furnished to do so, subject - * to the following conditions: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimers. - * - * * Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimers in the documentation and/or other materials provided - * with the distribution. - * - * * Neither the name of National ICT Australia, nor the names of its - * contributors, may be used to endorse or promote products derived - * from this Software without specific prior written permission. - * - * EXCEPT AS EXPRESSLY STATED IN THIS LICENCE AND TO THE FULL EXTENT - * PERMITTED BY APPLICABLE LAW, THE SOFTWARE IS PROVIDED "AS-IS", AND - * NATIONAL ICT AUSTRALIA AND ITS CONTRIBUTORS MAKE NO REPRESENTATIONS, - * WARRANTIES OR CONDITIONS OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING - * BUT NOT LIMITED TO ANY REPRESENTATIONS, WARRANTIES OR CONDITIONS - * REGARDING THE CONTENTS OR ACCURACY OF THE SOFTWARE, OR OF TITLE, - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, - * THE ABSENCE OF LATENT OR OTHER DEFECTS, OR THE PRESENCE OR ABSENCE OF - * ERRORS, WHETHER OR NOT DISCOVERABLE. - * - * TO THE FULL EXTENT PERMITTED BY APPLICABLE LAW, IN NO EVENT SHALL - * NATIONAL ICT AUSTRALIA OR ITS CONTRIBUTORS BE LIABLE ON ANY LEGAL - * THEORY (INCLUDING, WITHOUT LIMITATION, IN AN ACTION OF CONTRACT, - * NEGLIGENCE OR OTHERWISE) FOR ANY CLAIM, LOSS, DAMAGES OR OTHER - * LIABILITY, INCLUDING (WITHOUT LIMITATION) LOSS OF PRODUCTION OR - * OPERATION TIME, LOSS, DAMAGE OR CORRUPTION OF DATA OR RECORDS; OR LOSS - * OF ANTICIPATED SAVINGS, OPPORTUNITY, REVENUE, PROFIT OR GOODWILL, OR - * OTHER ECONOMIC LOSS; OR ANY SPECIAL, INCIDENTAL, INDIRECT, - * CONSEQUENTIAL, PUNITIVE OR EXEMPLARY DAMAGES, ARISING OUT OF OR IN - * CONNECTION WITH THIS LICENCE, THE SOFTWARE OR THE USE OF OR OTHER - * DEALINGS WITH THE SOFTWARE, EVEN IF NATIONAL ICT AUSTRALIA OR ITS - * CONTRIBUTORS HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH CLAIM, LOSS, - * DAMAGES OR OTHER LIABILITY. - * - * If applicable legislation implies representations, warranties, or - * conditions, or imposes obligations or liability on National ICT - * Australia or one of its contributors in respect of the Software that - * cannot be wholly or partly excluded, restricted or modified, the - * liability of National ICT Australia or the contributor is limited, to - * the full extent permitted by the applicable legislation, at its - * option, to: - * a. in the case of goods, any one or more of the following: - * i. the replacement of the goods or the supply of equivalent goods; - * ii. the repair of the goods; - * iii. the payment of the cost of replacing the goods or of acquiring - * equivalent goods; - * iv. the payment of the cost of having the goods repaired; or - * b. in the case of services: - * i. the supplying of the services again; or - * ii. the payment of the cost of having the services supplied again. - * - * The construction, validity and performance of this licence is governed - * by the laws in force in New South Wales, Australia. */ #include -#include -#include +#include extern struct pl011_uart uart; -/* UART-specific internal error codes */ -#define PL011_ERROR 1 -#define PL011_EAGAIN 2 - -/* Error status bits in receive status register */ -#define PL011_FE (1 << 0) -#define PL011_PE (1 << 1) -#define PL011_BE (1 << 2) -#define PL011_OE (1 << 3) - -/* Status bits in flag register */ -#define PL011_TXFE (1 << 7) -#define PL011_RXFF (1 << 6) -#define PL011_TXFF (1 << 5) -#define PL011_RXFE (1 << 4) -#define PL011_BUSY (1 << 3) -#define PL011_DCD (1 << 2) -#define PL011_DSR (1 << 1) -#define PL011_CTS (1 << 0) - -int pl011_tx_char(unsigned int base, char c) -{ - unsigned int val = 0; - - read(val, (base + PL011_UARTFR)); - if(val & PL011_TXFF) { /* TX FIFO Full */ - return -PL011_EAGAIN; - } - write(c, (base + PL011_UARTDR)); - return 0; -} - -int pl011_rx_char(unsigned int base, char * c) -{ - unsigned int data; - unsigned int val = 0; - - read(val, (base + PL011_UARTFR)); - if(val & PL011_RXFE) { /* RX FIFO Empty */ - return -PL011_EAGAIN; - } - - read(data, (base + PL011_UARTDR)); - *c = (char) data; - - if((data >> 8) & 0xF) { /* There were errors */ - return -1; /* Signal error in xfer */ - } - return 0; /* No error return */ -} - -/* - * Sets the baud rate in kbps. It is recommended to use - * standard rates such as: 1200, 2400, 3600, 4800, 7200, - * 9600, 14400, 19200, 28800, 38400, 57600 76800, 115200. - */ -void pl011_set_baudrate(unsigned int base, unsigned int baud, - unsigned int clkrate) -{ - const unsigned int uartclk = 24000000; /* 24Mhz clock fixed on pb926 */ - unsigned int val = 0; - unsigned int ipart = 0, fpart = 0; - - /* Use default pb926 rate if no rate is supplied */ - if(clkrate == 0) { - clkrate = uartclk; - } - if(baud > 115200 || baud < 1200) { - baud = 38400; /* Default rate. */ - } - - ipart = 39; /* clkrate / (16 * baud) */ - - write(ipart, (base + PL011_UARTIBRD)); - write(fpart, (base + PL011_UARTFBRD)); - - /* - * For the IBAUD and FBAUD to update, we need to - * write to UARTLCR_H because the 3 registers are - * actually part of a single register in hardware - * which only updates by a write to UARTLCR_H - */ - read(val, (base + PL011_UARTLCR_H)); - write(val, (base + PL011_UARTLCR_H)); - return; - -} - -/* Masks the irqs given in the flags bitvector. */ -void pl011_set_irq_mask(unsigned int base, unsigned int flags) -{ - unsigned int val = 0; - - if(flags > 0x3FF) { - /* Invalid irqmask bitvector */ - return; - } - - read(val, (base + PL011_UARTIMSC)); - val |= flags; - write(val, (base + PL011_UARTIMSC)); - return; -} - -/* Clears the irqs given in flags from masking */ -void pl011_clr_irq_mask(unsigned int base, unsigned int flags) -{ - unsigned int val = 0; - - if(flags > 0x3FF) { - /* Invalid irqmask bitvector */ - return; - } - - read(val, (base + PL011_UARTIMSC)); - val &= ~flags; - write(val, (base + PL011_UARTIMSC)); - return; -} - int __fputc(int c, FILE *stream) { int res; diff --git a/scripts/kernel/generate_kernel_cinfo.py b/scripts/kernel/generate_kernel_cinfo.py index a69e353..022c9f4 100755 --- a/scripts/kernel/generate_kernel_cinfo.py +++ b/scripts/kernel/generate_kernel_cinfo.py @@ -222,7 +222,7 @@ def generate_pager_memory_ifdefs(config, containers): pager_ifdef_string += pager_ifdefs_todotext linux = 1 pager_ifdef_string += \ - pager_mapsize % (c.id, config.containers[c.id].pager_size) + pager_mapsize % (c.id, c.pager_size) pager_ifdef_string += pager_ifdefs % { 'cn' : c.id } return pager_ifdef_string