From f337257e4e378cdd5db61ca9df0b75b7b7e51ee5 Mon Sep 17 00:00:00 2001 From: Amit Mahajan Date: Fri, 30 Oct 2009 12:32:08 +0530 Subject: [PATCH] Corrected the problem of wrong values in printascii.S --- scripts/linux/build_linux.py | 3 +-- src/platform/eb/printascii.S | 26 ++++++++++++++++++-------- src/platform/pb11mpcore/printascii.S | 26 ++++++++++++++++++-------- src/platform/pb926/printascii.S | 26 ++++++++++++++++++-------- src/platform/pba8/printascii.S | 26 ++++++++++++++++++-------- 5 files changed, 73 insertions(+), 34 deletions(-) diff --git a/scripts/linux/build_linux.py b/scripts/linux/build_linux.py index c64c5fe..0f0a41b 100755 --- a/scripts/linux/build_linux.py +++ b/scripts/linux/build_linux.py @@ -37,8 +37,7 @@ class LinuxUpdateKernel: ['SCSI', 'SET'],['BLK_DEV_SD', 'SET'], ['SYM53C8XX_2', 'SET'],['INPUT_EVDEV', 'SET'], ['INOTIFY', 'SET'],['DEBUG_INFO', 'SET'], - ['USB_SUPPORT', 'UNSET'],['SOUND', 'UNSET'], - ['MMC', 'UNSET'],) + ['USB_SUPPORT', 'UNSET'],['SOUND', 'UNSET'],) # List of CPUIDs, to be used by linux based on codezero config self.cpuid_list = (['ARM926', '0x41069265'],) diff --git a/src/platform/eb/printascii.S b/src/platform/eb/printascii.S index 6aaa574..2f35928 100644 --- a/src/platform/eb/printascii.S +++ b/src/platform/eb/printascii.S @@ -8,19 +8,29 @@ #define UART_DATA_OFFSET 0x0 -/* Physical base address of UART0 */ -uart0_phys_base_addr: - .word EB_UART0_BASE +/* + * FIXME: We need to divide into bytes as writing to register doesnot look + * possible directly, it gives some errors in compilation + */ +#define UART0_PHYS_BASE EB_UART0_BASE +#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000) +#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000) +#define UART0_PHYS_BYTE3_4 (UART0_PHYS_BASE & 0x0000FFFF) -/* Virtual base address of UART0 */ -uart0_virtual_base_addr: - .word EB_UART0_VBASE +#define UART0_VIRT_BASE EB_UART0_VBASE +#define UART0_VIRT_BYTE1 (UART0_VIRT_BASE & 0xFF000000) +#define UART0_VIRT_BYTE2 (UART0_VIRT_BASE & 0x00FF0000) +#define UART0_VIRT_BYTE3_4 (UART0_VIRT_BASE & 0x0000FFFF) .macro uart_address rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? - moveq \rx, #uart0_phys_base_addr - movne \rx, #uart0_virtual_base_addr + moveq \rx, #UART0_PHYS_BYTE1 + orreq \rx, #UART0_PHYS_BYTE2 + orreq \rx, #UART0_PHYS_BYTE3_4 + movne \rx, #UART0_VIRT_BYTE1 + orrne \rx, #UART0_VIRT_BYTE2 + orrne \rx, #UART0_VIRT_BYTE3_4 .endm .macro uart_send, ry, rx diff --git a/src/platform/pb11mpcore/printascii.S b/src/platform/pb11mpcore/printascii.S index 25e6260..32f2de4 100644 --- a/src/platform/pb11mpcore/printascii.S +++ b/src/platform/pb11mpcore/printascii.S @@ -8,19 +8,29 @@ #define UART_DATA_OFFSET 0x0 -/* Physical base address of UART0 */ -uart0_phys_base_addr: - .word PB11MPCORE_UART0_BASE +/* + * FIXME: We need to divide into bytes as writing to register doesnot look + * possible directly, it gives some errors in compilation + */ +#define UART0_PHYS_BASE PB11MPCORE_UART0_BASE +#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000) +#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000) +#define UART0_PHYS_BYTE3_4 (UART0_PHYS_BASE & 0x0000FFFF) -/* Virtual base address of UART0 */ -uart0_virtual_base_addr: - .word PB11MPCORE_UART0_VBASE +#define UART0_VIRT_BASE PB11MPCORE_UART0_VBASE +#define UART0_VIRT_BYTE1 (UART0_VIRT_BASE & 0xFF000000) +#define UART0_VIRT_BYTE2 (UART0_VIRT_BASE & 0x00FF0000) +#define UART0_VIRT_BYTE3_4 (UART0_VIRT_BASE & 0x0000FFFF) .macro uart_address rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? - moveq \rx, #uart0_phys_base_addr - movne \rx, #uart0_virtual_base_addr + moveq \rx, #UART0_PHYS_BYTE1 + orreq \rx, #UART0_PHYS_BYTE2 + orreq \rx, #UART0_PHYS_BYTE3_4 + movne \rx, #UART0_VIRT_BYTE1 + orrne \rx, #UART0_VIRT_BYTE2 + orrne \rx, #UART0_VIRT_BYTE3_4 .endm .macro uart_send, ry, rx diff --git a/src/platform/pb926/printascii.S b/src/platform/pb926/printascii.S index f940749..124f3ac 100644 --- a/src/platform/pb926/printascii.S +++ b/src/platform/pb926/printascii.S @@ -8,19 +8,29 @@ #define UART_DATA_OFFSET 0x0 -/* Physical base address of UART0 */ -uart0_phys_base_addr: - .word PB926_UART0_BASE +/* + * FIXME: We need to divide into bytes as writing to register doesnot look + * possible directly, it gives some errors in compilation + */ +#define UART0_PHYS_BASE PB926_UART0_BASE +#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000) +#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000) +#define UART0_PHYS_BYTE3_4 (UART0_PHYS_BASE & 0x0000FFFF) -/* Virtual base address of UART0 */ -uart0_virtual_base_addr: - .word PB926_UART0_VBASE +#define UART0_VIRT_BASE PB926_UART0_VBASE +#define UART0_VIRT_BYTE1 (UART0_VIRT_BASE & 0xFF000000) +#define UART0_VIRT_BYTE2 (UART0_VIRT_BASE & 0x00FF0000) +#define UART0_VIRT_BYTE3_4 (UART0_VIRT_BASE & 0x0000FFFF) .macro uart_address rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? - moveq \rx, #uart0_phys_base_addr - movne \rx, #uart0_virtual_base_addr + moveq \rx, #UART0_PHYS_BYTE1 + orreq \rx, #UART0_PHYS_BYTE2 + orreq \rx, #UART0_PHYS_BYTE3_4 + movne \rx, #UART0_VIRT_BYTE1 + orrne \rx, #UART0_VIRT_BYTE2 + orrne \rx, #UART0_VIRT_BYTE3_4 .endm .macro uart_send, ry, rx diff --git a/src/platform/pba8/printascii.S b/src/platform/pba8/printascii.S index 2d88e10..50d1ca0 100644 --- a/src/platform/pba8/printascii.S +++ b/src/platform/pba8/printascii.S @@ -8,19 +8,29 @@ #define UART_DATA_OFFSET 0x0 -/* Physical base address of UART0 */ -uart0_phys_base_addr: - .word PBA8_UART0_BASE +/* + * FIXME: We need to divide into bytes as writing to register doesnot look + * possible directly, it gives some errors in compilation + */ +#define UART0_PHYS_BASE PBA8_UART0_BASE +#define UART0_PHYS_BYTE1 (UART0_PHYS_BASE & 0xFF000000) +#define UART0_PHYS_BYTE2 (UART0_PHYS_BASE & 0x00FF0000) +#define UART0_PHYS_BYTE3_4 (UART0_PHYS_BASE & 0x0000FFFF) -/* Virtual base address of UART0 */ -uart0_virtual_base_addr: - .word PBA8_UART0_VBASE +#define UART0_VIRT_BASE PBA8_UART0_VBASE +#define UART0_VIRT_BYTE1 (UART0_VIRT_BASE & 0xFF000000) +#define UART0_VIRT_BYTE2 (UART0_VIRT_BASE & 0x00FF0000) +#define UART0_VIRT_BYTE3_4 (UART0_VIRT_BASE & 0x0000FFFF) .macro uart_address rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? - moveq \rx, #uart0_phys_base_addr - movne \rx, #uart0_virtual_base_addr + moveq \rx, #UART0_PHYS_BYTE1 + orreq \rx, #UART0_PHYS_BYTE2 + orreq \rx, #UART0_PHYS_BYTE3_4 + movne \rx, #UART0_VIRT_BYTE1 + orrne \rx, #UART0_VIRT_BYTE2 + orrne \rx, #UART0_VIRT_BYTE3_4 .endm .macro uart_send, ry, rx