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81 lines
1.5 KiB
Groff
Executable File
81 lines
1.5 KiB
Groff
Executable File
.TH L4_CACHE_CONTROL 7 2009-11-07 "Codezero" "Codezero Programmer's Manual"
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.SH NAME
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.nf
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.BR "l4_cache_control" " - Cache/TLB manipulation"
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.SH SYNOPSIS
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.nf
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.B #include <l4lib/arch/syscalls.h>
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.B #include <l4lib/arch/syslib.h>
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.BI "int l4_cache_control (unsigned int " "start" ", unsigned int " "end" ", unsigned int " "flags");
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.SH DESCRIPTION
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.B l4_cache_control()
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enables a thread to invalidate and clean the cache memory.
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.TP
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.fi
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.I start
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denotes the start address(virtual memory address) of memory region to be invalidated/cleaned. This is not used in case of armv5.
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.TP
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.fi
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.I end
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denotes the end address(virtual memory address) of memory region to be invalidated/cleaned. This is not used in case of armv5.
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.TP
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.fi
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.I flags
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denotes the operation to be performed.
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.TP
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.BR L4_INVALIDATE_CACHE
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Invalidate/flush both I and D caches.
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.TP
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.BR L4_INVALIDATE_ICACHE
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Invalidate/flush I cache.
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.TP
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.BR L4_INVALIDATE_DCACHE
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Invalidate/flush D cache.
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.TP
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.BR L4_CLEAN_DCACHE
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Clean D cache.
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.TP
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.BR L4_CLEAN_INVALIDATE_DCACHE
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Clean and Invalidate D cache.
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.TP
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.BR L4_CLEAN_INVALIDATE_CACHE
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Invalidate/flush both I and D cache and Clean D cache.
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.TP
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.BR L4_DRAIN_WRITEBUFFER
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Drain Write Buffer.
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.TP
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.BR L4_INVALIDATE_TLB
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Invalidate/flush TLB.
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.TP
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.BR L4_INVALIDATE_ITLB
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Invalidate/flush I TLB.
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.TP
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.BR L4_INVALIDATE_DTLB
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Invalidate/flush D TLB.
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.SH RETURN VALUE
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.IR "l4_cache_control"()
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Returns 0 on success, and negative value on failure. See below for error codes.
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.SH ERRORS
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.TP
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.B -EINVAL
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when a
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.IR "flag"
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is passed with invalid fields.
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