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403a038845
Mutex system call fixed for multiple contenders Userspace irq support extended to keyboard/mouse. Scheduler modified for real-time irq tasks
96 lines
2.3 KiB
C
96 lines
2.3 KiB
C
/*
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* Generic Interrupt Controller offsets
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*
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* Copyright (C) 2009 B Labs Ltd.
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*
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*/
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#ifndef __ARM_GIC_H__
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#define __ARM_GIC_H__
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#include <l4/types.h>
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#include INC_PLAT(platform.h)
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#include INC_PLAT(offsets.h)
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/* CPU registers */
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struct gic_cpu
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{
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u32 control; /* Control Register */
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u32 prio_mask; /* Priority Mask */
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u32 bin_point; /* Binary Point Register */
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u32 ack; /* Interrupt */
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u32 eoi; /* End of Interrupt */
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u32 running; /* Running Priority register */
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u32 high_pending; /* Highest Pending Register */
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};
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#define NIRQ 1024
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#define NREGS_1_BIT_PER_INT 32 /* when 1 bit per interrupt */
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#define NREGS_4_BIT_PER_INT 256
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#define NREGS_4_BIT_PER_INT 256
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#define NREGS_2_BIT_PER_INT 64
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#define NID 4
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/* Distributor registers */
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/* -r- -- reserved */
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struct gic_dist{
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u32 control; /* Control Register */
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u32 const type; /* Type Register */
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u32 dummy1[62]; /* -r- */
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u32 set_en[NREGS_1_BIT_PER_INT]; /* Enable Set */
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u32 clr_en[NREGS_1_BIT_PER_INT]; /* Enable Clear */
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u32 set_pending[NREGS_1_BIT_PER_INT]; /* Set Pending */
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u32 clr_pending[NREGS_1_BIT_PER_INT]; /* Clear Pending */
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u32 active[NREGS_1_BIT_PER_INT]; /* Active Bit registers */
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u32 dummy2[32]; /* -r- */
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u32 priority[NREGS_4_BIT_PER_INT]; /* Interrupt Priority */
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u32 target[NREGS_4_BIT_PER_INT]; /* CPU Target Registers */
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u32 config[NREGS_2_BIT_PER_INT]; /* Interrupt Config */
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u32 level[NREGS_2_BIT_PER_INT]; /* Interrupt Line Level */
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u32 dummy3[64]; /* -r- */
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u32 soft_int; /* Software Interrupts */
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u32 dummy4[55]; /* -r- */
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u32 id[NID]; /* Primecell ID registers */
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};
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struct gic_data {
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struct gic_cpu *cpu;
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struct gic_dist *dist;
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};
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l4id_t gic_read_irq(void *data);
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void gic_mask_irq(l4id_t irq);
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void gic_unmask_irq(l4id_t irq);
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void gic_ack_irq(l4id_t irq);
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void gic_ack_and_mask(l4id_t irq);
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void gic_clear_pending(l4id_t irq);
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void gic_cpu_init(int idx, unsigned long base);
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void gic_dist_init(int idx, unsigned long base);
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void gic_send_ipi(int cpu, int ipi_cmd);
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void gic_set_target(u32 irq, u32 cpu);
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u32 gic_get_target(u32 irq);
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void gic_set_priority(u32 irq, u32 prio);
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u32 gic_get_priority(u32 irq);
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void gic_dummy_init(void);
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void gic_eoi_irq(l4id_t irq);
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void gic_print_cpu(void);
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#endif /* __GIC_H__ */
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