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- Now libl4 has no references to utcb page or shmat etc. - Pager does not deal with special case utcb page allocation. It instead allocates a shared page from shm memory pool. - All tasks working to original standard. Next: - Add per-thread utcb allocation from the kernel - Add larger register file for standard ipc - Add long ipc (up to 1Kb)
53 lines
1.1 KiB
C
53 lines
1.1 KiB
C
#ifndef __ARM_UTCB_H__
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#define __ARM_UTCB_H__
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#define USER_UTCB_REF 0xFF000FF0
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#define L4_KIP_ADDRESS 0xFF000000
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#define UTCB_KIP_OFFSET 0xFF0
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#ifndef __ASSEMBLY__
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#include <l4lib/types.h>
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#include <l4/macros.h>
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#include INC_GLUE(message.h)
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#include INC_GLUE(memory.h)
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#include <string.h>
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#include <stdio.h>
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/*
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* NOTE: In syslib.h the first few mrs are used by data frequently
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* needed for all ipcs. Those mrs are defined the kernel message.h
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*/
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/*
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* This is a per-task private structure where message registers are
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* pushed for ipc. Its *not* TLS, but can be part of TLS when it is
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* supported.
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*/
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struct utcb {
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u32 mr[MR_TOTAL];
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u32 saved_tag;
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u32 saved_sender;
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} __attribute__((__packed__));
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extern struct utcb utcb;
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static inline struct utcb *l4_get_utcb()
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{
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return &utcb;
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}
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/* Functions to read/write utcb registers */
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static inline unsigned int read_mr(int offset)
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{
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return l4_get_utcb()->mr[offset];
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}
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static inline void write_mr(unsigned int offset, unsigned int val)
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{
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l4_get_utcb()->mr[offset] = val;
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}
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#endif /* !__ASSEMBLY__ */
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#endif /* __ARM_UTCB_H__ */
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