mirror of
https://github.com/drasko/codezero.git
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196 lines
5.8 KiB
C
196 lines
5.8 KiB
C
/*
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* OMAP UART Generic driver implementation.
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*
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* Copyright (C) 2007 Bahadir Balban
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*
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* The particular intention of this code is that it has been carefully written
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* as decoupled from os-specific code and in a verbose way such that it clearly
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* demonstrates how the device operates, reducing the amount of time to be spent
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* for understanding the operational model and implementing a driver from
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* scratch. This is the very first to be such a driver so far, hopefully it will
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* turn out to be useful.
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*/
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#ifndef __OMAP_UART_H__
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#define __OMAP_UART_H__
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#include <l4/config.h> /* To get PLATFORM */
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#include <l4lib/types.h>
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#if defined(VARIANT_USERSPACE)
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/* FIXME: Take this value in agreement from kernel, or from kernel only */
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#include <l4/macros.h>
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#include INC_ARCH(io.h)
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#define OMAP_UART_BASE USERSPACE_CONSOLE_VBASE
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#endif
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#if defined(VARIANT_BAREMETAL)
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#if defined(CONFIG_PLATFORM_BEAGLE)
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#define OMAP_UART_BASE 0x49020000
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#endif
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#endif
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/* Register offsets */
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#define OMAP_UART_DLL 0x00
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#define OMAP_UART_THR 0x00
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#define OMAP_UART_RHR 0x00
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#define OMAP_UART_DLH 0x04
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#define OMAP_UART_IER 0x04
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#define OMAP_UART_FCR 0x08
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#define OMAP_UART_MCR 0x10
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#define OMAP_UART_LSR 0x14
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#define OMAP_UART_MDR1 0x20
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#define OMAP_UART_LCR 0x0C
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/* Modes supported by OMAP UART/IRDA/CIR IP */
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#define OMAP_UART_MODE_UART16X 0x0
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#define OMAP_UART_MODE_SIR 0x1
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#define OMAP_UART_MODE_UART16X_AUTO_BAUD 0x2
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#define OMAP_UART_MODE_UART13X 0x3
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#define OMAP_UART_MODE_MIR 0x4
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#define OMAP_UART_MODE_FIR 0x5
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#define OMAP_UART_MODE_CIR 0x6
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#define OMAP_UART_MODE_DEFAULT 0x7 /* Disable */
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/* Number of data bits for UART */
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#define OMAP_UART_DATA_BITS_5 0x0
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#define OMAP_UART_DATA_BITS_6 0x1
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#define OMAP_UART_DATA_BITS_7 0x2
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#define OMAP_UART_DATA_BITS_8 0x3
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/* Stop bits to be used for UART data */
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#define OMAP_UART_STOP_BITS_1 0x0
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#define OMAP_UART_STOP_BITS_1_5 0x1
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/* Banked Register modes- ConfigA, ConfigB, Operational */
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#define OMAP_UART_BANKED_MODE_OPERATIONAL 0x00
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#define OMAP_UART_BANKED_MODE_CONFIG_A 0x80
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#define OMAP_UART_BANKED_MODE_CONFIG_B 0xBF
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void uart_tx_char(unsigned long uart_base, char c);
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char uart_rx_char(unsigned long uart_base);
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void uart_set_baudrate(unsigned long uart_base, u32 baudrate);
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void uart_init(unsigned long uart_base);
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#define OMAP_UART_FIFO_ENABLE (1 << 0)
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#define OMAP_UART_RX_FIFO_CLR (1 << 1)
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#define OMAP_UART_TX_FIFO_CLR (1 << 2)
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static inline void uart_enable_fifo(unsigned long uart_base)
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{
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volatile u32 reg = read(uart_base + OMAP_UART_FCR);
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reg |= (OMAP_UART_FIFO_ENABLE | OMAP_UART_RX_FIFO_CLR |
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OMAP_UART_TX_FIFO_CLR);
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write(reg, uart_base + OMAP_UART_FCR);
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}
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static inline void uart_disable_fifo(unsigned long uart_base)
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{
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volatile u32 reg= read(uart_base + OMAP_UART_FCR);
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reg &= (~OMAP_UART_FIFO_ENABLE | OMAP_UART_RX_FIFO_CLR |
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OMAP_UART_TX_FIFO_CLR);
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write(reg, uart_base + OMAP_UART_FCR);
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}
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#define OMAP_UART_TX_ENABLE (1 << 0)
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static inline void uart_enable_tx(unsigned long uart_base)
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{
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volatile u32 reg = read(uart_base + OMAP_UART_MCR);
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reg |= OMAP_UART_TX_ENABLE;
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write(reg, uart_base + OMAP_UART_MCR);
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}
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static inline void uart_disable_tx(unsigned long uart_base)
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{
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volatile u32 reg = read(uart_base + OMAP_UART_MCR);
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reg &= ~OMAP_UART_TX_ENABLE;
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write(reg, uart_base + OMAP_UART_MCR);
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}
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#define OMAP_UART_RX_ENABLE (1 << 1)
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static inline void uart_enable_rx(unsigned long uart_base)
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{
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volatile u32 reg = read(uart_base + OMAP_UART_MCR);
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reg |= OMAP_UART_RX_ENABLE;
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write(reg, uart_base + OMAP_UART_MCR);
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}
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static inline void uart_disable_rx(unsigned long uart_base)
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{
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volatile u32 reg = read(uart_base + OMAP_UART_MCR);
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reg &= ~OMAP_UART_RX_ENABLE;
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write(reg, uart_base + OMAP_UART_MCR);
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}
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#define OMAP_UART_STOP_BITS_MASK (1 << 2)
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static inline void uart_set_stop_bits(unsigned long uart_base, int bits)
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{
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volatile u32 reg = read(uart_base + OMAP_UART_LCR);
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reg &= ~OMAP_UART_STOP_BITS_MASK;
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reg |= (bits << 2);
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write(reg, uart_base + OMAP_UART_LCR);
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}
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#define OMAP_UART_DATA_BITS_MASK (0x3)
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static inline void uart_set_data_bits(unsigned long uart_base, int bits)
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{
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volatile u32 reg = read(uart_base + OMAP_UART_LCR);
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reg &= ~OMAP_UART_DATA_BITS_MASK;
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reg |= bits;
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write(reg, uart_base + OMAP_UART_LCR);
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}
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#define OMAP_UART_PARITY_ENABLE (1 << 3)
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static inline void uart_enable_parity(unsigned long uart_base)
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{
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volatile u32 reg = read(uart_base + OMAP_UART_LCR);
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reg |= OMAP_UART_PARITY_ENABLE;
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write(reg, uart_base + OMAP_UART_LCR);
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}
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static inline void uart_disable_parity(unsigned long uart_base)
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{
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volatile u32 reg = read(uart_base + OMAP_UART_LCR);
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reg &= ~OMAP_UART_PARITY_ENABLE;
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write(reg, uart_base + OMAP_UART_LCR);
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}
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#define OMAP_UART_PARITY_EVEN (1 << 4)
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static inline void uart_set_even_parity(unsigned long uart_base)
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{
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volatile u32 reg = read(uart_base + OMAP_UART_LCR);
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reg |= OMAP_UART_PARITY_EVEN;
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write(reg, uart_base + OMAP_UART_LCR);
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}
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static inline void uart_set_odd_parity(unsigned long uart_base)
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{
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volatile u32 reg = read(uart_base + OMAP_UART_LCR);
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reg &= ~OMAP_UART_PARITY_EVEN;
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write(reg, uart_base + OMAP_UART_LCR);
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}
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static inline void uart_select_mode(unsigned long uart_base, int mode)
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{
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write(mode, uart_base + OMAP_UART_MDR1);
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}
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#define OMAP_UART_INTR_EN 1
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static inline void uart_enable_interrupt(unsigned long uart_base)
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{
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write(OMAP_UART_INTR_EN, uart_base + OMAP_UART_IER);
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}
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static inline void uart_disable_interrupt(unsigned long uart_base)
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{
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write((~OMAP_UART_INTR_EN), uart_base + OMAP_UART_IER);
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}
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static inline void uart_set_link_control(unsigned long uart_base, int mode)
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{
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write(mode, uart_base + OMAP_UART_LCR);
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}
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#endif /* __OMAP_UART_H__ */
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