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67 lines
2.6 KiB
C
67 lines
2.6 KiB
C
/*
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*
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* Describes physical memory layout of Beagle Boards.
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* We have rev3 boards.
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*
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* Copyright (C) 2007 Bahadir Balban
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*/
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#ifndef __PLATFORM_BEAGLE_OFFSETS_H__
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#define __PLATFORM_BEAGLE_OFFSETS_H__
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/*
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* Physical memory base
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* FIXME: Somewhere its written: Rev 1 and 2
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* of Beagleboard has 128MB SDRAM while Rev 3 has 256MB
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* SDRAM which is detected automatically on intiliazation,
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* we have Rev3 boards, so hardcoding this only.
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*/
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#define PLATFORM_PHYS_MEM_START 0x80000000 /* inclusive */
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#define PLATFORM_PHYS_MEM_END 0x90000000 /* 256MB, exclusive */
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/*
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* Device offsets in physical memory
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* Naming of devices done starting with 0 subscript,
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* as we use these names for device capability
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*/
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#define PLATFORM_WKUP_CM_BASE 0x48004C00 /* Wake up clock manager */
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#define PLATFORM_PERCM_BASE 0x48005000 /* Peripheral Clock Manager */
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#define PLATFORM_UART0_BASE 0x4806A000 /* UART 0 */
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#define PLATFORM_UART1_BASE 0x4806C000 /* UART 1 */
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#define PLATFORM_UART2_BASE 0x49020000 /* UART 2 */
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#define PLATFORM_TIMER0_BASE 0x48318000 /* GPTIMER1 */
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#define PLATFORM_TIMER1_BASE 0x49032000 /* GPTIMER2 */
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#define PLATFORM_TIMER2_BASE 0x49034000 /* GPTIMER3 */
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#define PLATFORM_TIMER3_BASE 0x49036000 /* GPTIMER4 */
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#define PLATFORM_TIMER4_BASE 0x49038000 /* GPTIMER5 */
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#define PLATFORM_TIMER5_BASE 0x4903A000 /* GPTIMER6 */
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#define PLATFORM_TIMER6_BASE 0x4903C000 /* GPTIMER7 */
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#define PLATFORM_TIMER7_BASE 0x4903E000 /* GPTIMER8 */
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#define PLATFORM_TIMER8_BASE 0x49040000 /* GPTIMER9 */
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#define PLATFORM_TIMER9_BASE 0x48086000 /* GPTIMER10 */
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#define PLATFORM_TIMER10_BASE 0x48088000 /* GPTIMER11 */
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#define PLATFORM_TIMER11_BASE 0x48304000 /* GPTIMER12 */
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#define PLATFORM_INTC_BASE 0x48200000 /* Interrupt controller */
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/*
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* Virtual Memory base address, where devices will be mapped.
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* Each Device will take one page in virtual memory.
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* Nice and smooth.
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*/
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#define DEVICE_PAGE 0x1000
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#define PLATFORM_WKUP_CM_VBASE (IO_AREA0_VADDR + (0 * DEVICE_PAGE))
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#define PLATFORM_CONSOLE_VBASE (IO_AREA0_VADDR + (1 * DEVICE_PAGE))
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#define PLATFORM_TIMER0_VBASE (IO_AREA0_VADDR + (2 * DEVICE_PAGE))
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#define PLATFORM_INTC_VBASE (IO_AREA0_VADDR + (3 * DEVICE_PAGE))
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#define PLATFORM_PERCM_VBASE (IO_AREA0_VADDR + (4 * DEVICE_PAGE))
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/* Add userspace devices here as they become necessary for irqs */
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#define PLATFORM_TIMER1_VBASE (IO_AREA0_VADDR + (5 * DEVICE_PAGE))
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/* Add size of various user space devices, to be used in capability generation */
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#define PLATFORM_TIMER1_SIZE DEVICE_PAGE
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#endif /* __PLATFORM_BEAGLE_OFFSETS_H__ */
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