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36 lines
1.1 KiB
C
36 lines
1.1 KiB
C
/*
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* Describes physical memory layout of pb926 platform.
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*
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* This only include physical and memory offsets that
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* are not included in realview/offsets.h
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*
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* Copyright (C) 2010 B Labs Ltd.
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* Author: Bahadir Balban <bbalban@b-labs.co.uk>
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*/
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#ifndef __PLATFORM_PBA9_OFFSETS_H__
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#define __PLATFORM_PBA9_OFFSETS_H__
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#include <l4/platform/realview/offsets.h>
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/*
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* Device offsets in physical memory
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* Naming of devices done starting with 0 subscript,
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* as we use these names for device capability
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*/
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#define PLATFORM_TIMER2_BASE 0x10018000 /* Timers 2 and 3 */
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#define PLATFORM_TIMER3_BASE 0x10019000 /* Timers 2 and 3 */
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#define PLATFORM_SYSCTRL1_BASE 0x1001A000 /* System controller1 */
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#define PLATFORM_GIC0_BASE 0x1E000000 /* GIC 0 */
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#define MPCORE_PRIVATE_BASE 0x1E000000
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#define MPCORE_PRIVATE_VBASE (IO_AREA0_VADDR + (13 * DEVICE_PAGE))
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#define SCU_BASE MPCORE_PRIVATE_BASE
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#define SCU_VBASE MPCORE_PRIVATE_VBASE
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#define GIC0_CPU_VBASE (MPCORE_PRIVATE_VBASE + 0x100)
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#define GIC0_DIST_VBASE (MPCORE_PRIVATE_VBASE + 0x1000)
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#endif /* __PLATFORM_PBA9_OFFSETS_H__ */
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