18 Commits

Author SHA1 Message Date
Jorge Aparicio
9c37db3d3b v0.1.8 2017-05-30 19:41:27 -05:00
Jorge Aparicio
797e750a32 Merge pull request #11 from japaric/stext
bump cortex-m-rt version to v0.2.3; document the _stext symbol
2017-05-30 19:40:01 -05:00
Jorge Aparicio
ea13292cc4 bump cortex-m-rt version to v0.2.3; document the _stext symbol 2017-05-30 19:36:10 -05:00
Jorge Aparicio
207591ef4c Merge pull request #10 from japaric/swo
.gdbinit: add a commented out option to make the SWO pin functional when ...
2017-05-28 22:55:54 -05:00
Jorge Aparicio
0b22a8aabb .gdbinit: add a commented out option to make the SWO pin functional when ...
it's not connected to a programmer / debugger SWO pin
2017-05-28 22:53:53 -05:00
Jorge Aparicio
adda589c71 Merge pull request #9 from japaric/no-reset
gdbinit: don't reset the microcontroller
2017-05-28 21:11:49 -05:00
Jorge Aparicio
d4c6bde00f gdbinit: don't reset the microcontroller
simply `step` after the `load` command. This should just work now that we are
using cortex-m-rt v0.2.2
2017-05-28 21:09:38 -05:00
Jorge Aparicio
96e0b4e96b v0.1.7 2017-05-27 11:14:16 -05:00
Jorge Aparicio
f5fca936c6 Merge pull request #8 from japaric/heap
document how to use the heap and a dynamic allocator
2017-05-27 11:11:44 -05:00
Jorge Aparicio
f1329524c8 document how to use the heap and a dynamic allocator 2017-05-27 11:00:03 -05:00
Jorge Aparicio
2bb6e419af v0.1.6 2017-05-26 15:19:24 -05:00
Jorge Aparicio
0154a9efc7 Merge pull request #7 from japaric/runner
set default runner to arm-none-eabi-gdb
2017-05-26 15:17:04 -05:00
Jorge Aparicio
c6fafaedc2 set default runner to arm-none-eabi-gdb
with this `xargo run` will build the program *and* immediately start a GDB
session.
2017-05-26 15:12:21 -05:00
Jorge Aparicio
82e36ffe13 v0.1.5 2017-05-16 10:25:30 -05:00
Jorge Aparicio
d035016e65 Merge pull request #6 from japaric/incr-comp
warn against using CARGO_INCREMENTAL
2017-05-15 22:01:09 -05:00
Jorge Aparicio
362c715b19 warn against using CARGO_INCREMENTAL 2017-05-15 22:00:36 -05:00
Jorge Aparicio
8aa495ac66 v0.1.4 2017-05-13 15:18:50 -05:00
Jorge Aparicio
62453e1e94 add dependencies section to documentation
add 'used stable toolchain' sub-section to the troubleshooting section
2017-05-13 15:17:14 -05:00
11 changed files with 294 additions and 17 deletions

View File

@@ -1,4 +1,5 @@
[target.thumbv6m-none-eabi] [target.thumbv6m-none-eabi]
runner = 'arm-none-eabi-gdb'
rustflags = [ rustflags = [
"-C", "link-arg=-Tlink.x", "-C", "link-arg=-Tlink.x",
"-C", "linker=arm-none-eabi-ld", "-C", "linker=arm-none-eabi-ld",
@@ -6,6 +7,7 @@ rustflags = [
] ]
[target.thumbv7m-none-eabi] [target.thumbv7m-none-eabi]
runner = 'arm-none-eabi-gdb'
rustflags = [ rustflags = [
"-C", "link-arg=-Tlink.x", "-C", "link-arg=-Tlink.x",
"-C", "linker=arm-none-eabi-ld", "-C", "linker=arm-none-eabi-ld",
@@ -13,6 +15,7 @@ rustflags = [
] ]
[target.thumbv7em-none-eabi] [target.thumbv7em-none-eabi]
runner = 'arm-none-eabi-gdb'
rustflags = [ rustflags = [
"-C", "link-arg=-Tlink.x", "-C", "link-arg=-Tlink.x",
"-C", "linker=arm-none-eabi-ld", "-C", "linker=arm-none-eabi-ld",
@@ -20,6 +23,7 @@ rustflags = [
] ]
[target.thumbv7em-none-eabihf] [target.thumbv7em-none-eabihf]
runner = 'arm-none-eabi-gdb'
rustflags = [ rustflags = [
"-C", "link-arg=-Tlink.x", "-C", "link-arg=-Tlink.x",
"-C", "linker=arm-none-eabi-ld", "-C", "linker=arm-none-eabi-ld",

View File

@@ -1,9 +1,18 @@
target remote :3333 target remote :3333
monitor arm semihosting enable monitor arm semihosting enable
# if using ITM
# # send captured ITM to the file itm.fifo
# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
# # 8000000 must match the core clock frequency
# monitor tpiu config internal itm.fifo uart off 8000000 # monitor tpiu config internal itm.fifo uart off 8000000
# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
# # 2000000 is the frequency of the SWO pin
# monitor tpiu config external uart off 8000000 2000000
# # enable ITM port 0
# monitor itm port 0 on # monitor itm port 0 on
load load
tbreak cortex_m_rt::reset_handler step
monitor reset halt
continue

View File

@@ -5,7 +5,50 @@ This project adheres to [Semantic Versioning](http://semver.org/).
## [Unreleased] ## [Unreleased]
## v0.1.3 - 2017-05-12 ## [v0.1.8] - 2017-05-30
### Changed
- Bumped the cortex-m-rt dependency to v0.2.3, and documented the `_stext`
symbol (see memory.x).
## [v0.1.7] - 2017-05-27
### Added
- Documentation and an example about how to use the heap and a dynamic memory
allocator.
### Changed
- Bumped the `cortex-m-rt` dependency to v0.2.2
- Bumped the `cortex-m` dependency to v0.2.7
## [v0.1.6] - 2017-05-26
### Added
- Set the default runner in .cargo/config to `arm-none-eabi-gdb`. Now `xargo
run` will build the program and start a debug session.
## [v0.1.5] - 2017-05-16
### Added
- A warning about using CARGO_INCREMENTAL to the how to use and the
troubleshooting sections.
## [v0.1.4] - 2017-05-13
### Added
- A dependencies section to the documentation
### Changed
- Extend troubleshooting section
## [v0.1.3] - 2017-05-13
### Added ### Added
@@ -15,13 +58,13 @@ This project adheres to [Semantic Versioning](http://semver.org/).
- Bumped the cortex-m crate version to v0.2.6 - Bumped the cortex-m crate version to v0.2.6
## v0.1.2 - 2017-05-07 ## [v0.1.2] - 2017-05-07
### Fixed ### Fixed
- .gdbinit: jump to reset handler after loading the program. - .gdbinit: jump to reset handler after loading the program.
## v0.1.1 - 2017-04-27 ## [v0.1.1] - 2017-04-27
### Changed ### Changed
@@ -33,7 +76,12 @@ This project adheres to [Semantic Versioning](http://semver.org/).
- Initial release - Initial release
[Unreleased]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.3...HEAD [Unreleased]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.8...HEAD
[v0.1.8]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.7...v0.1.8
[v0.1.7]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.6...v0.1.7
[v0.1.6]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.5...v0.1.6
[v0.1.5]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.4...v0.1.5
[v0.1.4]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.3...v0.1.4
[v0.1.3]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.2...v0.1.3 [v0.1.3]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.2...v0.1.3
[v0.1.2]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.1...v0.1.2 [v0.1.2]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.1...v0.1.2
[v0.1.1]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.0...v0.1.1 [v0.1.1]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.0...v0.1.1

View File

@@ -6,11 +6,11 @@ keywords = ["arm", "cortex-m", "template"]
license = "MIT OR Apache-2.0" license = "MIT OR Apache-2.0"
name = "cortex-m-quickstart" name = "cortex-m-quickstart"
repository = "https://github.com/japaric/cortex-m-quickstart" repository = "https://github.com/japaric/cortex-m-quickstart"
version = "0.1.3" version = "0.1.8"
[dependencies] [dependencies]
cortex-m = "0.2.6" cortex-m = "0.2.7"
cortex-m-rt = "0.2.0" cortex-m-rt = "0.2.3"
[profile.release] [profile.release]
lto = true lto = true

71
examples/allocator.rs Normal file
View File

@@ -0,0 +1,71 @@
//! How to use the heap and a dynamic memory allocator
//!
//! To compile this example you'll need to build the collections crate as part
//! of the Xargo sysroot. To do that change the Xargo.toml file to look like
//! this:
//!
//! ``` text
//! [dependencies.core]
//! [dependencies.collections] # new
//!
//! [dependencies.compiler_builtins]
//! features = ["mem"]
//! git = "https://github.com/rust-lang-nursery/compiler-builtins"
//! stage = 1
//! ```
//!
//! This example depends on the alloc-cortex-m crate so you'll have to add it
//! to your Cargo.toml:
//!
//! ``` text
//! # or edit the Cargo.toml file manually
//! $ cargo add alloc-cortex-m
//! ```
#![feature(collections)]
#![feature(used)]
#![no_std]
// This is the allocator crate; you can use a different one
extern crate alloc_cortex_m;
#[macro_use]
extern crate collections;
#[macro_use]
extern crate cortex_m;
extern crate cortex_m_rt;
use cortex_m::asm;
fn main() {
// Initialize the allocator
unsafe {
extern "C" {
// Start of the heap
static mut _sheap: usize;
}
// Size of the heap in words (1 word = 4 bytes)
// WARNING: The bigger the heap the greater the chance to run into a
// stack overflow (collision between the stack and the heap)
const SIZE: isize = 256;
// End of the heap
let _eheap = (&mut _sheap as *mut _).offset(SIZE);
alloc_cortex_m::init(&mut _sheap as *mut _, _eheap);
}
// Growable array allocated on the heap
let xs = vec![0, 1, 2];
hprintln!("{:?}", xs);
}
// As we are not using interrupts, we just register a dummy catch all handler
#[allow(dead_code)]
#[used]
#[link_section = ".rodata.interrupts"]
static INTERRUPTS: [extern "C" fn(); 240] = [default_handler; 240];
extern "C" fn default_handler() {
asm::bkpt();
}

View File

@@ -11,6 +11,7 @@ main() {
crash crash
register-interrupt-handler register-interrupt-handler
override-exception-handler override-exception-handler
allocator
) )
rm -rf src/examples rm -rf src/examples

View File

@@ -10,3 +10,10 @@ MEMORY
/* The stack is of the full descending type. */ /* The stack is of the full descending type. */
/* NOTE Do NOT modify `_stack_start` unless you know what you are doing */ /* NOTE Do NOT modify `_stack_start` unless you know what you are doing */
_stack_start = ORIGIN(RAM) + LENGTH(RAM); _stack_start = ORIGIN(RAM) + LENGTH(RAM);
/* You can use this symbol to customize the location of the .text section */
/* If omitted the .text section will be placed right after the .vector_table
section */
/* This is required only on some microcontrollers that store some configuration
right after the vector table */
/* _stext = ORIGIN(FLASH) + 0x400; */

View File

@@ -27,7 +27,7 @@
//! $2 = cortex_m::exception::Exception::HardFault //! $2 = cortex_m::exception::Exception::HardFault
//! //!
//! (gdb) # Where did we come from? //! (gdb) # Where did we come from?
//! (gdb) print _e //! (gdb) backtrace
//! ``` //! ```
//! //!
//! ``` //! ```

View File

@@ -0,0 +1,75 @@
//! How to use the heap and a dynamic memory allocator
//!
//! To compile this example you'll need to build the collections crate as part
//! of the Xargo sysroot. To do that change the Xargo.toml file to look like
//! this:
//!
//! ``` text
//! [dependencies.core]
//! [dependencies.collections] # new
//!
//! [dependencies.compiler_builtins]
//! features = ["mem"]
//! git = "https://github.com/rust-lang-nursery/compiler-builtins"
//! stage = 1
//! ```
//!
//! This example depends on the alloc-cortex-m crate so you'll have to add it
//! to your Cargo.toml:
//!
//! ``` text
//! # or edit the Cargo.toml file manually
//! $ cargo add alloc-cortex-m
//! ```
//!
//! ```
//!
//! #![feature(collections)]
//! #![feature(used)]
//! #![no_std]
//!
//! // This is the allocator crate; you can use a different one
//! extern crate alloc_cortex_m;
//! #[macro_use]
//! extern crate collections;
//! #[macro_use]
//! extern crate cortex_m;
//! extern crate cortex_m_rt;
//!
//! use cortex_m::asm;
//!
//! fn main() {
//! // Initialize the allocator
//! unsafe {
//! extern "C" {
//! // Start of the heap
//! static mut _sheap: usize;
//! }
//!
//! // Size of the heap in words (1 word = 4 bytes)
//! // WARNING: The bigger the heap the greater the chance to run into a
//! // stack overflow (collision between the stack and the heap)
//! const SIZE: isize = 256;
//!
//! // End of the heap
//! let _eheap = (&mut _sheap as *mut _).offset(SIZE);
//!
//! alloc_cortex_m::init(&mut _sheap as *mut _, _eheap);
//! }
//!
//! // Growable array allocated on the heap
//! let xs = vec![0, 1, 2];
//! hprintln!("{:?}", xs);
//! }
//!
//! // As we are not using interrupts, we just register a dummy catch all handler
//! #[allow(dead_code)]
//! #[used]
//! #[link_section = ".rodata.interrupts"]
//! static INTERRUPTS: [extern "C" fn(); 240] = [default_handler; 240];
//!
//! extern "C" fn default_handler() {
//! asm::bkpt();
//! }
//! ```
// Auto-generated. Do not modify.

View File

@@ -6,3 +6,4 @@ pub mod _2_panic;
pub mod _3_crash; pub mod _3_crash;
pub mod _4_register_interrupt_handler; pub mod _4_register_interrupt_handler;
pub mod _5_override_exception_handler; pub mod _5_override_exception_handler;
pub mod _6_allocator;

View File

@@ -1,5 +1,15 @@
//! A template for building applications for ARM Cortex-M microcontrollers //! A template for building applications for ARM Cortex-M microcontrollers
//! //!
//! # Dependencies
//!
//! - Nightly Rust toolchain: `rustup default nightly`
//! - ARM linker: `sudo apt-get install binutils-arm-none-eabi`
//! - Cargo `clone` subcommand: `cargo install cargo-clone`
//! - GDB: `sudo apt-get install gdb-arm-none-eabi`
//! - OpenOCD: `sudo apt-get install OpenOCD`
//! - Xargo: `cargo install xargo`
//! - [Optional] Cargo `add` subcommand: `cargo install cargo-edit`
//!
//! # Usage //! # Usage
//! //!
//! - Clone this crate //! - Clone this crate
@@ -64,12 +74,16 @@
//! $ rm -r src/* && cp examples/hello.rs src/main.rs //! $ rm -r src/* && cp examples/hello.rs src/main.rs
//! ``` //! ```
//! //!
//! - Disable incremental compilation. It doesn't work for embedded development.
//! You'll hit nonsensical linker errors if you use it.
//!
//! ``` text
//! $ unset CARGO_INCREMENTAL
//! ```
//!
//! - Build the application //! - Build the application
//! //!
//! ``` text //! ``` text
//! # if not installed
//! $ cargo install xargo
//!
//! # NOTE this command requires `arm-none-eabi-ld` to be in $PATH //! # NOTE this command requires `arm-none-eabi-ld` to be in $PATH
//! $ xargo build --release //! $ xargo build --release
//! //!
@@ -97,16 +111,26 @@
//! //!
//! - Flash the program //! - Flash the program
//! //!
//! ``` //! ``` text
//! # Launch OpenOCD on a terminal //! # Launch OpenOCD on a terminal
//! $ openocd -f (..) //! $ openocd -f (..)
//! ``` //! ```
//! //!
//! ``` //! ``` text
//! # Start debug session //! # Start debug session
//! $ arm-none-eabi-gdb target/.. //! $ arm-none-eabi-gdb target/..
//! ``` //! ```
//! //!
//! **NOTE** As of nightly-2017-05-14 or so and cortex-m-quickstart v0.1.6 you
//! can simply run `cargo run` or `cargo run --example $example` to build the
//! program, and immediately start a debug session. IOW, it lets you omit the
//! `arm-none-eabi-gdb` command.
//!
//! ``` text
//! $ cargo run --example hello
//! > # drops you into a GDB session
//! ```
//!
//! # Examples //! # Examples
//! //!
//! Check the [examples module](./examples/index.html) //! Check the [examples module](./examples/index.html)
@@ -201,6 +225,43 @@
//! //!
//! Solution: Use `xargo build`. //! Solution: Use `xargo build`.
//! //!
//! ## Used the stable toolchain
//!
//! Error message:
//!
//! ``` text
//! $ xargo build
//! error: failed to run `rustc` to learn about target-specific information
//!
//! To learn more, run the command again with --verbose.
//! ```
//!
//! Solution: Switch to the nightly toolchain with `rustup default nightly`.
//!
//! ## Used `CARGO_INCREMENTAL=1`
//!
//! Error message:
//!
//! ``` text
//! $ xargo build
//! error: linking with `arm-none-eabi-ld` failed: exit code: 1
//! |
//! = note: "arm-none-eabi-ld" (..)
//! = note: arm-none-eabi-ld:
//! You must specify the exception handlers.
//! Create a non `pub` static variable with type
//! `cortex_m::exception::Handlers` and place it in the
//! '.rodata.exceptions' section. (cf. #[link_section]). Apply the
//! `#[used]` attribute to the variable to make it reach the linker.
//! arm-none-eabi-ld:
//! Invalid '.rodata.exceptions' section.
//! Make sure to place a static with type `cortex_m::exception::Handlers`
//! in that section (cf. #[link_section]) ONLY ONCE.
//! ```
//!
//! Solution: `$ unset CARGO_INCREMENAL`. And to be on the safe side, call
//! `cargo clean` and thrash the Xargo sysroot: `$ rm -rf ~/.xargo`
//!
//! ## Used `gdb` instead of `arm-none-eabi-gdb` //! ## Used `gdb` instead of `arm-none-eabi-gdb`
//! //!
//! Error message: //! Error message: