19 Commits

Author SHA1 Message Date
Jorge Aparicio
6f62705eaf v0.2.6 2018-04-09 00:11:59 +02:00
Jorge Aparicio
1d3d6e708c Merge pull request #26 from japaric/bye-xargo
remove all mentions of Xargo
2018-04-09 00:09:33 +02:00
Jorge Aparicio
fb3f403be5 remove all mentions of Xargo
as you can use plain Cargo to do ARM Cortex-M development
2018-04-09 00:06:24 +02:00
Jorge Aparicio
578dfc7f86 v0.2.5 2018-02-26 22:31:17 +01:00
Jorge Aparicio
23ae289bf4 fix the allocator example 2018-02-26 22:27:52 +01:00
Jorge Aparicio
5206ef79d2 examples/panic: add column information 2018-02-26 21:55:25 +01:00
Jorge Aparicio
46c97c6cee remove unused #[allow] 2018-02-26 21:49:45 +01:00
Jorge Aparicio
ba8994a2ed use stable release of alloc-cortex-m 2018-02-26 21:49:25 +01:00
Jorge Aparicio
7ebac078c0 Merge pull request #23 from kitling/update-examples
Update examples
2018-02-26 21:48:47 +01:00
Kitlith
d002e0f239 Add comments to Cargo.toml/Xargo.toml.
This should make it easier to comment/uncomment stuff for the various
examples.
2018-02-24 18:28:53 -08:00
Kitlith
9f573d73b2 Update examples to newer svd2rust api.
Similarly, the cortex-m crate API was also updated.
2018-02-24 18:26:31 -08:00
Jorge Aparicio
bf91f60d40 v0.2.4 2018-01-26 11:39:18 +01:00
Jorge Aparicio
682fe4e77c v0.2.3 2018-01-20 11:27:24 +01:00
Jorge Aparicio
d60563ff45 update the CHANGELOG 2018-01-17 14:46:18 +01:00
Jorge Aparicio
48ce24b303 document workaround for "Ignoring packet error" 2018-01-17 14:42:13 +01:00
Jorge Aparicio
3dc0cf09db disable incremental compilation and parallel codegen in dev mode 2018-01-17 14:27:57 +01:00
Jorge Aparicio
59b8b866c7 bump the cortex-m-rt dependency 2018-01-17 14:26:42 +01:00
Jorge Aparicio
1bb99c92f1 Merge pull request #20 from japaric/demangle
gdbinit: print demangled symbols by default
2017-11-25 01:12:55 +01:00
Jorge Aparicio
d41dd6a4c7 gdbinit: print demangled symbols by default
this change turns this:

``` console
(gdb) x/4 0x200003f0
0x200003f0 <_ZN3app2XS17h4b49405669958fd2E+1008>:       0x20000400      0x080004f5      0x00000000      0x00000001
```

into this:

``` console
(gdb) x/4 0x200003f0
0x200003f0 <app::XS+1008>:      0x20000400      0x080004f5      0x00000000      0x00000001
```
2017-11-25 01:12:17 +01:00
15 changed files with 222 additions and 173 deletions

View File

@@ -4,6 +4,7 @@ rustflags = [
"-C", "link-arg=-Tlink.x",
"-C", "linker=arm-none-eabi-ld",
"-Z", "linker-flavor=ld",
"-Z", "thinlto=no",
]
[target.thumbv7m-none-eabi]
@@ -12,6 +13,7 @@ rustflags = [
"-C", "link-arg=-Tlink.x",
"-C", "linker=arm-none-eabi-ld",
"-Z", "linker-flavor=ld",
"-Z", "thinlto=no",
]
[target.thumbv7em-none-eabi]
@@ -20,6 +22,7 @@ rustflags = [
"-C", "link-arg=-Tlink.x",
"-C", "linker=arm-none-eabi-ld",
"-Z", "linker-flavor=ld",
"-Z", "thinlto=no",
]
[target.thumbv7em-none-eabihf]
@@ -28,4 +31,5 @@ rustflags = [
"-C", "link-arg=-Tlink.x",
"-C", "linker=arm-none-eabi-ld",
"-Z", "linker-flavor=ld",
"-Z", "thinlto=no",
]

View File

@@ -1,5 +1,8 @@
target remote :3333
# print demangled symbols by default
set print asm-demangle on
monitor arm semihosting enable
# # send captured ITM to the file itm.fifo

View File

@@ -5,6 +5,53 @@ This project adheres to [Semantic Versioning](http://semver.org/).
## [Unreleased]
## [v0.2.6] - 2018-04-09
### Changed
- The documentation to instruct the user to use Cargo instead of Xargo
## [v0.2.5] - 2018-02-26
### Added
- Comments to Cargo.toml and Xargo.toml to make it easier to try the examples.
### Fixed
- The `allocator` example to use the `#[global_allocator]` feature.
## [v0.2.4] - 2018-01-26
### Changed
- Disable ThinLTO which causes extreme binary size bloat. See rust-lang/rust#47770 for details.
## [v0.2.3] - 2018-01-20
### Changed
- Tweaked docs. Instruction steps are now numbered.
### Removed
- The `CARGO_INCREMENTAL=1` workaround has been removed since it's now controlled via Cargo.toml and
we have the setting disabled in the template.
## [v0.2.2] - 2018-01-17
### Added
- Troubleshooting documentation: how to workaround the "Ignoring packet error, continuing..." GDB
error.
### Changed
- Disabled incremental compilation and parallel codegen on the dev profile to reduce the changes of
running into rust-lang/rust#47074.
- Bumped the version of the `cortex-m-rt` dependency to v0.3.12.
## [v0.2.1] - 2017-07-14
### Added
@@ -96,7 +143,13 @@ This project adheres to [Semantic Versioning](http://semver.org/).
- Initial release
[Unreleased]: https://github.com/japaric/cortex-m-quickstart/compare/v0.2.0...HEAD
[Unreleased]: https://github.com/japaric/cortex-m-quickstart/compare/v0.2.6...HEAD
[v0.2.6]: https://github.com/japaric/cortex-m-quickstart/compare/v0.2.5...v0.2.6
[v0.2.5]: https://github.com/japaric/cortex-m-quickstart/compare/v0.2.4...v0.2.5
[v0.2.4]: https://github.com/japaric/cortex-m-quickstart/compare/v0.2.3...v0.2.4
[v0.2.3]: https://github.com/japaric/cortex-m-quickstart/compare/v0.2.2...v0.2.3
[v0.2.2]: https://github.com/japaric/cortex-m-quickstart/compare/v0.2.1...v0.2.2
[v0.2.1]: https://github.com/japaric/cortex-m-quickstart/compare/v0.2.0...v0.2.1
[v0.2.0]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.8...v0.2.0
[v0.1.8]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.7...v0.1.8
[v0.1.7]: https://github.com/japaric/cortex-m-quickstart/compare/v0.1.6...v0.1.7

View File

@@ -6,15 +6,24 @@ keywords = ["arm", "cortex-m", "template"]
license = "MIT OR Apache-2.0"
name = "cortex-m-quickstart"
repository = "https://github.com/japaric/cortex-m-quickstart"
version = "0.2.1"
version = "0.2.6"
[dependencies]
cortex-m = "0.3.0"
cortex-m = "0.4.0"
cortex-m-semihosting = "0.2.0"
# alloc-cortex-m release doesn't use linked_list_allocator v0.5.0 yet.
# Uncomment for the allocator example.
#alloc-cortex-m = "0.3.2"
[dependencies.cortex-m-rt]
version = "0.3.15"
# Comment for the panic example.
features = ["abort-on-panic"]
version = "0.3.3"
# Uncomment for the device example.
# [dependencies.stm32f103xx]
# features = ["rt"]
# version = "0.8.0"
[profile.release]
debug = true

View File

@@ -1,6 +0,0 @@
[dependencies.core]
stage = 0
[dependencies.compiler_builtins]
features = ["mem"]
stage = 1

View File

@@ -1,20 +1,5 @@
//! How to use the heap and a dynamic memory allocator
//!
//! To compile this example you'll need to build the collections crate as part
//! of the Xargo sysroot. To do that change the Xargo.toml file to look like
//! this:
//!
//! ``` text
//! [dependencies.core]
//! stage = 0
//!
//! [dependencies.collections] # NEW
//! stage = 0
//!
//! [dependencies.compiler_builtins]
//! stage = 1
//! ```
//!
//! This example depends on the alloc-cortex-m crate so you'll have to add it
//! to your Cargo.toml:
//!
@@ -25,15 +10,15 @@
//!
//! ---
#[allow(deprecated)]
#![feature(collections)]
#![feature(alloc)]
#![feature(used)]
#![feature(global_allocator)]
#![no_std]
// This is the allocator crate; you can use a different one
extern crate alloc_cortex_m;
#[macro_use]
extern crate collections;
extern crate alloc;
extern crate cortex_m;
extern crate cortex_m_rt;
extern crate cortex_m_semihosting;
@@ -42,25 +27,21 @@ use core::fmt::Write;
use cortex_m::asm;
use cortex_m_semihosting::hio;
use alloc_cortex_m::CortexMHeap;
#[global_allocator]
static ALLOCATOR: CortexMHeap = CortexMHeap::empty();
extern "C" {
static mut _sheap: u32;
static mut _eheap: u32;
}
fn main() {
// Initialize the allocator
unsafe {
extern "C" {
// Start of the heap
static mut _sheap: usize;
}
// Size of the heap in words (1 word = 4 bytes)
// NOTE The bigger the heap the greater the chance to run into a stack
// overflow (collision between the stack and the heap)
const SIZE: isize = 256;
// End of the heap
let _eheap = (&mut _sheap as *mut _).offset(SIZE);
alloc_cortex_m::init(&mut _sheap, _eheap);
}
let start = unsafe { &mut _sheap as *mut u32 as usize };
let end = unsafe { &mut _eheap as *mut u32 as usize };
unsafe { ALLOCATOR.init(start, end - start) }
// Growable array allocated on the heap
let xs = vec![0, 1, 2];

View File

@@ -19,7 +19,7 @@
//! $ edit Cargo.toml && cat $_
//! [dependencies.stm32f103xx]
//! features = ["rt"]
//! version = "0.7.0"
//! version = "0.8.0"
//! ```
//!
//! ---
@@ -37,24 +37,29 @@ use core::cell::RefCell;
use core::fmt::Write;
use cortex_m::interrupt::{self, Mutex};
use cortex_m::peripheral::SystClkSource;
use cortex_m::peripheral::syst::SystClkSource;
use cortex_m_semihosting::hio::{self, HStdout};
use stm32f103xx::Interrupt;
static HSTDOUT: Mutex<RefCell<Option<HStdout>>> =
Mutex::new(RefCell::new(None));
static NVIC: Mutex<RefCell<Option<cortex_m::peripheral::NVIC>>> =
Mutex::new(RefCell::new(None));
fn main() {
let global_p = cortex_m::Peripherals::take().unwrap();
interrupt::free(|cs| {
let hstdout = HSTDOUT.borrow(cs);
if let Ok(fd) = hio::hstdout() {
*hstdout.borrow_mut() = Some(fd);
}
let nvic = stm32f103xx::NVIC.borrow(cs);
let mut nvic = global_p.NVIC;
nvic.enable(Interrupt::TIM2);
*NVIC.borrow(cs).borrow_mut() = Some(nvic);
let syst = stm32f103xx::SYST.borrow(cs);
let mut syst = global_p.SYST;
syst.set_clock_source(SystClkSource::Core);
syst.set_reload(8_000_000); // 1s
syst.enable_counter();
@@ -71,9 +76,9 @@ fn tick() {
writeln!(*hstdout, "Tick").ok();
}
let nvic = stm32f103xx::NVIC.borrow(cs);
if let Some(nvic) = NVIC.borrow(cs).borrow_mut().as_mut() {
nvic.set_pending(Interrupt::TIM2);
}
});
}

View File

@@ -20,14 +20,13 @@
extern crate cortex_m;
extern crate cortex_m_rt;
use cortex_m::{asm, interrupt, peripheral};
use cortex_m::{asm, Peripherals};
fn main() {
interrupt::free(|cs| {
let itm = peripheral::ITM.borrow(&cs);
let p = Peripherals::take().unwrap();
let mut itm = p.ITM;
iprintln!(&itm.stim[0], "Hello, world!");
});
iprintln!(&mut itm.stim[0], "Hello, world!");
}
// As we are not using interrupts, we just register a dummy catch all handler

View File

@@ -29,7 +29,7 @@ fn main() {
#[lang = "panic_fmt"]
#[no_mangle]
unsafe extern "C" fn rust_begin_unwind(
pub unsafe extern "C" fn rust_begin_unwind(
args: core::fmt::Arguments,
file: &'static str,
line: u32,
@@ -40,7 +40,7 @@ unsafe extern "C" fn rust_begin_unwind(
.and_then(|_| {
stdout
.write_fmt(args)
.and_then(|_| writeln!(stdout, "', {}:{}", file, line))
.and_then(|_| writeln!(stdout, "', {}:{}:{}", file, line, col))
})
.ok();
}

View File

@@ -18,3 +18,6 @@ MEMORY
/* This is required only on microcontrollers that store some configuration right
after the vector table */
/* _stext = ORIGIN(FLASH) + 0x400; */
/* Size of the heap (in bytes) */
/* _heap_size = 1024; */

View File

@@ -22,14 +22,13 @@
//! extern crate cortex_m;
//! extern crate cortex_m_rt;
//!
//! use cortex_m::{asm, interrupt, peripheral};
//! use cortex_m::{asm, Peripherals};
//!
//! fn main() {
//! interrupt::free(|cs| {
//! let itm = peripheral::ITM.borrow(&cs);
//! let p = Peripherals::take().unwrap();
//! let mut itm = p.ITM;
//!
//! iprintln!(&itm.stim[0], "Hello, world!");
//! });
//! iprintln!(&mut itm.stim[0], "Hello, world!");
//! }
//!
//! // As we are not using interrupts, we just register a dummy catch all handler

View File

@@ -31,7 +31,7 @@
//!
//! #[lang = "panic_fmt"]
//! #[no_mangle]
//! unsafe extern "C" fn rust_begin_unwind(
//! pub unsafe extern "C" fn rust_begin_unwind(
//! args: core::fmt::Arguments,
//! file: &'static str,
//! line: u32,
@@ -42,7 +42,7 @@
//! .and_then(|_| {
//! stdout
//! .write_fmt(args)
//! .and_then(|_| writeln!(stdout, "', {}:{}", file, line))
//! .and_then(|_| writeln!(stdout, "', {}:{}:{}", file, line, col))
//! })
//! .ok();
//! }

View File

@@ -19,7 +19,7 @@
//! $ edit Cargo.toml && cat $_
//! [dependencies.stm32f103xx]
//! features = ["rt"]
//! version = "0.7.0"
//! version = "0.8.0"
//! ```
//!
//! ---
@@ -39,24 +39,29 @@
//! use core::fmt::Write;
//!
//! use cortex_m::interrupt::{self, Mutex};
//! use cortex_m::peripheral::SystClkSource;
//! use cortex_m::peripheral::syst::SystClkSource;
//! use cortex_m_semihosting::hio::{self, HStdout};
//! use stm32f103xx::Interrupt;
//!
//! static HSTDOUT: Mutex<RefCell<Option<HStdout>>> =
//! Mutex::new(RefCell::new(None));
//!
//! static NVIC: Mutex<RefCell<Option<cortex_m::peripheral::NVIC>>> =
//! Mutex::new(RefCell::new(None));
//!
//! fn main() {
//! let global_p = cortex_m::Peripherals::take().unwrap();
//! interrupt::free(|cs| {
//! let hstdout = HSTDOUT.borrow(cs);
//! if let Ok(fd) = hio::hstdout() {
//! *hstdout.borrow_mut() = Some(fd);
//! }
//!
//! let nvic = stm32f103xx::NVIC.borrow(cs);
//! let mut nvic = global_p.NVIC;
//! nvic.enable(Interrupt::TIM2);
//! *NVIC.borrow(cs).borrow_mut() = Some(nvic);
//!
//! let syst = stm32f103xx::SYST.borrow(cs);
//! let mut syst = global_p.SYST;
//! syst.set_clock_source(SystClkSource::Core);
//! syst.set_reload(8_000_000); // 1s
//! syst.enable_counter();
@@ -73,9 +78,9 @@
//! writeln!(*hstdout, "Tick").ok();
//! }
//!
//! let nvic = stm32f103xx::NVIC.borrow(cs);
//!
//! if let Some(nvic) = NVIC.borrow(cs).borrow_mut().as_mut() {
//! nvic.set_pending(Interrupt::TIM2);
//! }
//! });
//! }
//!

View File

@@ -1,20 +1,5 @@
//! How to use the heap and a dynamic memory allocator
//!
//! To compile this example you'll need to build the collections crate as part
//! of the Xargo sysroot. To do that change the Xargo.toml file to look like
//! this:
//!
//! ``` text
//! [dependencies.core]
//! stage = 0
//!
//! [dependencies.collections] # NEW
//! stage = 0
//!
//! [dependencies.compiler_builtins]
//! stage = 1
//! ```
//!
//! This example depends on the alloc-cortex-m crate so you'll have to add it
//! to your Cargo.toml:
//!
@@ -27,15 +12,15 @@
//!
//! ```
//!
//! #[allow(deprecated)]
//! #![feature(collections)]
//! #![feature(alloc)]
//! #![feature(used)]
//! #![feature(global_allocator)]
//! #![no_std]
//!
//! // This is the allocator crate; you can use a different one
//! extern crate alloc_cortex_m;
//! #[macro_use]
//! extern crate collections;
//! extern crate alloc;
//! extern crate cortex_m;
//! extern crate cortex_m_rt;
//! extern crate cortex_m_semihosting;
@@ -44,25 +29,21 @@
//!
//! use cortex_m::asm;
//! use cortex_m_semihosting::hio;
//! use alloc_cortex_m::CortexMHeap;
//!
//! #[global_allocator]
//! static ALLOCATOR: CortexMHeap = CortexMHeap::empty();
//!
//! extern "C" {
//! static mut _sheap: u32;
//! static mut _eheap: u32;
//! }
//!
//! fn main() {
//! // Initialize the allocator
//! unsafe {
//! extern "C" {
//! // Start of the heap
//! static mut _sheap: usize;
//! }
//!
//! // Size of the heap in words (1 word = 4 bytes)
//! // NOTE The bigger the heap the greater the chance to run into a stack
//! // overflow (collision between the stack and the heap)
//! const SIZE: isize = 256;
//!
//! // End of the heap
//! let _eheap = (&mut _sheap as *mut _).offset(SIZE);
//!
//! alloc_cortex_m::init(&mut _sheap, _eheap);
//! }
//! let start = unsafe { &mut _sheap as *mut u32 as usize };
//! let end = unsafe { &mut _eheap as *mut u32 as usize };
//! unsafe { ALLOCATOR.init(start, end - start) }
//!
//! // Growable array allocated on the heap
//! let xs = vec![0, 1, 2];

View File

@@ -2,23 +2,35 @@
//!
//! # Dependencies
//!
//! - Nightly Rust toolchain: `rustup default nightly`
//! - ARM linker: `sudo apt-get install binutils-arm-none-eabi`
//! - Nightly Rust toolchain newer than `nightly-2018-04-08`: `rustup default nightly`
//! - ARM linker: `sudo apt-get install binutils-arm-none-eabi` (on Ubuntu)
//! - Cargo `clone` subcommand: `cargo install cargo-clone`
//! - GDB: `sudo apt-get install gdb-arm-none-eabi`
//! - OpenOCD: `sudo apt-get install OpenOCD`
//! - Xargo: `cargo install xargo`
//! - GDB: `sudo apt-get install gdb-arm-none-eabi` (on Ubuntu)
//! - OpenOCD: `sudo apt-get install OpenOCD` (on Ubuntu)
//! - [Optional] Cargo `add` subcommand: `cargo install cargo-edit`
//!
//! # Usage
//!
//! - Clone this crate
//! 0) Figure out the cross compilation *target* to use.
//!
//! - Use `thumbv6m-none-eabi` for ARM Cortex-M0 and Cortex-M0+
//! - Use `thumbv7m-none-eabi` for ARM Cortex-M3
//! - Use `thumbv7em-none-eabi` for ARM Cortex-M4 and Cortex-M7 (*no* FPU support)
//! - Use `thumbv7em-none-eabihf` for ARM Cortex-M4**F** and Cortex-M7**F** (*with* FPU support)
//!
//! 1) Install the `rust-std` component for your target, if you haven't done so already
//!
//! ``` console
//! $ rustup target add thumbv7em-none-eabihf
//! ```
//!
//! 2) Clone this crate
//!
//! ``` text
//! $ cargo clone cortex-m-quickstart && cd $_
//! ```
//!
//! - Change the crate name, author and version
//! 3) Change the crate name, author and version
//!
//! ``` text
//! $ edit Cargo.toml && head $_
@@ -28,11 +40,11 @@
//! version = "0.1.0"
//! ```
//!
//! - Specify the memory layout of the target device
//! 4) Specify the memory layout of the target device
//!
//! (Note that some board support crates may provide this file for you (check
//! the crate documentation). If you are using one that does that then remove
//! *both* the `memory.x` and `build.rs` files.)
//! **NOTE** board support crates sometimes provide this file for you (check the crate
//! documentation). If you are using one that does then remove *both* the `memory.x` and `build.rs`
//! files.
//!
//! ``` text
//! $ edit memory.x && cat $_
@@ -44,7 +56,7 @@
//! }
//! ```
//!
//! - Optionally, set a default build target
//! 5) Optionally, set a default build target
//!
//! ``` text
//! $ cat >>.cargo/config <<'EOF'
@@ -53,35 +65,32 @@
//! EOF
//! ```
//!
//! - Very likely, depend on a device or a BSP (Board Support Package) crate.
//! 6) Optionally, depend on a device, HAL implementation or a board support crate.
//!
//! ``` text
//! # add a device crate, or
//! $ cargo add stm32f103xx
//! $ # add a device crate, OR
//! $ cargo add stm32f30x
//!
//! # add a board support crate
//! $ cargo add blue-pill --git https://github.com/japaric/blue-pill
//! $ # add a HAL implementation crate, OR
//! $ cargo add stm32f30x-hal
//!
//! $ # add a board support crate
//! $ cargo add f3
//! ```
//!
//! - Write the application or start from one of the examples
//! 7) Write the application or start from one of the examples
//!
//! ``` text
//! $ rm -r src/* && cp examples/hello.rs src/main.rs
//! ```
//!
//! - Disable incremental compilation. It doesn't work for embedded development.
//! You'll hit nonsensical linker errors if you use it.
//! 8) Build the application
//!
//! ``` text
//! $ unset CARGO_INCREMENTAL
//! ```
//!
//! - Build the application
//!
//! ``` text
//! # NOTE this command requires `arm-none-eabi-ld` to be in $PATH
//! $ xargo build --release
//! $ # NOTE this command requires `arm-none-eabi-ld` to be in $PATH
//! $ cargo build --release
//!
//! $ # sanity check
//! $ arm-none-eabi-readelf -A target/thumbv7em-none-eabihf/release/demo
//! Attribute Section: aeabi
//! File Attributes
@@ -104,22 +113,19 @@
//! Tag_ABI_FP_16bit_format: IEEE 754
//! ```
//!
//! - Flash the program
//! 9) Flash the program
//!
//! ``` text
//! # Launch OpenOCD on a terminal
//! $ # Launch OpenOCD on a terminal
//! $ openocd -f (..)
//! ```
//!
//! ``` text
//! # Start a debug session in another terminal
//! $ arm-none-eabi-gdb target/..
//! $ # Start a debug session in another terminal
//! $ arm-none-eabi-gdb target/thumbv7em-none-eabihf/release/demo
//! ```
//!
//! **NOTE** As of nightly-2017-05-14 or so and cortex-m-quickstart v0.1.6 you
//! can simply run `cargo run` or `cargo run --example $example` to build the
//! program, and immediately start a debug session. IOW, it lets you omit the
//! `arm-none-eabi-gdb` command.
//! Alternatively, you can use `cargo run` to build, flash and debug the program in a single step.
//!
//! ``` text
//! $ cargo run --example hello
@@ -155,7 +161,7 @@
//! Error message:
//!
//! ``` text
//! $ xargo build
//! $ cargo build
//! Compiling demo v0.1.0 (file:///home/japaric/tmp/demo)
//! error: linking with `arm-none-eabi-ld` failed: exit code: 1
//! |
@@ -176,7 +182,7 @@
//! Error message:
//!
//! ``` text
//! $ xargo build
//! $ cargo build
//! (..)
//! Compiling cortex-m-semihosting v0.1.3
//! error[E0463]: can't find crate for `std`
@@ -185,8 +191,8 @@
//! ```
//!
//! Solution: Set a default build target in the `.cargo/config` file
//! (see [Usage] section), or call Xargo with `--target` flag:
//! `xargo build --target thumbv7em-none-eabi`.
//! (see [Usage] section), or call Cargo with `--target` flag:
//! `cargo build --target thumbv7em-none-eabi`.
//!
//! ## Overwrote the original `.cargo/config` file
//!
@@ -233,7 +239,7 @@
//! `/usr/share/openocd/scripts` directory (exact location varies per
//! distribution / OS) for a list of scripts that can be used.
//!
//! ## Used Cargo instead of Xargo
//! ## Used an old nightly
//!
//! Error message:
//!
@@ -247,14 +253,14 @@
//! error: aborting due to previous error
//! ```
//!
//! Solution: Use `xargo build`.
//! Solution: Use a more recent nightly
//!
//! ## Used the stable toolchain
//!
//! Error message:
//!
//! ``` text
//! $ xargo build
//! $ cargo build
//! error: failed to run `rustc` to learn about target-specific information
//!
//! To learn more, run the command again with --verbose.
@@ -262,30 +268,6 @@
//!
//! Solution: Switch to the nightly toolchain with `rustup default nightly`.
//!
//! ## Used `CARGO_INCREMENTAL=1`
//!
//! Error message:
//!
//! ``` text
//! $ xargo build
//! error: linking with `arm-none-eabi-ld` failed: exit code: 1
//! |
//! = note: "arm-none-eabi-ld" (..)
//! = note: arm-none-eabi-ld:
//! You must specify the exception handlers.
//! Create a non `pub` static variable with type
//! `cortex_m::exception::Handlers` and place it in the
//! '.rodata.exceptions' section. (cf. #[link_section]). Apply the
//! `#[used]` attribute to the variable to make it reach the linker.
//! arm-none-eabi-ld:
//! Invalid '.rodata.exceptions' section.
//! Make sure to place a static with type `cortex_m::exception::Handlers`
//! in that section (cf. #[link_section]) ONLY ONCE.
//! ```
//!
//! Solution: `$ unset CARGO_INCREMENAL`. And to be on the safe side, call
//! `cargo clean` and thrash the Xargo sysroot: `$ rm -rf ~/.xargo`
//!
//! ## Used `gdb` instead of `arm-none-eabi-gdb`
//!
//! Error message:
@@ -310,6 +292,37 @@
//! ```
//!
//! Solution: Use `arm-none-eabi-gdb target/..`
//!
//! # Used a named piped for `itm.fifo`
//!
//! Error message:
//!
//! ``` text
//! $ cargo run [--example ..]
//!
//! Reading symbols from target/thumbv7em-none-eabihf/debug/cortex-m-quickstart...done.
//! cortex_m_rt::reset_handler ()
//! at $REGISTRY/cortex-m-rt-0.3.12/src/lib.rs:330
//! 330 unsafe extern "C" fn reset_handler() -> ! {
//! semihosting is enabled
//! Ignoring packet error, continuing...
//! Ignoring packet error, continuing...
//! ```
//!
//! Note that when you reach this point OpenOCD will become unresponsive and you'll have to kill it
//! and start a new OpenOCD process before you can invoke `cargo run` / start GDB.
//!
//! Cause: You uncommented the `monitor tpiu ..` line in `.gdbinit` and are using a named pipe to
//! receive the ITM data (i.e. you ran `mkfifo itm.fifo`). This error occurs when `itmdump -f
//! itm.fifo` (or equivalent, e.g. `cat itm.fifo`) is not running.
//!
//! Solution: Run `itmdump -f itm.fifo` (or equivalently `cat itm.fifo`) *before* invoking `cargo
//! run` / starting GDB. Note that sometimes `itmdump` will exit when the GDB session ends. In that
//! case you'll have to run `itmdump` before you start the next GDB session.
//!
//! Alternative solution: Use a plain text file instead of a named pipe. In this scenario you omit
//! the `mkfifo itm.dump` command. You can use `itmdump`'s *follow* mode (-F) to get named pipe like
//! output.
#![no_std]