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adding blinker08 same as blinker07 but uses fiq

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dwelch67
2013-04-20 09:56:41 -04:00
parent bc1f8c347c
commit 22bfbe5ddc
6 changed files with 462 additions and 0 deletions
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40
blinker08/Makefile Normal file
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ARMGNU ?= arm-none-eabi
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
gcc : blinker08.hex blinker08.bin
all : gcc
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.img
rm -f *.bc
rm -f *.clang.opt.s
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
blinker08.o : blinker08.c
$(ARMGNU)-gcc $(COPS) -c blinker08.c -o blinker08.o
blinker08.elf : memmap vectors.o blinker08.o
$(ARMGNU)-ld vectors.o blinker08.o -T memmap -o blinker08.elf
$(ARMGNU)-objdump -D blinker08.elf > blinker08.list
blinker08.bin : blinker08.elf
$(ARMGNU)-objcopy blinker08.elf -O binary blinker08.bin
blinker08.hex : blinker08.elf
$(ARMGNU)-objcopy blinker08.elf -O ihex blinker08.hex

52
blinker08/README Normal file
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See the top level README file for more information on documentation
and how to run these programs.
Derived from blinker07, but instead of IRQ this uses FIQ
diff ../blinker07/vectors.s vectors.s
21,22c21,22
< irq_handler: .word irq
< fiq_handler: .word hang
---
> irq_handler: .word hang
> fiq_handler: .word irq
connect the handler to the fiq exception vector rather than the
irq exception vector
90c90
< bic r0,r0,#0x80
---
> bic r0,r0,#0x40
enable the fiq interrupt rather than irq interrupt
95c95
< push {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
---
> push {r0,r1,r2,r3,r4,r5,r6,r7,lr}
97c97
< pop {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
---
> pop {r0,r1,r2,r3,r4,r5,r6,r7,lr}
fiq mode has its own r8-r12 registers, making it that much faster to
get in and get out.
diff ../blinker07/blinker07.c blinker08.c
166c166,167
< PUT32(0x2000B210,0x00000002);
---
> PUT32(0x2000B210,0x00000000);
> PUT32(0x2000B20C,0x80|1);
the BCM manual says to not enable the irq if using fiq. The irq enable
was a bitmask for interrupts 0 to 31, the fiq wants the interrupt number
so 0x2 is bit number 1 so we want interrupt number 1 and bit 7 in the
fiq enable register enables the fiq interrupt to the arm.

205
blinker08/blinker08.c Normal file
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//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
// The raspberry pi firmware at the time this was written defaults
// loading at address 0x8000. Although this bootloader could easily
// load at 0x0000, it loads at 0x8000 so that the same binaries built
// for the SD card work with this bootloader. Change the ARMBASE
// below to use a different location.
#define ARMBASE 0x8000
#define CS 0x20003000
#define CLO 0x20003004
#define C0 0x2000300C
#define C1 0x20003010
#define C2 0x20003014
#define C3 0x20003018
#define GPFSEL1 0x20200004
#define GPSET0 0x2020001C
#define GPCLR0 0x20200028
extern void PUT32 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void enable_irq ( void );
//------------------------------------------------------------------------
volatile unsigned int irq_counter;
//-------------------------------------------------------------------------
void c_irq_handler ( void )
{
irq_counter++;
PUT32(CS,2);
}
//------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
unsigned int rb;
unsigned int rc;
unsigned int rx;
unsigned int interval;
//make gpio pin tied to the led an output
ra=GET32(GPFSEL1);
ra&=~(7<<18);
ra|=1<<18;
PUT32(GPFSEL1,ra);
PUT32(GPSET0,1<<16); //led off
// PUT32(GPCLR0,1<<16); //led on
if(1)
{
//just poll the system timer counter itself and use that to
//measure time
interval=0x00200000;
rx=GET32(CLO);
for(rb=0;rb<3;rb++)
{
while(1)
{
ra=GET32(CLO);
rc=ra-rx;
if(rc>=interval) break;
}
rx+=interval;
PUT32(GPCLR0,1<<16); //led on
while(1)
{
ra=GET32(CLO);
rc=ra-rx;
if(rc>=interval) break;
}
rx+=interval;
PUT32(GPSET0,1<<16); //led off
}
}
if(1)
{
//use the counter match and the counter match flag in the counter
//status register
interval=0x00100000;
rx=GET32(CLO);
rx+=interval;
PUT32(C1,rx);
PUT32(CS,2);
for(rb=0;rb<4;rb++)
{
while(1)
{
ra=GET32(CS);
if(ra&2) break;
}
rx+=interval;
PUT32(C1,rx);
PUT32(CS,2);
PUT32(GPCLR0,1<<16); //led on
while(1)
{
ra=GET32(CS);
if(ra&2) break;
}
rx+=interval;
PUT32(C1,rx);
PUT32(CS,2);
PUT32(GPSET0,1<<16); //led off
}
}
if(1)
{
//poll the interrupt status
interval=0x00200000;
rx=GET32(CLO);
rx+=interval;
PUT32(C1,rx);
PUT32(CS,2);
PUT32(0x2000B210,0x00000002);
for(rb=0;rb<3;rb++)
{
while(1)
{
ra=GET32(0x2000B204);
if(ra&2)
{
rx+=interval;
PUT32(C1,rx);
PUT32(CS,2);
break;
}
}
PUT32(GPCLR0,1<<16); //led on
while(1)
{
ra=GET32(0x2000B204);
if(ra&2)
{
rx+=interval;
PUT32(C1,rx);
PUT32(CS,2);
break;
}
}
PUT32(GPSET0,1<<16); //led off
}
}
//rely on the interrupt to measure time.
irq_counter=0;
ra=irq_counter;
interval=0x00080000;
rx=GET32(CLO);
rx+=interval;
PUT32(C1,rx);
PUT32(CS,2);
PUT32(0x2000B210,0x00000000);
PUT32(0x2000B20C,0x80|1);
enable_irq();
while(1)
{
while(irq_counter==ra) continue;
ra=irq_counter;
rx+=interval;
PUT32(C1,rx);
PUT32(GPCLR0,1<<16); //led on
while(irq_counter==ra) continue;
ra=irq_counter;
rx+=interval;
PUT32(C1,rx);
PUT32(GPSET0,1<<16); //led off
interval+=0x10000;
if(interval==0) interval=0x00080000;
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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blinker08/memmap Normal file
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MEMORY
{
ram : ORIGIN = 0x8000, LENGTH = 0x1000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

39
blinker08/start.s Normal file
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;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
mov sp,#0x8000
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl dummy
dummy:
bx lr
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

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blinker08/vectors.s Normal file
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;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
ldr pc,reset_handler
ldr pc,undefined_handler
ldr pc,swi_handler
ldr pc,prefetch_handler
ldr pc,data_handler
ldr pc,unused_handler
ldr pc,irq_handler
ldr pc,fiq_handler
reset_handler: .word reset
undefined_handler: .word hang
swi_handler: .word hang
prefetch_handler: .word hang
data_handler: .word hang
unused_handler: .word hang
irq_handler: .word hang
fiq_handler: .word irq
reset:
mov r0,#0x8000
mov r1,#0x0000
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
ldmia r0!,{r2,r3,r4,r5,r6,r7,r8,r9}
stmia r1!,{r2,r3,r4,r5,r6,r7,r8,r9}
;@ (PSR_IRQ_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD2
msr cpsr_c,r0
mov sp,#0x8000
;@ (PSR_FIQ_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD1
msr cpsr_c,r0
mov sp,#0x4000
;@ (PSR_SVC_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
mov r0,#0xD3
msr cpsr_c,r0
mov sp,#0x8000000
;@ SVC MODE, IRQ ENABLED, FIQ DIS
;@mov r0,#0x53
;@msr cpsr_c, r0
bl notmain
hang: b hang
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl PUT16
PUT16:
strh r1,[r0]
bx lr
.globl PUT8
PUT8:
strb r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl GETPC
GETPC:
mov r0,lr
bx lr
.globl BRANCHTO
BRANCHTO:
bx r0
.globl dummy
dummy:
bx lr
.globl enable_irq
enable_irq:
mrs r0,cpsr
bic r0,r0,#0x40
msr cpsr_c,r0
bx lr
irq:
push {r0,r1,r2,r3,r4,r5,r6,r7,lr}
bl c_irq_handler
pop {r0,r1,r2,r3,r4,r5,r6,r7,lr}
subs pc,lr,#4
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------