From 59eba3d7e719a0361d12213f455f4ddf7a7ad18a Mon Sep 17 00:00:00 2001 From: dwelch67 Date: Sat, 20 Apr 2013 10:00:46 -0400 Subject: [PATCH] updating readme --- blinker08/README | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/blinker08/README b/blinker08/README index d1543e1..4624ab8 100644 --- a/blinker08/README +++ b/blinker08/README @@ -46,7 +46,8 @@ diff ../blinker07/blinker07.c blinker08.c the BCM manual says to not enable the irq if using fiq. The irq enable was a bitmask for interrupts 0 to 31, the fiq wants the interrupt number -so 0x2 is bit number 1 so we want interrupt number 1 and bit 7 in the -fiq enable register enables the fiq interrupt to the arm. +so 0x2 is bit number 1 so we want interrupt number 1. The bcm manual +says that bit 7 of the fiq enable register, enables the fiq interrupt, +0x80 is bit 7.