caving in a little and have some pi2 examples that use config.txt to take over the arm boot.

This commit is contained in:
dwelch
2016-06-07 23:38:07 -04:00
parent cdf1028a2f
commit 776d156f09
17 changed files with 1092 additions and 0 deletions

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@@ -33,3 +33,7 @@ the case. I now see how to switch back to SVC. So there is a directory
of examples for staying in HYP mode and a directory for switching
to SVC mode.
I am warming to the idea of using a config.txt, the SVC_BOOT directory
is examples that do not have to be switched back to SVC mode, instead
a config.txt is used with settings that allow us to completely control
the boot of the four cores (and not switch their modes).

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@@ -0,0 +1,44 @@
See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the pi2, see other directories for other flavors
of raspberry pi.
Normally I prefer to not use a config.txt. The standard boot files
bootcode.bin, start.elf, and kernel7.img are how most of the raspberry
pis in the world are used, booting linux. Well tested. config.txt
creates exceptions to that, and from the early days of the raspi to
the present some of these have come and gone.
After messing with aarch64 on the pi3, I am slightly starting to warm
to the idea of using a config.txt. At least some of the time. Have
to for now for the pi3 to stay in aarch64 mode. For the pi2 we can
somewhat return the pi3 to SVC mode from HYP mode.
See the uart01 example, I agree with the folks online.
The MPIDR for the four cores are
80000F00
80000F01
80000F02
80000F03
Which makes it pretty easy to separate the four cores execution paths.
For these SVC_BOOT examples you will need a config.txt file in the
same directory as kernel7.img containing
kernel_old=1
disable_commandline_tags=1
The first line says please load kernel7.img to address 0x0000 instead
of 0x8000. The second line says please dont trash the first few hundred
bytes of memory with ATAG nor device tree information.
If you want to go back to using other examples not in the SVC_BOOT
directory you need to delete or rename the config.txt file they will
not work in general, maybe you get lucky but eventually that luck runs
out.

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@@ -0,0 +1,33 @@
ARMGNU ?= arm-none-eabi
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
all : uart01.bin
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.srec
rm -f *.img
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
uart01.o : uart01.c
$(ARMGNU)-gcc $(COPS) -c uart01.c -o uart01.o
periph.o : periph.c
$(ARMGNU)-gcc $(COPS) -c periph.c -o periph.o
uart01.bin : loader vectors.o periph.o uart01.o
$(ARMGNU)-ld vectors.o periph.o uart01.o -T loader -o uart01.elf
$(ARMGNU)-objdump -D uart01.elf > uart01.list
$(ARMGNU)-objcopy uart01.elf -O ihex uart01.hex
$(ARMGNU)-objcopy uart01.elf -O srec --srec-forceS3 uart01.srec
$(ARMGNU)-objcopy uart01.elf -O binary uart01.bin

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@@ -0,0 +1,32 @@
See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the pi2, see other directories for other flavors
of raspberry pi.
Investigating/confirming what other folks have already found.
The MPIDR for the four cores are
80000F00
80000F01
80000F02
80000F03
We can use the lower nibble to sort them on boot (they all start
presumably at the same time, at the same entry point).
This config.txt is required in the same root directory where kernel7.img
lives.
kernel_old=1
disable_commandline_tags=1
The first line tells the start.elf bootloader to not boot from 0x8000
but instead from 0x0000, the second line says please do not trash
the first few hundred bytes with ATAG or device tree information.
Without that second line it loads kernel7.img then writes the ATAG
information assuming you have left a gap and branched over.

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@@ -0,0 +1,2 @@
kernel_old=1
disable_commandline_tags=1

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@@ -0,0 +1,12 @@
MEMORY
{
ram : ORIGIN = 0x0000, LENGTH = 0x1000000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

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@@ -0,0 +1,174 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
#define PBASE 0x3F000000
extern void PUT32 ( unsigned int, unsigned int );
extern void PUT16 ( unsigned int, unsigned int );
extern void PUT8 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define ARM_TIMER_CTL (PBASE+0x0000B408)
#define ARM_TIMER_CNT (PBASE+0x0000B420)
#define GPFSEL1 (PBASE+0x00200004)
#define GPSET0 (PBASE+0x0020001C)
#define GPCLR0 (PBASE+0x00200028)
#define GPPUD (PBASE+0x00200094)
#define GPPUDCLK0 (PBASE+0x00200098)
#define AUX_ENABLES (PBASE+0x00215004)
#define AUX_MU_IO_REG (PBASE+0x00215040)
#define AUX_MU_IER_REG (PBASE+0x00215044)
#define AUX_MU_IIR_REG (PBASE+0x00215048)
#define AUX_MU_LCR_REG (PBASE+0x0021504C)
#define AUX_MU_MCR_REG (PBASE+0x00215050)
#define AUX_MU_LSR_REG (PBASE+0x00215054)
#define AUX_MU_MSR_REG (PBASE+0x00215058)
#define AUX_MU_SCRATCH (PBASE+0x0021505C)
#define AUX_MU_CNTL_REG (PBASE+0x00215060)
#define AUX_MU_STAT_REG (PBASE+0x00215064)
#define AUX_MU_BAUD_REG (PBASE+0x00215068)
//GPIO14 TXD0 and TXD1
//GPIO15 RXD0 and RXD1
//------------------------------------------------------------------------
unsigned int uart_lcr ( void )
{
return(GET32(AUX_MU_LSR_REG));
}
//------------------------------------------------------------------------
unsigned int uart_recv ( void )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x01) break;
}
return(GET32(AUX_MU_IO_REG)&0xFF);
}
//------------------------------------------------------------------------
unsigned int uart_check ( void )
{
if(GET32(AUX_MU_LSR_REG)&0x01) return(1);
return(0);
}
//------------------------------------------------------------------------
void uart_send ( unsigned int c )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x20) break;
}
PUT32(AUX_MU_IO_REG,c);
}
//------------------------------------------------------------------------
void uart_flush ( void )
{
while(1)
{
if((GET32(AUX_MU_LSR_REG)&0x100)==0) break;
}
}
//------------------------------------------------------------------------
void hexstrings ( unsigned int d )
{
//unsigned int ra;
unsigned int rb;
unsigned int rc;
rb=32;
while(1)
{
rb-=4;
rc=(d>>rb)&0xF;
if(rc>9) rc+=0x37; else rc+=0x30;
uart_send(rc);
if(rb==0) break;
}
uart_send(0x20);
}
//------------------------------------------------------------------------
void hexstring ( unsigned int d )
{
hexstrings(d);
uart_send(0x0D);
uart_send(0x0A);
}
//------------------------------------------------------------------------
void uart_init ( void )
{
unsigned int ra;
PUT32(AUX_ENABLES,1);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_CNTL_REG,0);
PUT32(AUX_MU_LCR_REG,3);
PUT32(AUX_MU_MCR_REG,0);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_IIR_REG,0xC6);
PUT32(AUX_MU_BAUD_REG,270);
ra=GET32(GPFSEL1);
ra&=~(7<<12); //gpio14
ra|=2<<12; //alt5
ra&=~(7<<15); //gpio15
ra|=2<<15; //alt5
PUT32(GPFSEL1,ra);
PUT32(GPPUD,0);
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,(1<<14)|(1<<15));
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,0);
PUT32(AUX_MU_CNTL_REG,3);
}
//------------------------------------------------------------------------
void timer_init ( void )
{
//0xF9+1 = 250
//250MHz/250 = 1MHz
PUT32(ARM_TIMER_CTL,0x00F90000);
PUT32(ARM_TIMER_CTL,0x00F90200);
}
//-------------------------------------------------------------------------
unsigned int timer_tick ( void )
{
return(GET32(ARM_TIMER_CNT));
}
//-------------------------------------------------------------------------
void leds_off ( void )
{
#define GPFSEL3 0x3F20000C
#define GPFSEL4 0x3F200010
#define GPSET1 0x3F200020
#define GPCLR1 0x3F20002C
unsigned int ra;
ra=GET32(GPFSEL4);
ra&=~(7<<21);
ra|=1<<21;
PUT32(GPFSEL4,ra);
ra=GET32(GPFSEL3);
ra&=~(7<<15);
ra|=1<<15;
PUT32(GPFSEL3,ra);
PUT32(GPCLR1,1<<(47-32));
PUT32(GPCLR1,1<<(35-32));
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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@@ -0,0 +1,84 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
// 2 outer corner
// 4
// 6
// 8 TX out
// 10 RX in
extern void PUT32 ( unsigned int, unsigned int );
extern void PUT16 ( unsigned int, unsigned int );
extern void PUT8 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern unsigned int GETPC ( void );
extern unsigned int GETCPSR ( void );
extern unsigned int GETSCTLR ( void );
extern unsigned int GETMPIDR ( void );
extern void BRANCHTO ( unsigned int );
extern void dummy ( unsigned int );
extern void uart_init ( void );
extern unsigned int uart_lcr ( void );
extern void uart_flush ( void );
extern void uart_send ( unsigned int );
extern unsigned int uart_recv ( void );
extern unsigned int uart_check ( void );
extern void hexstring ( unsigned int );
extern void hexstrings ( unsigned int );
extern void timer_init ( void );
extern unsigned int timer_tick ( void );
extern void timer_init ( void );
extern unsigned int timer_tick ( void );
extern void leds_off ( void );
//------------------------------------------------------------------------
int notmain ( void )
{
unsigned int ra;
unsigned int rb;
leds_off();
uart_init();
hexstring(0x12345678);
hexstring(GETPC());
hexstring(GETCPSR());
hexstring(GETSCTLR());
hexstring(GETMPIDR());
hexstring(GET32(0x1000));
hexstring(GET32(0x1004));
hexstring(GET32(0x1008));
if(1)
{
for(ra=0x000;ra<0x1000;ra+=4)
{
rb=GET32(ra);
if(rb)
{
hexstrings(ra); hexstring(rb);
}
}
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2014 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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@@ -0,0 +1,145 @@
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
b skip
.space 0x1000-0x4,0
skip:
mrc p15,0,r0,c0,c0,5 ;@ MPIDR
mov r1,#0xFF
ands r1,r1,r0
bne not_zero
mov sp,#0x8000
bl notmain
hang: b hang
not_zero:
cmp r1,#1
beq core_one
cmp r1,#2
beq core_two
cmp r1,#3
beq core_three
b .
core_one:
ldr r1,=0x1000
str r0,[r1]
mov sp,#0x6000
mov r1,#0
str r1,[sp]
core_one_loop:
ldr r0,[sp]
cmp r0,#0
beq core_one_loop
bl hopper
b hang
core_two:
ldr r1,=0x1004
str r0,[r1]
mov sp,#0x4000
mov r1,#0
str r1,[sp]
core_two_loop:
ldr r0,[sp]
cmp r0,#0
beq core_two_loop
bl hopper
b hang
core_three:
ldr r1,=0x1008
str r0,[r1]
mov sp,#0x2000
mov r1,#0
str r1,[sp]
core_three_loop:
ldr r0,[sp]
cmp r0,#0
beq core_three_loop
bl hopper
b hang
hopper:
bx r0
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl PUT16
PUT16:
strh r1,[r0]
bx lr
.globl PUT8
PUT8:
strb r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl GETPC
GETPC:
mov r0,lr
bx lr
.globl BRANCHTO
BRANCHTO:
mov r12,#0
mcr p15, 0, r12, c7, c10, 1
dsb
mov r12, #0
mcr p15, 0, r12, c7, c5, 0
mov r12, #0
mcr p15, 0, r12, c7, c5, 6
dsb
isb
bx r0
.globl dummy
dummy:
bx lr
.globl GETCPSR
GETCPSR:
mrs r0,cpsr
bx lr
.globl GETSCTLR
GETSCTLR:
mrc p15,0,r0,c1,c0,0
bx lr
.globl GETMPIDR
GETMPIDR:
mrc p15,0,r0,c0,c0,5 ;@ MPIDR
bx lr
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

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@@ -0,0 +1,33 @@
ARMGNU ?= arm-none-eabi
COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding
all : uart02.bin
clean :
rm -f *.o
rm -f *.bin
rm -f *.hex
rm -f *.elf
rm -f *.list
rm -f *.srec
rm -f *.img
vectors.o : vectors.s
$(ARMGNU)-as vectors.s -o vectors.o
uart02.o : uart02.c
$(ARMGNU)-gcc $(COPS) -c uart02.c -o uart02.o
periph.o : periph.c
$(ARMGNU)-gcc $(COPS) -c periph.c -o periph.o
uart02.bin : loader vectors.o periph.o uart02.o
$(ARMGNU)-ld vectors.o periph.o uart02.o -T loader -o uart02.elf
$(ARMGNU)-objdump -D uart02.elf > uart02.list
$(ARMGNU)-objcopy uart02.elf -O ihex uart02.hex
$(ARMGNU)-objcopy uart02.elf -O srec --srec-forceS3 uart02.srec
$(ARMGNU)-objcopy uart02.elf -O binary uart02.bin

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@@ -0,0 +1,31 @@
See the top level README for information on where to find documentation
for the raspberry pi and the ARM processor inside. Also find information
on how to load and run these programs.
This example is for the pi2, see other directories for other flavors
of raspberry pi.
This example requires a config.txt along with a kernel7.img.
This example isolates the four cores into separate execution paths.
Core zero moves forward and sets things up. The other three sit and
poll a memory location, when the value in that memory location changes
from zero to something else they branch to that address assuming it
is their entry point.
This example has each core print something out the uart based on a
timer. Generally not a good idea to do it this way, you normally want
the shared resource properly shared. At the same time this is
properly shared in that the timer is insuring each core touches the
uart at a different time, and space out enough to not cause problems.
The output should be
0123
0123
0123
0123
repeated forever, core 0 prints out 0 and cr/lf, core 1 prints the 1
core 2 the 2 and core 3 the 3.

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@@ -0,0 +1,2 @@
kernel_old=1
disable_commandline_tags=1

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@@ -0,0 +1,12 @@
MEMORY
{
ram : ORIGIN = 0x0000, LENGTH = 0x1000000
}
SECTIONS
{
.text : { *(.text*) } > ram
.bss : { *(.bss*) } > ram
}

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@@ -0,0 +1,174 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
#define PBASE 0x3F000000
extern void PUT32 ( unsigned int, unsigned int );
extern void PUT16 ( unsigned int, unsigned int );
extern void PUT8 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern void dummy ( unsigned int );
#define ARM_TIMER_CTL (PBASE+0x0000B408)
#define ARM_TIMER_CNT (PBASE+0x0000B420)
#define GPFSEL1 (PBASE+0x00200004)
#define GPSET0 (PBASE+0x0020001C)
#define GPCLR0 (PBASE+0x00200028)
#define GPPUD (PBASE+0x00200094)
#define GPPUDCLK0 (PBASE+0x00200098)
#define AUX_ENABLES (PBASE+0x00215004)
#define AUX_MU_IO_REG (PBASE+0x00215040)
#define AUX_MU_IER_REG (PBASE+0x00215044)
#define AUX_MU_IIR_REG (PBASE+0x00215048)
#define AUX_MU_LCR_REG (PBASE+0x0021504C)
#define AUX_MU_MCR_REG (PBASE+0x00215050)
#define AUX_MU_LSR_REG (PBASE+0x00215054)
#define AUX_MU_MSR_REG (PBASE+0x00215058)
#define AUX_MU_SCRATCH (PBASE+0x0021505C)
#define AUX_MU_CNTL_REG (PBASE+0x00215060)
#define AUX_MU_STAT_REG (PBASE+0x00215064)
#define AUX_MU_BAUD_REG (PBASE+0x00215068)
//GPIO14 TXD0 and TXD1
//GPIO15 RXD0 and RXD1
//------------------------------------------------------------------------
unsigned int uart_lcr ( void )
{
return(GET32(AUX_MU_LSR_REG));
}
//------------------------------------------------------------------------
unsigned int uart_recv ( void )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x01) break;
}
return(GET32(AUX_MU_IO_REG)&0xFF);
}
//------------------------------------------------------------------------
unsigned int uart_check ( void )
{
if(GET32(AUX_MU_LSR_REG)&0x01) return(1);
return(0);
}
//------------------------------------------------------------------------
void uart_send ( unsigned int c )
{
while(1)
{
if(GET32(AUX_MU_LSR_REG)&0x20) break;
}
PUT32(AUX_MU_IO_REG,c);
}
//------------------------------------------------------------------------
void uart_flush ( void )
{
while(1)
{
if((GET32(AUX_MU_LSR_REG)&0x100)==0) break;
}
}
//------------------------------------------------------------------------
void hexstrings ( unsigned int d )
{
//unsigned int ra;
unsigned int rb;
unsigned int rc;
rb=32;
while(1)
{
rb-=4;
rc=(d>>rb)&0xF;
if(rc>9) rc+=0x37; else rc+=0x30;
uart_send(rc);
if(rb==0) break;
}
uart_send(0x20);
}
//------------------------------------------------------------------------
void hexstring ( unsigned int d )
{
hexstrings(d);
uart_send(0x0D);
uart_send(0x0A);
}
//------------------------------------------------------------------------
void uart_init ( void )
{
unsigned int ra;
PUT32(AUX_ENABLES,1);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_CNTL_REG,0);
PUT32(AUX_MU_LCR_REG,3);
PUT32(AUX_MU_MCR_REG,0);
PUT32(AUX_MU_IER_REG,0);
PUT32(AUX_MU_IIR_REG,0xC6);
PUT32(AUX_MU_BAUD_REG,270);
ra=GET32(GPFSEL1);
ra&=~(7<<12); //gpio14
ra|=2<<12; //alt5
ra&=~(7<<15); //gpio15
ra|=2<<15; //alt5
PUT32(GPFSEL1,ra);
PUT32(GPPUD,0);
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,(1<<14)|(1<<15));
for(ra=0;ra<150;ra++) dummy(ra);
PUT32(GPPUDCLK0,0);
PUT32(AUX_MU_CNTL_REG,3);
}
//------------------------------------------------------------------------
void timer_init ( void )
{
//0xF9+1 = 250
//250MHz/250 = 1MHz
PUT32(ARM_TIMER_CTL,0x00F90000);
PUT32(ARM_TIMER_CTL,0x00F90200);
}
//-------------------------------------------------------------------------
unsigned int timer_tick ( void )
{
return(GET32(ARM_TIMER_CNT));
}
//-------------------------------------------------------------------------
void leds_off ( void )
{
#define GPFSEL3 0x3F20000C
#define GPFSEL4 0x3F200010
#define GPSET1 0x3F200020
#define GPCLR1 0x3F20002C
unsigned int ra;
ra=GET32(GPFSEL4);
ra&=~(7<<21);
ra|=1<<21;
PUT32(GPFSEL4,ra);
ra=GET32(GPFSEL3);
ra&=~(7<<15);
ra|=1<<15;
PUT32(GPFSEL3,ra);
PUT32(GPCLR1,1<<(47-32));
PUT32(GPCLR1,1<<(35-32));
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2012 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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@@ -0,0 +1,165 @@
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
// 2 outer corner
// 4
// 6
// 8 TX out
// 10 RX in
extern void PUT32 ( unsigned int, unsigned int );
extern void PUT16 ( unsigned int, unsigned int );
extern void PUT8 ( unsigned int, unsigned int );
extern unsigned int GET32 ( unsigned int );
extern unsigned int GETPC ( void );
extern unsigned int GETCPSR ( void );
extern unsigned int GETSCTLR ( void );
extern unsigned int GETMPIDR ( void );
extern void BRANCHTO ( unsigned int );
extern void dummy ( unsigned int );
extern void uart_init ( void );
extern unsigned int uart_lcr ( void );
extern void uart_flush ( void );
extern void uart_send ( unsigned int );
extern unsigned int uart_recv ( void );
extern unsigned int uart_check ( void );
extern void hexstring ( unsigned int );
extern void hexstrings ( unsigned int );
extern void timer_init ( void );
extern unsigned int timer_tick ( void );
extern void timer_init ( void );
extern unsigned int timer_tick ( void );
extern void leds_off ( void );
//-------------------------------------------------------------------
void enter_one ( void )
{
while(1)
{
while(1)
{
if((timer_tick()&0x000F0000)==0x00010000)
{
PUT32(0x3F215040,0x31);
break;
}
}
while(1)
{
if((timer_tick()&0x000F0000)!=0x00010000)
{
break;
}
}
}
}
//-------------------------------------------------------------------
void enter_two ( void )
{
while(1)
{
while(1)
{
if((timer_tick()&0x000F0000)==0x00020000)
{
PUT32(0x3F215040,0x32);
break;
}
}
while(1)
{
if((timer_tick()&0x000F0000)!=0x00020000)
{
break;
}
}
}
}
//-------------------------------------------------------------------
void enter_three ( void )
{
while(1)
{
while(1)
{
if((timer_tick()&0x000F0000)==0x00030000)
{
PUT32(0x3F215040,0x33);
break;
}
}
while(1)
{
if((timer_tick()&0x000F0000)!=0x00030000)
{
break;
}
}
}
}
//-------------------------------------------------------------------
int notmain ( void )
{
leds_off();
uart_init();
hexstring(0x12345678);
hexstring(GETPC());
timer_init();
PUT32(0x6000,(unsigned int)enter_one);
PUT32(0x4000,(unsigned int)enter_two);
PUT32(0x2000,(unsigned int)enter_three);
while(1)
{
while(1)
{
if((timer_tick()&0x000F0000)==0x00000000)
{
PUT32(0x3F215040,0x30);
break;
}
}
while(1)
{
if((timer_tick()&0x000F0000)==0x000E0000)
{
PUT32(0x3F215040,0x0D);
break;
}
}
while(1)
{
if((timer_tick()&0x000F0000)==0x000F0000)
{
PUT32(0x3F215040,0x0A);
break;
}
}
}
return(0);
}
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//-------------------------------------------------------------------------
//
// Copyright (c) 2014 David Welch dwelch@dwelch.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
//-------------------------------------------------------------------------

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@@ -0,0 +1,144 @@
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
.globl _start
_start:
b reset
b hang
b hang
b hang
b hang
b hang
b hang
b hang
reset:
mrc p15,0,r0,c0,c0,5 ;@ MPIDR
mov r1,#0xFF
ands r1,r1,r0
bne not_zero
mov sp,#0x8000
bl notmain
hang: b hang
not_zero:
cmp r1,#1
beq core_one
cmp r1,#2
beq core_two
cmp r1,#3
beq core_three
b .
core_one:
mov sp,#0x6000
mov r1,#0
str r1,[sp]
core_one_loop:
ldr r0,[sp]
cmp r0,#0
beq core_one_loop
bl hopper
b hang
core_two:
mov sp,#0x4000
mov r1,#0
str r1,[sp]
core_two_loop:
ldr r0,[sp]
cmp r0,#0
beq core_two_loop
bl hopper
b hang
core_three:
mov sp,#0x2000
mov r1,#0
str r1,[sp]
core_three_loop:
ldr r0,[sp]
cmp r0,#0
beq core_three_loop
bl hopper
b hang
hopper:
bx r0
.globl PUT32
PUT32:
str r1,[r0]
bx lr
.globl PUT16
PUT16:
strh r1,[r0]
bx lr
.globl PUT8
PUT8:
strb r1,[r0]
bx lr
.globl GET32
GET32:
ldr r0,[r0]
bx lr
.globl GETPC
GETPC:
mov r0,lr
bx lr
.globl BRANCHTO
BRANCHTO:
mov r12,#0
mcr p15, 0, r12, c7, c10, 1
dsb
mov r12, #0
mcr p15, 0, r12, c7, c5, 0
mov r12, #0
mcr p15, 0, r12, c7, c5, 6
dsb
isb
bx r0
.globl dummy
dummy:
bx lr
.globl GETCPSR
GETCPSR:
mrs r0,cpsr
bx lr
.globl GETSCTLR
GETSCTLR:
mrc p15,0,r0,c1,c0,0
bx lr
.globl GETMPIDR
GETMPIDR:
mrc p15,0,r0,c0,c0,5 ;@ MPIDR
bx lr
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@-------------------------------------------------------------------------
;@
;@ Copyright (c) 2012 David Welch dwelch@dwelch.com
;@
;@ Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
;@
;@ The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
;@
;@ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
;@
;@-------------------------------------------------------------------------

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@@ -1,2 +1,3 @@
arm_control=0x200
kernel_old=1
disable_commandline_tags=1